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Threads Starting Sep 1998

11689: 98/09/01: Phillip Cook: Wait statements and while loops
    11691: 98/09/01: Bert Molenkamp: Re: Wait statements and while loops
        11693: 98/09/01: <asa1002@my-dejanews.com>: Re: Wait statements and while loops
    11692: 98/09/01: Wolfgang Ecker: Re: Wait statements and while loops
        11702: 98/09/02: Phillip Cook: Re: Wait statements and while loops
            11703: 98/09/02: Bert Molenkamp: Re: Wait statements and while loops
            11704: 98/09/02: <ems@nospam.riverside-machines.com>: Re: Wait statements and while loops
    11694: 98/09/01: Rickman: Re: Wait statements and while loops
        11713: 98/09/03: APS: Re: Wait statements and while loops
    11732: 98/09/04: David L. Pearson: Re: Wait statements and while loops
11690: 98/09/01: GoodKook: Microprocessorlerr MicroMouse with FPGA/VHDL....
11695: 98/09/01: Andy Peters: Constraining Xilinx tools to NOT use certain pins?
    11696: 98/09/01: Andy Peters: Re: Constraining Xilinx tools to NOT use certain pins?
    11709: 98/09/02: Keith Wootten: Re: Constraining Xilinx tools to NOT use certain pins?
    11789: 98/09/09: Richard John: Re: Constraining Xilinx tools to NOT use certain pins?
    11828: 98/09/11: Simon Ramirez: Re: Constraining Xilinx tools to NOT use certain pins?
11699: 98/09/01: <RQSource@aol.com>: Software Architect Opportunity
11700: 98/09/01: <veritas@mindspring.com>: Rent-to-own band instruments online!
11701: 98/09/02: YongKook Kim: FIFO Design problem
    11727: 98/09/04: Rickman: Re: FIFO Design problem
        11731: 98/09/04: <tom_schaal@my-dejanews.com>: Re: FIFO Design problem
11707: 98/09/02: Michael T. Horne: A critique of the Synopsys/Mentor Design Reuse Methodology Manual
11708: 98/09/02: Blake Nelson: FPGA Developers Available
    11710: 98/09/02: rk: Re: FPGA Developers Available
11711: 98/09/02: Aldec-Brent Wood: $99 VHDL Training
11712: 98/09/02: <wluka@hotmail.com>: Design Re-use, IP cores, Megafunctions, etc...
    11717: 98/09/03: Wade D. Peterson: Re: Design Re-use, IP cores, Megafunctions, etc...
    11767: 98/09/08: Craig Yarbrough: Re: Design Re-use, IP cores, Megafunctions, etc...
11714: 98/09/03: YongKook Kim: Curious problem...FPGA/CPLD Architecture and Logic Implementations
    11716: 98/09/03: Wade D. Peterson: Re: Curious problem...FPGA/CPLD Architecture and Logic Implementations
11718: 98/09/03: Jochen Gruber: online education in quantitative sciences
11719: 98/09/03: Jochen Gruber: [Fwd: online education in quantitative sciences]
11721: 98/09/03: Khan Kibria: Get your chip going - beat the schdule
11722: 98/09/04: YongKook Kim: QUESTION
11723: 98/09/04: YongKook Kim: Assigning IOE on Altera's FLEX10k
    11766: 98/09/08: Morten L. Haugen: Re: Assigning IOE on Altera's FLEX10k
    11796: 98/09/10: Brent A. Hayhoe: Re: Assigning IOE on Altera's FLEX10k
11724: 98/09/03: Michael T. Horne: Way-Cool Verilog and VHDL Quick Reference Cards Available
11725: 98/09/03: Bob Burk: WANTED: Characteristic models for JTAG (IEEE 1149.1) development
11726: 98/09/04: <remy@provide.net>: Xilinx CLPD
    11769: 98/09/08: Craig Yarbrough: Re: Xilinx CLPD
        11776: 98/09/08: Craig Yarbrough: Re: Xilinx CLPD
11728: 98/09/04: richard lee: How to use fpga do a sync/async converter
11729: 98/09/04: THIEBOLT Francois: Where to buy Atmel AT17C256 (i only needs a dozen)
11734: 98/09/04: Hansen Hong: URGENT REQUIREMENT FOR ALTERA PART
11736: 98/09/04: ejob: Architect Postions @ Lucent Technologies
11737: 98/09/05: <massmail@aol.com>: WE MASS E-MAIL YOUR EXCLUSIVE AD TO 900k - $99
11738: 98/09/05: Raymond Chiu: 22V10 programming
    11740: 98/09/06: Cheese ][: Re: 22V10 programming
        11741: 98/09/06: Joel Kolstad: Re: 22V10 programming
            11743: 98/09/06: Peter: Re: 22V10 programming
                11745: 98/09/06: Raymond Chiu: Re: 22V10 programming
                    11746: 98/09/07: <msimon@tefbbs.com>: Re: 22V10 programming
                    11751: 98/09/07: Wade D. Peterson: Re: 22V10 programming
                        11755: 98/09/07: Phil Hays: Re: 22V10 programming
                            11763: 98/09/08: Mikeandmax: Re: 22V10 programming
                                11779: 98/09/08: Phil Hays: Re: 22V10 programming
                    11754: 98/09/07: <msimon@tefbbs.com>: Re: 22V10 programming
                        11777: 98/09/08: Raymond Chiu: Re: 22V10 programming
                            11778: 98/09/08: Raymond Chiu: Re: 22V10 programming
                                11788: 98/09/09: Jan Coombs: Re: 22V10 programming
                                11790: 98/09/09: John L. Smith: Re: 22V10 programming
                                    11792: 98/09/09: Ray Andraka: Re: 22V10 programming
                                11800: 98/09/10: Mike Treseler: Re: 22V10 programming
        11761: 98/09/08: Andrew Papageorgiou, SWI, C: Re: 22V10 programming
    11757: 98/09/07: ChrisEilbeck: Re: 22V10 programming
11744: 98/09/07: <b_rich2@my-dejanews.com>: Altera 10K20 Register File Implementation??
    11747: 98/09/07: Matthew Morris: Re: Altera 10K20 Register File Implementation??
        11749: 98/09/07: <b_rich2@my-dejanews.com>: Re: Altera 10K20 Register File Implementation??
            11752: 98/09/07: Achim Gratz: Re: Altera 10K20 Register File Implementation??
            11753: 98/09/07: Rickman: Re: Altera 10K20 Register File Implementation??
            11756: 98/09/07: muzo: Re: Altera 10K20 Register File Implementation??
    11748: 98/09/06: Jan Gray: Re: Altera 10K20 Register File Implementation??
    11768: 98/09/08: Ray Andraka: Re: Altera 10K20 Register File Implementation??
    11772: 98/09/08: <fatlad@my-dejanews.com>: Re: Altera 10K20 Register File Implementation??
    11773: 98/09/08: Philip Freidin: Re: Altera 10K20 Register File Implementation??
        11782: 98/09/09: Catalin: Re: Altera 10K20 Register File Implementation??
            11786: 98/09/09: Philip Freidin: Re: Altera 10K20 Register File Implementation??
11750: 98/09/07: Smartchip: ahdl to vhdl or verilog
    12785: 98/10/30: Calvin Lee: Re: ahdl to vhdl or verilog
11758: 98/09/07: Eric W Braeden: PCI cores again!!!!!
11759: 98/09/08: Nicolas Matringe: DataIO + EPC1 problem
    11783: 98/09/09: Marc Verhoeven: Re: DataIO + EPC1 problem
        11785: 98/09/09: Yves Le Henaff: Re: DataIO + EPC1 problem
            11794: 98/09/10: Marc Verhoeven: Re: DataIO + EPC1 problem
                11795: 98/09/10: Nicolas Matringe: Re: DataIO + EPC1 problem
    12088: 98/09/28: G. Scott Bright: Re: DataIO + EPC1 problem
11760: 98/09/08: Yang Yungchiang: FPGA Cost ?
    11765: 98/09/08: Rich Fournier: Re: FPGA Cost ?
11762: 98/09/08: Hans-Erik Floryd: Code coverage tools
    11770: 98/09/08: Craig Yarbrough: Re: Code coverage tools
        11774: 98/09/08: Stuart Clubb: Re: Code coverage tools
            11780: 98/09/09: Hans-Erik Floryd: Re: Code coverage tools
                11830: 98/09/11: Mike Nelson: Re: Code coverage tools
                    11881: 98/09/16: Scherer Anton: Re: Code coverage tools
11771: 98/09/08: Stephen D. Scott: faculty openings at the University of Nebraska
11775: 98/09/08: Amir Manasterski: free version of synario for atmel - where?
    11781: 98/09/09: <milostnik@my-dejanews.com>: Re: free version of synario for atmel - where?
11784: 98/09/09: mdisman: New Tech Note
11791: 98/09/09: Eric W Braeden: Design Security Question
    11799: 98/09/10: Catalin: Re: Design Security Question
        11801: 98/09/10: Philip Freidin: Re: Design Security Question
            11804: 98/09/10: Catalin: Re: Design Security Question
                11806: 98/09/10: Philip Freidin: Re: Design Security Question
                    11831: 98/09/11: John McCluskey: Re: Design Security Question (another solution)
                        12027: 98/09/24: Rita Madarassy: Re: Design Security Question (another solution)
                    11834: 98/09/12: Peter: Re: Design Security Question
                        12158: 98/10/01: Derek Palmer: Re: Design Security Question
                            12165: 98/10/02: rk: Re: Design Security Question
                                12186: 98/10/03: Peter: Re: Design Security Question
                                    12194: 98/10/03: rk: Re: Design Security Question
            12026: 98/09/24: Rita Madarassy: Re: Design Security Question
                12036: 98/09/25: Daniel K Elftmann: Re: Design Security Question
                    12043: 98/09/25: Rita Madarassy: Re: Design Security Question
                        12056: 98/09/26: Zoltan Kocsi: Re: Design Security Question
                            12060: 98/09/26: Hal Murray: Re: Design Security Question
                            12062: 98/09/26: Daniel K Elftmann: Re: Design Security Question
                            12069: 98/09/27: Rickman: Re: Design Security Question
                                12076: 98/09/28: Zoltan Kocsi: Re: Design Security Question
                        12057: 98/09/26: Daniel K Elftmann: Re: Design Security Question
                        12061: 98/09/26: Hans: Re: Design Security Question
                            12070: 98/09/27: Rickman: Re: Design Security Question
                12037: 98/09/25: Ray Andraka: Re: Design Security Question
        11818: 98/09/11: Erik de Castro Lopo: Re: Design Security Question
    11857: 98/09/15: Daniel K Elftmann: Re: Design Security Question
        11916: 98/09/18: Ray Andraka: Re: Design Security Question
11793: 98/09/10: Smartchip: ZILOG (Z80) SIMULATION CORE
11797: 98/09/10: =?iso-8859-1?Q?Jos=E9?= Antonio Moreno Zamora: Need Permutation generator
    11807: 98/09/10: John L. Smith: Re: Need Permutation generator
        11815: 98/09/10: Ray Andraka: Re: Need Permutation generator
    11810: 98/09/10: Thomas A. Coonan: Re: Need Permutation generator
11798: 98/09/10: Peter Verplaetse: Xilinx ncd files
    11847: 98/09/14: Philip Freidin: Re: Xilinx ncd files
        11935: 98/09/20: Nick Hartl: Re: Xilinx ncd files
            12024: 98/09/24: Andy Peters: Re: Xilinx ncd files
11802: 98/09/10: Wireless ATM: 16 bit CRC
    11822: 98/09/11: Jan Zegers: Re: 16 bit CRC
        11837: 98/09/12: Wireless ATM: Re: 16 bit CRC
    11844: 98/09/13: mz: Re: 16 bit CRC
11803: 98/09/10: Scott Hauck: FPGA'99: Papers Due October 2nd
11805: 98/09/10: Stan Baker: VSIA Member Meeting
11809: 98/09/10: ejob: jobs @ lucent technologies
11811: 98/09/10: Matthew Robinson: Xilinx Spartan vs. 4K series
    11812: 98/09/11: Allan Herriman: Re: Xilinx Spartan vs. 4K series
        11814: 98/09/10: Jan Gray: Re: Xilinx Spartan vs. 4K series
            11816: 98/09/11: Allan Herriman: Re: Xilinx Spartan vs. 4K series
                11848: 98/09/14: Allan Herriman: Re: Xilinx Spartan vs. 4K series
            12028: 98/09/24: Rita Madarassy: Re: Xilinx Spartan vs. 4K series
                12030: 98/09/24: Andy Peters: Re: Xilinx Spartan vs. 4K series
        11938: 98/09/20: Edward Moore: Re: Xilinx Spartan vs. 4K series
            11947: 98/09/21: Allan Herriman: Re: Xilinx Spartan vs. 4K series
    11813: 98/09/10: Ray Andraka: Re: Xilinx Spartan vs. 4K series
        11851: 98/09/14: <ems@nospam.riverside-machines.com>: Re: Xilinx Spartan vs. 4K series
    11821: 98/09/11: Ed McCauley: Re: Xilinx Spartan vs. 4K series
    11827: 98/09/11: Nick Hartl: Re: Xilinx Spartan vs. 4K series (Spartan pins)
11817: 98/09/11: <sa@ctrlvrmt.ca>: This Website (slocomputers) was HACKED by United Hackers HQ
11819: 98/09/11: Smartchip: Hardware spec or document
11820: 98/09/11: Jochen Gruber: Online education in quantitative sciences
11823: 98/09/11: Dan Parent: Cypress CPLD Jam Player
    11824: 98/09/11: Terry Harris: Re: Cypress CPLD Jam Player
11825: 98/09/11: <gpnyqwax@usacurrency.com>: Financial Art, FAQ and un-cut money
11826: 98/09/11: Ray Andraka: Multiplication hardware
11829: 98/09/11: Gang Li: AD: Reading Secured Devices
11832: 98/09/12: Reza Bohrani: A Linear Feedback Shiftregister
    11839: 98/09/12: Hal Murray: Re: A Linear Feedback Shiftregister
    11845: 98/09/13: allard jean-marc: Re: A Linear Feedback Shiftregister
    11868: 98/09/15: Joseph Van der ree: Re: A Linear Feedback Shiftregister
11835: 98/09/12: <boosterat@kjgpnyqv.ca>: Warning: Strange activity alert.
11836: 98/09/12: <onyxx@netway.at>: solution 2000......year 2000 crisis
11838: 98/09/12: V. Pohnetal: In System Programming
11840: 98/09/12: Eric Edwards: ASIC -> FPGA async issues
    11842: 98/09/13: Wade D. Peterson: Re: ASIC -> FPGA async issues
        11859: 98/09/15: Paul Chien: Re: ASIC -> FPGA async issues
        11860: 98/09/15: Paul Chien: Re: ASIC -> FPGA async issues
            11863: 98/09/15: Ed McCauley: Re: ASIC -> FPGA async issues
        11923: 98/09/18: Mark Purcell: Re: ASIC -> FPGA async issues
            11930: 98/09/19: Joseph H Allen: Re: ASIC -> FPGA async issues
                11931: 98/09/20: Rickman: Re: ASIC -> FPGA async issues
                    11933: 98/09/20: Philip Freidin: Re: ASIC -> FPGA async issues
                        11940: 98/09/20: Rickman: Re: ASIC -> FPGA async issues
                            11951: 98/09/21: rk: Re: ASIC -> FPGA async issues
                                11954: 98/09/21: Jonathan Bromley: Re: ASIC -> FPGA async issues
                            11955: 98/09/21: Jamie Lokier: Re: ASIC -> FPGA async issues
            11971: 98/09/22: Mark Purcell: Re: ASIC -> FPGA async issues
    11843: 98/09/13: Craig Yarbrough: Re: ASIC -> FPGA async issues
        11846: 98/09/14: Philip Freidin: Re: ASIC -> FPGA async issues
        11850: 98/09/14: Ed McCauley: Re: ASIC -> FPGA async issues
            11854: 98/09/14: Austin Franklin: Re: ASIC -> FPGA async issues
                11856: 98/09/15: Allan Herriman: Re: ASIC -> FPGA async issues
                11862: 98/09/15: Ed McCauley: Re: ASIC -> FPGA async issues
                    11864: 98/09/15: Austin Franklin: Re: ASIC -> FPGA async issues
                        11867: 98/09/15: John L. Smith: Re: ASIC -> FPGA async issues
                            11873: 98/09/15: Austin Franklin: Re: ASIC -> FPGA async issues
                                11917: 98/09/18: Ray Andraka: Re: ASIC -> FPGA async issues
                            11874: 98/09/15: Joseph H Allen: Re: ASIC -> FPGA async issues
                        11870: 98/09/15: <ems@nospam.riverside-machines.com>: Re: ASIC -> FPGA async issues
    11852: 98/09/14: <ems@nospam.riverside-machines.com>: Re: ASIC -> FPGA async issues
        11861: 98/09/15: Ed McCauley: Re: ASIC -> FPGA async issues
            11866: 98/09/15: John L. Smith: Re: ASIC -> FPGA async issues
                11878: 98/09/15: Ed McCauley: Re: ASIC -> FPGA async issues
    11853: 98/09/14: <msimon@tefbbs.com>: Re: ASIC -> FPGA async issues
    12092: 98/09/28: Sri Saripalle: Re: ASIC -> FPGA async issues
11841: 98/09/12: Scott Paul Johnston: NEW ENGINEERING PAGE: Please Visit
11849: 98/09/14: Lesec Patrice: PLEASE HELP :ALTERA & VHDL & LPM
11855: 98/09/14: Eric W Braeden: PCI Initiator/Target questions
    11865: 98/09/15: Austin Franklin: Re: PCI Initiator/Target questions
11858: 98/09/15: Andrew Bailey: Job: Researcher, Oxford Univ.
11869: 98/09/15: Stefan Rave: XC4000: config. EPROM usable for dynamic reconfiguration / data storage?
11871: 98/09/15: APS: Free Newsletter and VHDL/FPGA tutorial tech notes
11872: 98/09/15: <asieving@my-dejanews.com>: measuring junction temperature
    11875: 98/09/15: Tom Burgess: Re: measuring junction temperature
        11877: 98/09/16: <msimon@tefbbs.com>: Re: measuring junction temperature
        11915: 98/09/18: Ray Andraka: Re: measuring junction temperature
11876: 98/09/15: Ankit Shah: NEED: ideas on small project
    11879: 98/09/16: <msimon@tefbbs.com>: Re: NEED: ideas on small project
11880: 98/09/16: mike mcginn: Strange switching inside 4020e
11882: 98/09/16: Stefan Rave: sync or async SRAM?
    11886: 98/09/17: Bob Perlman: Re: sync or async SRAM?
        11890: 98/09/17: Stefan Rave: Re: sync or async SRAM?
            11895: 98/09/17: Stefan Ludwig: Re: sync or async SRAM?
                11900: 98/09/17: <msimon@tefbbs.com>: Re: sync or async SRAM?
                    11906: 98/09/18: <msimon@tefbbs.com>: Re: sync or async SRAM?
    11914: 98/09/18: Ray Andraka: Re: sync or async SRAM?
        11922: 98/09/18: Stefan Ludwig: Re: sync or async SRAM?
            11926: 98/09/19: Edward Moore: Re: sync or async SRAM?
            11929: 98/09/19: Ray Andraka: Re: sync or async SRAM?
                11994: 98/09/23: Stefan Rave: Re: sync or async SRAM?
                    11996: 98/09/23: Ray Andraka: Re: sync or async SRAM?
    11936: 98/09/20: Simon Ramirez: Re: sync or async SRAM?
11883: 98/09/16: John Cooley: SNUG '99 Call For Papers, DATE CHANGE, & Prelim Schedule
11884: 98/09/16: Matthew Robinson: Xilinx Spartan and 4K speed grades
    11885: 98/09/16: Ed McCauley: Re: Xilinx Spartan and 4K speed grades
    11889: 98/09/17: Rickman: Re: Xilinx Spartan and 4K speed grades
    11891: 98/09/17: Catalin: Re: Xilinx Spartan and 4K speed grades
    11934: 98/09/20: Simon Ramirez: Re: Xilinx Spartan and 4K speed grades
        11939: 98/09/20: Rickman: Re: Xilinx Spartan and 4K speed grades
11887: 98/09/16: Richard Schwarz: Good EDN article on FPGA Synthesis
    11888: 98/09/17: Brian Dipert: Re: Good EDN article on FPGA Synthesis
11892: 98/09/17: <sam@palmnet.net>: Onboard reprogramming of config EEPROM
    11901: 98/09/17: Tom Biggs: Re: Onboard reprogramming of config EEPROM
    11904: 98/09/18: Rickman: Re: Onboard reprogramming of config EEPROM
    11909: 98/09/18: <sam@palmnet.net>: Re: Onboard reprogramming of config EEPROM
11893: 98/09/17: Jonathan Bromley: Help a confused teacher
    11894: 98/09/17: Jonathan Bromley: Re: Help a confused teacher
        11902: 98/09/17: Ed McCauley: Re: Help a confused teacher
            11905: 98/09/18: Rickman: Re: Help a confused teacher
    11897: 98/09/17: Mike Treseler: Re: Help a confused teacher
        11899: 98/09/17: <msimon@tefbbs.com>: Re: Help a confused teacher
    11898: 98/09/17: <msimon@tefbbs.com>: Re: Help a confused teacher
    11919: 98/09/18: Jonathan Bromley: Confused teacher's THANKS
        11925: 98/09/19: <ems@nospam.riverside-machines.com>: Re: Confused teacher's THANKS
            11932: 98/09/20: Rickman: Re: Confused teacher's THANKS
            11957: 98/09/21: <milostnik@my-dejanews.com>: Re: Confused teacher's THANKS
                11969: 98/09/22: <ems@nospam.riverside-machines.com>: Re: Confused teacher's THANKS
11903: 98/09/17: Hamish Moffatt: programming via RS-232
    11908: 98/09/18: Alexander Sherstuk: Re:programming via RS-232
        11956: 98/09/21: Hamish Moffatt: Re: programming via RS-232
11907: 98/09/18: Sten Søgaard: Problems with the Floorplanner in Xilinx Alliance 1.5
    11924: 98/09/19: <ems@nospam.riverside-machines.com>: Re: Problems with the Floorplanner in Xilinx Alliance 1.5
        11948: 98/09/21: Sten Søgaard: Re: Problems with the Floorplanner in Xilinx Alliance 1.5
11910: 98/09/18: Reza Bohrani: Synthesis warning
    11911: 98/09/18: Sten Søgaard: Re: Synthesis warning
    11912: 98/09/18: Nicolas Matringe: Re: Synthesis warning
    11920: 98/09/18: Rickman: Re: Synthesis warning
    11974: 98/09/22: Bassam Tabbara: Re: Synthesis warning
11913: 98/09/18: Bruce: programming xilinx fpga
    11918: 98/09/18: Philip Freidin: Re: programming xilinx fpga
11921: 98/09/18: Rickman: Xilinx Configuration Info
    11927: 98/09/19: APS: Re: Xilinx Configuration Info
    11941: 98/09/20: <ems@nospam.riverside-machines.com>: Re: Xilinx Configuration Info
11928: 98/09/19: APS: Re: VHDL Tools
11937: 98/09/20: Michael T. Horne: Revision 1.27 of David Black's LOGSCAN utility in Qualis Library
11942: 98/09/20: Mike DeLaney: WANTED: FPGA/ASIC Eng's telecom
11943: 98/09/20: Joel Kolstad: Dynamic pattern matching in Xilinx FPGAs
    11949: 98/09/21: <Goran.Bilski@enator.se>: Re: Dynamic pattern matching in Xilinx FPGAs
    11952: 98/09/21: <ems@nospam.riverside-machines.com>: Re: Dynamic pattern matching in Xilinx FPGAs
        12003: 98/09/23: glen herrmannsfeldt: Re: Dynamic pattern matching in Xilinx FPGAs
    11958: 98/09/21: Rickman: Re: Dynamic pattern matching in Xilinx FPGAs
        11961: 98/09/21: Sundar Gopalan: Re: Dynamic pattern matching in Xilinx FPGAs
        12078: 98/09/27: Joel Kolstad: Re: Dynamic pattern matching in Xilinx FPGAs
        12079: 98/09/27: Joel Kolstad: Re: Dynamic pattern matching in Xilinx FPGAs
            12085: 98/09/28: Rickman: Re: Dynamic pattern matching in Xilinx FPGAs
11944: 98/09/20: Chin-Long Wey: ICCD 98 Program
11945: 98/09/20: Chin-Long Wey: ICCD 98 Program
11946: 98/09/21: <ryjkotqg@somethingfunny.net>: WOW!!! WHAT A STORY ONLINE!!!
11950: 98/09/21: <qhblhcjo@somethingfunny.net>: WOW!!! WHAT A STORY ONLINE!!!
11953: 98/09/21: <timolmst@cyberramp.net>: What is the current revision of the Xilinx M1.x s/w?
    11967: 98/09/21: Steve McDowell: Re: What is the current revision of the Xilinx M1.x s/w?
11959: 98/09/21: <milostnik@my-dejanews.com>: Xilinx 3000 family
    12045: 98/09/25: Peter: Re: Xilinx 3000 family
11960: 98/09/21: Philip Freidin: Re: Xilinx tools
11962: 98/09/21: <myemail@any.where.com>: The Ultimate Southpark CD-ROM
11963: 98/09/21: Paul Wheeler: Xilinx tools
11964: 98/09/21: Sam Kung: Verilog newsgroup
    11965: 98/09/21: Son P. Huynh: Re: Verilog newsgroup
    11966: 98/09/21: jerry english: Re: Verilog newsgroup
11968: 98/09/21: ejob: vlsi / fpga jobs @ lucent
11970: 98/09/22: John Funnell: Efficient max-function architecture?
    11975: 98/09/22: Jan Gray: Re: Efficient max-function architecture?
        11987: 98/09/22: Jan Gray: Re: Efficient max-function architecture? -- "parallel bitwise max"
            12118: 98/09/30: Brad Taylor: Re: Efficient max-function architecture? -- "parallel bitwise max"
                12119: 98/09/30: Jan Gray: Re: Efficient max-function architecture? -- "parallel bitwise max"
                    12123: 98/09/30: Jan Gray: Re: Efficient max-function architecture? -- "parallel bitwise max"
                    12141: 98/09/30: Brad Taylor: Re: Efficient max-function architecture? -- "parallel bitwise max"
    11979: 98/09/23: Gerald Coe: Re: Efficient max-function architecture?
        12055: 98/09/25: Ray Andraka: Re: Efficient max-function architecture?
    11985: 98/09/22: Rickman: Re: Efficient max-function architecture?
    12004: 98/09/23: glen herrmannsfeldt: Re: Efficient max-function architecture?
        12005: 98/09/23: Ray Andraka: Re: Efficient max-function architecture?
            12025: 98/09/24: Stuart Clubb: Re: Efficient max-function architecture?
                12054: 98/09/25: Ray Andraka: Re: Efficient max-function architecture?
11972: 98/09/22: Bob Myers: Anyone received Xilinx M1.5 yet???
    11982: 98/09/22: Howard Hu: Re: Anyone received Xilinx M1.5 yet???
    11990: 98/09/23: Alexander Sherstuk: Anyone received Xilinx Foundation 1.5 ?
        12049: 98/09/25: Stephen Peddle: Re: Anyone received Xilinx Foundation 1.5 ?
            12162: 98/10/02: Andy Peters: Re: Anyone received Xilinx Foundation 1.5 ?
11973: 98/09/22: tom sutherland: 2D- FFT of image in ALTERA FLEX 10k ?
    12497: 98/10/14: Andy Papageorgiou: Re: 2D- FFT of image in ALTERA FLEX 10k ?
11976: 98/09/23: John Huang: fpga-asic
    11981: 98/09/22: Flor Netsmar: Re: fpga-asic
        11989: 98/09/23: John Huang: Re: fpga-asic
    12001: 98/09/23: Flor Netsmar: Re: fpga-asic
    12017: 98/09/24: Gareth Baron: Re: fpga-asic
        12176: 98/10/02: Kapilan Maheswaran: Re: fpga-asic
11977: 98/09/22: Nestor Caouras: How to reduce ringing/ground bounce from FPGA output pin?
    11986: 98/09/22: Rickman: Re: How to reduce ringing/ground bounce from FPGA output pin?
        11991: 98/09/23: Jake Janovetz: Re: How to reduce ringing/ground bounce from FPGA output pin?
    11988: 98/09/23: Austin Franklin: Re: How to reduce ringing/ground bounce from FPGA output pin?
    11992: 98/09/23: Don Husby: Re: How to reduce ringing/ground bounce from FPGA output pin?
    11993: 98/09/23: Brian Lehman: Re: How to reduce ringing/ground bounce from FPGA output pin?
    12014: 98/09/24: Manfred Kraus: Re: How to reduce ringing/ground bounce from FPGA output pin?
        12029: 98/09/24: Nestor Caouras: Re: How to reduce ringing/ground bounce from FPGA output pin?
            12032: 98/09/25: Rickman: Re: How to reduce ringing/ground bounce from FPGA output pin?
11978: 98/09/22: Scott Hauck: FPGA'99: Papers due in 10 days (October 2nd)
11980: 98/09/22: jai kishan: 3.3V PCI to 5V local bus interface?
    12048: 98/09/25: Stephen Peddle: Re: 3.3V PCI to 5V local bus interface?
    12828: 98/10/30: Steve Casselman: Re: 3.3V PCI to 5V local bus interface?
        12834: 98/10/31: jai kishan: Re: 3.3V PCI to 5V local bus interface?
            12931: 98/11/05: Steve: Re: 3.3V PCI to 5V local bus interface?
11983: 98/09/22: Howard Hu: Programming Xilinx Spartan using JTAG cable
11984: 98/09/23: Peter: FPGA information
    12031: 98/09/24: Phil Hays: Re: FPGA information
        12035: 98/09/25: Daniel K Elftmann: Re: FPGA information
            12059: 98/09/25: Phil Hays: Re: FPGA information -- maybe
    12034: 98/09/25: Richard Schwarz: Re: FPGA information
    12084: 98/09/28: Steven K. Knapp: Re: FPGA information
11995: 98/09/23: Andrew Phillips: easier testing for PCI cards??
    11997: 98/09/23: dan: Re: easier testing for PCI cards??
        12000: 98/09/23: Gareth Baron: Re: easier testing for PCI cards??
        12002: 98/09/23: Jerry Avins: Re: easier testing for PCI cards??
    12008: 98/09/24: Austin Franklin: Re: easier testing for PCI cards??
    12010: 98/09/24: Rene: Re: easier testing for PCI cards??
        12012: 98/09/24: Austin Franklin: Re: easier testing for PCI cards??
            12018: 98/09/24: Pascal Dornier: Re: easier testing for PCI cards??
    12011: 98/09/24: Dr Mike Addlesee: Re: easier testing for PCI cards??
    12022: 98/09/24: Andy Peters: Re: easier testing for PCI cards??
11998: 98/09/23: Matthew Robinson: Viewlogic's EXPT1076 utility: problems
    11999: 98/09/23: Matthew Robinson: Re: Viewlogic's EXPT1076 utility: problems
12006: 98/09/24: Garynlang: US ASIC jobs+work visa
    12016: 98/09/24: <pipjockey@my-dejanews.com>: Re: US ASIC jobs+work visa
    12093: 98/09/28: Sri Saripalle: Re: US ASIC jobs+work visa
12007: 98/09/23: A.Tillmann: Over 1000 semiconductor links!
12009: 98/09/24: John Huang: Which FPGA tool is better
    12015: 98/09/24: Son P. Huynh: Re: Which FPGA tool is better
    12021: 98/09/24: James Doherty: Re: Which FPGA tool is better
    12033: 98/09/25: Richard Schwarz: Re: Which FPGA tool is better
    12046: 98/09/25: Peter: Re: Which FPGA tool is better
        12198: 98/10/04: JA: Re: Which FPGA tool is better
    12053: 98/09/25: Bob Deasy: Re: Which FPGA tool is better
    12122: 98/09/30: John Willoughby: Re: Which FPGA tool is better
        12137: 98/10/01: <rajkumar@gdatech.com>: Re: Which FPGA tool is better
        12153: 98/10/01: <pipjockey@my-dejanews.com>: Re: Which FPGA tool is better
            12156: 98/10/01: <plewer@my-dejanews.com>: Re: Which FPGA tool is better
            12157: 98/10/01: <plewer@my-dejanews.com>: Re: Which FPGA tool is better
            12220: 98/10/05: Rita Madarassy: Re: Which FPGA tool is better
                12234: 98/10/06: James Doherty: Re: Which FPGA tool is better
    12256: 98/10/07: Tom Meagher: Re: Which FPGA tool is better
12013: 98/09/24: adria.bofill: shareware
    12023: 98/09/24: <msimon@tefbbs.com>: Re: shareware
        12065: 98/09/26: Richard Erlacher: Re: shareware
    12083: 98/09/28: Steven K. Knapp: Re: shareware
12019: 98/09/24: Leprechaun: strange problem of 4028XL
    12097: 98/09/28: Gareth Baron: Re: strange problem of 4028XL
        12107: 98/09/29: Mohsin Riaz: Re: strange problem of 4028XL
    12112: 98/09/29: Philip Freidin: Re: strange problem of 4028XL
        12144: 98/10/01: Leprechaun: Re: strange problem of 4028XL
12020: 98/09/24: <bit_head>: IrDA infrared software protocol stack
12038: 98/09/25: Lothar Brodbeck: Announcement: 200.000 Gates FPGA Prototyping Board
    12094: 98/09/28: Sri Saripalle: Re: Announcement: 200.000 Gates FPGA Prototyping Board
        12101: 98/09/29: Rickman: Re: Announcement: 200.000 Gates FPGA Prototyping Board
        12129: 98/10/01: Austin Franklin: Re: Announcement: 200.000 Gates FPGA Prototyping Board
12039: 98/09/25: Juergen Otterbach: FIR Filter Design
    12089: 98/09/28: walterb: Re: FIR Filter Design
        12133: 98/09/30: James E. Stine: Re: FIR Filter Design
            12136: 98/09/30: Ray Andraka: Re: FIR Filter Design
                12146: 98/10/01: walterb: Re: FIR Filter Design
                    12150: 98/10/01: Ray Andraka: Re: FIR Filter Design
                        12152: 98/10/01: James Stine: Re: FIR Filter Design
                        12183: 98/10/03: Rickman: Re: FIR Filter Design
                            12191: 98/10/03: Peter: Re: FIR Filter Design
                            12224: 98/10/05: Ray Andraka: Re: FIR Filter Design
                12231: 98/10/06: M Kartheepan: Re: FIR Filter Design
                    12235: 98/10/06: Rickman: Re: FIR Filter Design
                        12253: 98/10/07: M Kartheepan: Re: FIR Filter Design
                            12254: 98/10/06: muzo: Re: FIR Filter Design
                            12267: 98/10/07: Ray Andraka: Re: FIR Filter Design
                                12295: 98/10/07: Kartheepan, Madasamy: Re: FIR Filter Design
                                    12325: 98/10/08: Ray Andraka: Re: FIR Filter Design
                                        12390: 98/10/10: Wallace V Rose: Re: FIR Filter Design
                                            12394: 98/10/11: Ray Andraka: Re: FIR Filter Design
                                                12402: 98/10/11: Ray Andraka: Re: FIR Filter Design
                                                    12470: 98/10/12: Wallace V Rose: Re: FIR Filter Design
                                                        12593: 98/10/19: Ray Andraka: Re: FIR Filter Design
                                12296: 98/10/07: Kartheepan, Madasamy: Re: FIR Filter Design
                                    12311: 98/10/08: Andy Peters: Re: FIR Filter Design
                                12871: 98/11/03: <sbierly@sed.stel.com>: Re: FIR Filter Design
                    12237: 98/10/06: Ray Andraka: Re: FIR Filter Design
12040: 98/09/25: Dan Parent: Cypress CPLDs
    12050: 98/09/25: Stephen Peddle: Re: Cypress CPLDs
        12051: 98/09/25: Dan Parent: Re: Cypress CPLDs
    12090: 98/09/28: Tim O: Re: Cypress CPLDs
12041: 98/09/25: <gfang@pop.slkc.uswest.net>: CardBus CIS useless?
    12042: 98/09/25: Austin Franklin: Re: CardBus CIS useless?
        12044: 98/09/25: tom picard: Re: CardBus CIS useless?
            12047: 98/09/25: <gfang@pop.slkc.uswest.net>: Re: CardBus CIS useless?
            12058: 98/09/26: Austin Franklin: Re: CardBus CIS useless?
12052: 98/09/25: Fabio Somenzi: VIS 1.3 Released
12063: 98/09/26: APS: Free FPGA/HDL Newsletter Announcement
    12120: 98/09/30: Markus Wannemacher: Re: Free FPGA/HDL Newsletter Announcement
12064: 98/09/26: Stan Baker: Keynote, Sangiovanni-Vincentelli
12066: 98/09/26: Steven J. Ackerman: ANNOUNCE: Xilinx FPGA / CPLD and CODEC Demo Boards
12067: 98/09/26: Mike DeLaney: Digital/ASIC/FPGA Eng...Needed
12068: 98/09/27: Hank777: Sweat equity engineer needed for consumer electronics hardware
12073: 98/09/27: Scott Paul Johnston: NEW ENGINEERING PAGE: Please Visit
12074: 98/09/27: Kevin Horton: NFX780, where to get?
    12126: 98/10/01: Ed Hutchinson: Re: NFX780, where to get?
    12173: 98/10/02: Rick Filipkiewicz: Re: NFX780, where to get?
        12422: 98/10/11: Roger Sligar: Re: NFX780, where to get?
        12423: 98/10/11: Roger Sligar: Re: NFX780, where to get?
12075: 98/09/27: Mohsin Riaz: Faster 32_bit integer multiplier required !!
    12077: 98/09/27: Jake Janovetz: Re: Faster 32_bit integer multiplier required !!
    12086: 98/09/28: Ray Andraka: Re: Faster 32_bit integer multiplier required !!
12081: 98/09/28: <msimon@tefbbs.com>: Design Your Own Microprocessor(tm)
12082: 98/09/28: <saju@wipinfo.soft.net>: Metastability
    12096: 98/09/29: Daniel K Elftmann: Re: Metastability
    12099: 98/09/29: Hal Murray: Re: Metastability
    12103: 98/09/29: Andrew Cannon: Re: Metastability
12087: 98/09/28: ovilup: I2C controller references needed!
    12091: 98/09/28: Tim O: Re: I2C controller references needed!
        12102: 98/09/29: Andrew Cannon: Re: I2C controller references needed!
    12104: 98/09/29: Derek Stewart: Re: I2C controller references needed!
12095: 98/09/29: John Huang: Fastest Add
    12098: 98/09/28: Ray Andraka: Re: Fastest Add
        12132: 98/09/30: James E. Stine: Re: Fastest Add
            12135: 98/09/30: Ray Andraka: Re: Fastest Add
                12139: 98/10/01: James E. Stine: Re: Fastest Add
                    12142: 98/10/01: Matthias Brucke: Re: Fastest Add
                        12151: 98/10/01: James Stine: Re: Fastest Add
                    12159: 98/10/01: Donald Gillies: Re: Fastest Add
                        12160: 98/10/01: Ray Andraka: Re: Fastest Add
                        12163: 98/10/01: James E. Stine: Re: Fastest Add
12100: 98/09/29: Peter J. Ashenden: WORKSHOPS '98 - VHDL for Power Users
12105: 98/09/29: Thomas Reinemann: Using Xilinx TBUF?
    12113: 98/09/29: Andy Peters: Re: Using Xilinx TBUF?
12106: 98/09/29: Victor Levandovsky: Where can I get comp.arch.fpga newsarticle archive?
    12117: 98/09/29: Steven K. Knapp: Re: Where can I get comp.arch.fpga newsarticle archive?
    12131: 98/10/01: Cm Heong: Re: Where can I get comp.arch.fpga newsarticle archive?
    12143: 98/10/01: Dmitry Cherniavsky: Re: Where can I get comp.arch.fpga newsarticle archive?
12108: 98/09/29: Lukas Louw: Simple programmable device suggestions please?
    12110: 98/09/29: Stephen Peddle: Re: Simple programmable device suggestions please?
    12111: 98/09/29: Jonathan Bromley: Re: Simple programmable device suggestions please?
    12128: 98/10/01: jim granville: Re: Simple programmable device suggestions please?
    12130: 98/09/30: Richard Schwarz: Re: Simple programmable device suggestions please?
        12138: 98/10/01: Richard Schwarz: Re: Simple programmable device suggestions please?
            12140: 98/10/01: <msimon@tefbbs.com>: Re: Simple programmable device suggestions please?
                12164: 98/10/02: <jessen@sgi.com>: Looking for QuickLogic programmer
12109: 98/09/29: ovilup: I2C : thank you
12114: 98/09/29: Garynlang: USA EDA rel. jobs+work visa
12115: 98/09/29: Giang Thach Nguyen: Maxplus2 Timing Analyzer
    12116: 98/09/29: Ray Andraka: Re: Maxplus2 Timing Analyzer
    12170: 98/10/02: <pawel5732@my-dejanews.com>: Re: Maxplus2 Timing Analyzer
    12219: 98/10/05: Srikanth Gurrapu: Re: Maxplus2 Timing Analyzer
12121: 98/09/30: Elder V Costa: Xilinx XC95xx JTAG program for DOS
    12127: 98/09/30: David R Brooks: Re: Xilinx XC95xx JTAG program for DOS
12124: 98/09/30: K. Y. Chan: need fpga contract work
12125: 98/09/30: <bit_head>: IrDA (infrared) software protocol stack for Embedded systems
12134: 98/09/30: ejob: jobs @ lucent
    12145: 98/10/01: rk: Re: jobs @ lucent


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