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Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Threads Starting Mar 1995
780: 95/03/01: Dr. K.W.Ng: Setting up a Rapid Systems Prototyping Lab.
781: 95/03/01: Andreas Kugel: FCCM95 conference: Info on US visit requested
782: 95/03/01: Charles Paez - CEMISID - ULA: slif2xnf or eqn2xnf
785: 95/03/02: Dong-Lok Kim: Limits on on-chip FPGA virtual computing
798: 95/03/03: Sami Sallinen: Re: Limits on on-chip FPGA virtual computing
803: 95/03/03: Dong-Lok Kim: Re: Limits on on-chip FPGA virtual computing
811: 95/03/05: alessandro de gloria: Re: Limits on on-chip FPGA virtual computing
815: 95/03/06: Brad Hutchings: Re: Limits on on-chip FPGA virtual computing
786: 95/03/02: <randraka@ids.net>: Re: Can I implement a digital PLL in an FPGA??
787: 95/03/02: John Cooley: IST Drying Up In North America
795: 95/03/03: wiliki: Re: IST Drying Up In North America
807: 95/03/04: Jonathan AH Hogg: Re: IST Drying Up In North America
790: 95/03/02: Chih-chang Lin: FPGA Custom Computing Machine
791: 95/03/02: Chih-chang Lin: FPGA Custom Computing Machine
801: 95/03/03: Andreas Kugel: Re: FPGA Custom Computing Machine
792: 95/03/02: Jeffrey M. Arnold: FPL'95: Final Call for Papers
793: 95/03/03: Jeffrey M. Arnold: C.A.F. WWW page (aperiodic reminder)
794: 95/03/03: Mircea R Stan: area of RAM cells in FPGAs
808: 95/03/04: Alfred: Re: area of RAM cells in FPGAs
812: 95/03/05: Guy Gerard Lemieux: Re: area of RAM cells in FPGAs
799: 95/03/03: Robert Tjarnstrom: Power gain when moving from FPGA to Gate Array
805: 95/03/03: mjodalfr: Re: Power gain when moving from FPGA to Gate Array
810: 95/03/05: David Van den Bout: Re: Power gain when moving from FPGA to Gate Array
814: 95/03/06: Satwant Singh: Re: Power gain when moving from FPGA to Gate Array
800: 95/03/03: <randraka@ids.net>: RE: FPGA Custom Computing Machine
806: 95/03/03: Brad Hutchings: RE: FPGA Custom Computing Machine
820: 95/03/07: Andreas Kugel: Re: FPGA Custom Computing Machine
802: 95/03/03: Sergey A. Chernyshov: Needed Price List for XC3000 and XC4000 series from USA
804: 95/03/04: Andre' DeHon: RE: Limits on on-chip FPGA virtual computing
813: 95/03/05: Skarkada: How to daisy-chain FPGAs in software?
816: 95/03/06: <eacosta@media.mit.edu>: Re: Comp.Arch.FPGA Reflector V1 #152
818: 95/03/06: Ashutosh Singla: Partitioning and synthesis
819: 95/03/06: Rob Semenoff: DSP in FPGA ?
825: 95/03/07: Rob Semenoff: Re: DSP in FPGA ?
821: 95/03/07: Geoffrey Brown: Implementing Asynchronous Circuits
823: 95/03/07: David Van den Bout: hypertext PLDasm manual available online
824: 95/03/08: Saghir A. Shaikh: Cost of FPGA
826: 95/03/08: Aurobindo Dasgupta: Looking for someone to share room in hotel for ISCAS-95
827: 95/03/08: Russ Tessier: Bit serial multipliers in FPGAs
832: 95/03/09: Russell Petersen: Re: Bit serial multipliers in FPGAs
828: 95/03/08: C. C. Lin: XNF translator
829: 95/03/09: Stan Eker: goof on cheaper Xilinx price ($1K US, not $100)
830: 95/03/08: Lee Fadden: Inverse-Fourier waveform synthesis
831: 95/03/09: Russell Petersen: Re: Inverse-Fourier waveform synthesis
842: 95/03/10: Graham Seaman: Re: Inverse-Fourier waveform synthesis
833: 95/03/09: <a.osama@ic.ac.uk>: FPGA related papers
834: 95/03/09: <a.osama@ic.ac.uk>: RE: FPGA Custom Computing Machine
835: 95/03/09: <a.osama@ic.ac.uk>: RE: Bit serial multipliers in FPGAs
836: 95/03/09: <randraka@ids.net>: Re:FPGA bit serial multipliers, correction
839: 95/03/10: martin mason: Re:FPGA bit serial multipliers
837: 95/03/09: Kee Chan: Smith's web page (Was: Limits on on-chip FPGA virtual .....)
838: 95/03/10: Wichai Tang: How to partitions the design by ppr ?
843: 95/03/10: Rob Semenoff: FPGA multi-chip modules ?
845: 95/03/11: Gnuge: Re: FPGA multi-chip modules ?
846: 95/03/12: Guy Gerard Lemieux: Re: FPGA multi-chip modules ?
848: 95/03/13: Paul S Secinaro: Re: FPGA multi-chip modules ?
873: 95/03/18: Tom Biggs: Re: FPGA multi-chip modules ?
876: 95/03/18: Gnuge: Re: FPGA multi-chip modules ?
850: 95/03/13: Philip Freidin: Re: FPGA multi-chip modules ?
859: 95/03/15: Wayne Thomas: Re: FPGA multi-chip modules ?
857: 95/03/14: Joel Darnauer: Re: FPGA multi-chip modules ?
844: 95/03/10: John Cooley: SNUG 95 in 12 Days! OVI in 17 Days!
847: 95/03/12: Koh Kim Huat: Re: FPGA multi-chip modules ?
849: 95/03/13: Roland Welte: Simulation with VIEWLogic's PROSim
851: 95/03/13: Ian Packer: Re. DSP for FPGA
852: 95/03/13: Jeffrey M. Arnold: FCCM'95 Program
854: 95/03/14: David le Comte: Protel now connects to Xilinx
867: 95/03/17: Stan Eker: Re: Protel now connects to Xilinx
855: 95/03/14: Ian Packer: Re: Questions of implementing asynchronous circuits using FPGAs.
856: 95/03/14: Nick Schmitz: <--> Proposed Newsgroup for Programmable Logic Users <--->
858: 95/03/15: Andreas Kugel: Re: <--> Proposed Newsgroup for Programmable Log
862: 95/03/16: David Pashley: <--> Proposed Newsgroup for Programmable Logic Users <---
860: 95/03/16: FirstName LastName: meeting others through personal ads (advertisement)
865: 95/03/16: Chuck Corley: Re: meeting others through personal ads (advertisement)
861: 95/03/16: Emma Mowat: Tie option in makebits
863: 95/03/16: Mohammed Khalid: Re: How to partitions the design by ppr ?
874: 95/03/17: Gnuge: Re: How to partitions the design by ppr ?
864: 95/03/16: M Burgess: Specialist Vacancies
866: 95/03/16: Jack Ogawa: Re: FPGA multi-chip modules ?
868: 95/03/17: [D3]Asensoh.K.O: test
869: 95/03/17: Jatan Shah: Synopsys XACT Interface...
870: 95/03/17: DCUI: IST New Office
871: 95/03/17: John Cooley: Clarification of SNUG '95 Design Contest
872: 95/03/17: David W. Bishop: Boundary Scan in a Xilinx 4010
884: 95/03/20: wieler: Re: Boundary Scan in a Xilinx 4010
875: 95/03/18: Ronald E Goodstein: Free Viewlogic design kits?
877: 95/03/18: Gnuge: Re: Free Viewlogic design kits?
879: 95/03/19: Eric Edwards: Re: Free Viewlogic design kits?
878: 95/03/19: David Brooks: Re: Free Viewlogic design kits?
880: 95/03/20: Mircea R Stan: Re: Free Viewlogic design kits?
881: 95/03/20: Damir Smitlener: Re: Free Viewlogic design kits?
885: 95/03/21: MARK INDOVINA Xxxxx Ppppp: Re: Free Viewlogic design kits?
882: 95/03/20: Arrigo Benedetti: FPGA accelerated engines for volume rendering
888: 95/03/22: Jan Gray: Re: FPGA accelerated engines for volume rendering
891: 95/03/22: Nick Tredennick: Re: FPGA accelerated engines for volume rendering
883: 95/03/20: dana s withrow: Beyond Futurenet including PLD ?
886: 95/03/21: Andy Cooper: Re: Beyond Futurenet including PLD ?
889: 95/03/21: Don Gamble: Re: Beyond Futurenet including PLD ?
887: 95/03/21: Van Hovey: Designing FPGA's under Windows
890: 95/03/22: Ian Packer: AT&T FPGA Mail List
892: 95/03/22: Frank Costantini: Help: BCH Coding/Decoding in FPGA
893: 95/03/22: Jeffrey M. Arnold: FCCM'95 Registration and Hotel
894: 95/03/22: Steve Guccione: List of FPGA-based computing machines
896: 95/03/23: Hal Murray: Any suggestions for chips to implement uCode machines?
901: 95/03/26: Philip Freidin: Re: Any suggestions for chips to implement uCode machines?
917: 95/03/30: Akinori Sugiura: Re: Any suggestions for chips to implement uCode machines?
895: 95/03/22: Brad Hutchings: yet another URL
897: 95/03/23: Ubaid R. Khan: Need some Data on FPGA Gate/Pin Counts
898: 95/03/23: Dr. Franz Pucher: FAQ
899: 95/03/23: Hermann-Josef Hebbelmann: Divider in Xilinx 4000
900: 95/03/24: Silicon Group: Xilinx, FPGA and Cadence
902: 95/03/27: Ian Packer: AT&T FPGA Mailing List
904: 95/03/27: David Pashley: Re: AT&T FPGA Mailing List
903: 95/03/27: Ajit Kurian George: Need 100 MHz, relatively low power FPGAs
907: 95/03/27: mjodalfr: Re: Need 100 MHz, relatively low power FPGAs
981: 95/04/06: Mark Nass: Re: Need 100 MHz, relatively low power FPGAs
905: 95/03/27: Eshkar Lidor: ASIC data sites
906: 95/03/27: <GCAT@dorval.mpbtech.qc.ca>: Re: 100MHz low power FPGAs
914: 95/03/29: Bob Elkind: Re: 100MHz low power FPGAs
908: 95/03/28: Ian Packer: Re: AT&T FPGA Mailing List
909: 95/03/28: Arrigo Benedetti: Opinions on IBM PowerPC for Electronics CAD lab
913: 95/03/29: Anton Dischner: Re: Opinions on IBM PowerPC for Electronics CAD lab
932: 95/03/31: MARK INDOVINA Xxxxx Ppppp: Re: Opinions on IBM PowerPC for Electronics CAD lab
968: 95/04/05: Fateh A. Tipu: Re: Opinions on IBM PowerPC for Electronics CAD lab
910: 95/03/28: Jatan Shah: Memory in xc4000 using synopsys...
933: 95/03/31: Vincent Rowley: Re: Memory in xc4000 using synopsys...
911: 95/03/29: Joseph J. Kubicky: Excuse me while I vent about Data I/O & Abel...
912: 95/03/29: Paul Hunter: Re: Excuse me while I vent about Data I/O & Abe
916: 95/03/29: William K. McFadden: Re: Excuse me while I vent about Data I/O & Abel...
919: 95/03/29: Doug Hall: Re: Excuse me while I vent about Data I/O & Abel...
921: 95/03/30: gordon hlavenka: Re: Excuse me while I vent about Data I/O & Abel...
926: 95/03/30: Doug Shade: Re: Excuse me while I vent about Data I/O & Abel...
930: 95/03/30: Tom Bowns: Re: Excuse me while I vent about Data I/O & Abel...
935: 95/03/31: Phil Ngai: Re: Excuse me while I vent about Data I/O & Abel...
978: 95/04/06: Bryan Butler: Re: Excuse me while I vent about Data I/O & Abel...
985: 95/04/07: Phil Ngai: Re: Excuse me while I vent about Data I/O & Abel...
936: 95/03/31: Trevor Hall: Re: Excuse me while I vent about Data I/O & Abel...
937: 95/03/31: Mauro Cerisola: Re: Excuse me while I vent about Data I/O & Abel...
944: 95/03/31: David W. Glessner: Data I/O & BP programmers (was Excuse me ...)
948: 95/04/01: Roger Williams: Re: Data I/O & BP programmers (was Excuse me ...)
955: 95/04/03: Ken Goldman: Re: Excuse me while I vent about Data I/O & Abel...
957: 95/04/04: Trevor Hall: Re: Excuse me while I vent about Data I/O & Abel...
960: 95/04/04: Phil Ngai: pinout changes
966: 95/04/05: Ken Goldman: Re: Excuse me while I vent about Data I/O & Abel...
972: 95/04/05: Phil Ngai: Re: Excuse me while I vent about Data I/O & Abel...
993: 95/04/10: Trevor Hall: Re: Excuse me while I vent about Data I/O & Abel...
994: 95/04/10: Trevor Hall: Re: Excuse me while I vent about Data I/O & Abel...
915: 95/03/29: Ian Packer: AT&T FPGA #6 - Application Notes
929: 95/03/30: Guy Gerard Lemieux: High-speed counters (was: AT&T FPGA #6 - Application Notes)
967: 95/04/05: William J. Wolf: Vendor Info
918: 95/03/29: stephen smith: meta-systems, who are they ?
934: 95/03/31: Mark Shand: Re: meta-systems, who are they ?
939: 95/03/31: Louis Audoire: Re: meta-systems, who are they ?
920: 95/03/30: ASM: Neocad merges with Xilinx
923: 95/03/30: Steve Guccione: Re: Neocad merges with Xilinx
941: 95/03/31: Don Gamble: Re: Neocad merges with Xilinx
924: 95/03/30: don husby: Re: Neocad merges with Xilinx
949: 95/04/01: <ksteele@cerfnet.com>: Re: Neocad merges with Xilinx
942: 95/03/31: Ian Packer: Re: Neocad merges with Xilinx
958: 95/04/04: ThomRScott: Re: Neocad merges with Xilinx
961: 95/04/04: don husby: Re: Neocad merges with Xilinx
998: 95/04/11: William J. Wolf: Re: Neocad merges with Xilinx
962: 95/04/04: Eric Coffin: Re: Neocad merges with Xilinx
1000: 95/04/11: Derek Palmer: Re: Neocad merges with Xilinx
1004: 95/04/12: Ken Goldman: Re: Neocad merges with Xilinx
1007: 95/04/13: Mircea R Stan: Re: Neocad merges with Xilinx
1044: 95/04/20: ThomRScott: Re: Neocad merges with Xilinx
1051: 95/04/21: William J. Wolf: Re: Neocad merges with Xilinx
973: 95/04/05: MARK INDOVINA Xxxxx Ppppp: Re: Neocad merges with Xilinx
922: 95/03/30: Aaron Wohl: FAQ/getting started/cheap?
931: 95/03/30: Jeffrey M. Arnold: Re: FAQ/getting started/cheap?
925: 95/03/30: Mark Snook: FPGA synthesis
927: 95/03/30: <gdk5249@vaxb.isc.rit.edu>: SIS synthesist generation
928: 95/03/30: Russ Tessier: Xilinx - NeoCad merger
938: 95/03/31: Virachat Boondharigaputra 34052027: Howto FPGA ????
940: 95/03/31: Geir Ertzaas: How do I connect an external crystal to a XC4000?
951: 95/04/02: Philip Freidin: Re: How do I connect an external crystal to a XC4000?
952: 95/04/02: Vincent Rowley: Re: How do I connect an external crystal to a XC4000?
943: 95/03/31: Bob Elkind: Neocad purchased by Xilinx
945: 95/03/31: Scott Hauck: Overview of implementation technology
946: 95/03/31: Chuck Gollnick x196: NeoCad/Xilinx for AT+T ORCA users
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Compare FPGA features and resources
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