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Threads Starting May 2003
55233: 03/05/01: Michael Nicklas: mcs files
55234: 03/05/01: Uwe Bonnes: Re: mcs files
55236: 03/05/01: Michael Nicklas: Re: mcs files
55241: 03/05/01: Uwe Bonnes: Re: mcs files
55245: 03/05/02: Allan Herriman: Re: mcs files
55235: 03/05/01: Jan Panteltje: Some general questions about WebPack and debugging and logic in FPGA and layout in the chip and...
55238: 03/05/01: Jock: Schmitt Trigger an a Virtex
55247: 03/05/01: Ray Andraka: Re: Schmitt Trigger an a Virtex
55262: 03/05/01: Peter Alfke: Re: Schmitt Trigger an a Virtex
55256: 03/05/01: Jim M.: Re: Schmitt Trigger an a Virtex
55263: 03/05/01: Peter Alfke: Re: Schmitt Trigger an a Virtex
55260: 03/05/01: Peter Alfke: Re: Schmitt Trigger an a Virtex
55296: 03/05/02: Peter Alfke: Re: Schmitt Trigger an a Virtex
55445: 03/05/08: Jock: Re: Schmitt Trigger an a Virtex
55328: 03/05/04: louis: Re: Schmitt Trigger an a Virtex
55240: 03/05/01: frank: programmable oscillators
55261: 03/05/01: Peter Alfke: Re: programmable oscillators
55264: 03/05/02: Peter Waldeck: Re: programmable oscillators
55248: 03/05/01: Michael Attenborough: ModelSim 5.4d eats up memory as the simulation progresses
55251: 03/05/02: Allan Herriman: Re: ModelSim 5.4d eats up memory as the simulation progresses
55440: 03/05/08: Michael Attenborough: Re: ModelSim 5.4d eats up memory as the simulation progresses
55442: 03/05/08: Allan Herriman: Re: ModelSim 5.4d eats up memory as the simulation progresses
55253: 03/05/01: Atif Zafar: MJL Stratix Dev Kit
55310: 03/05/03: Ziad Abu-Lebdeh: Re: MJL Stratix Dev Kit
55366: 03/05/05: Atif Zafar: Re: MJL Stratix Dev Kit
55387: 03/05/06: Jim M.: Re: MJL Stratix Dev Kit
55494: 03/05/09: Atif Zafar: Re: MJL Stratix Dev Kit
55576: 03/05/12: H. Peter Anvin: Re: MJL Stratix Dev Kit
55639: 03/05/14: H. Peter Anvin: Re: MJL Stratix Dev Kit
55266: 03/05/02: Mark Dixon: SPI-4.2 dynamic alignment - how'd they do that?
55283: 03/05/02: Vaughn Betz: Re: SPI-4.2 dynamic alignment - how'd they do that?
55285: 03/05/02: Austin Lesea: Re: SPI-4.2 dynamic alignment - how'd they do that?
55268: 03/05/02: hits: Carry skip adder implementation in FPGAs
55269: 03/05/02: Ching Wang: IP Core for CAN communication
55276: 03/05/02: Jianyong Niu: Re: IP Core for CAN communication
55280: 03/05/02: Giuseppeł: Re: IP Core for CAN communication
55287: 03/05/02: Spam Hater: Re: IP Core for CAN communication
55289: 03/05/02: Lorenzo Lutti: Re: IP Core for CAN communication
55302: 03/05/02: Ching Wang: Re: IP Core for CAN communication
55273: 03/05/02: Jim Granville: Thermal Data for Logic Devices
55291: 03/05/02: Peter Alfke: Re: Thermal Data for Logic Devices
55292: 03/05/02: Glen Herrmannsfeldt: Re: Thermal Data for Logic Devices
55299: 03/05/02: Ray Andraka: Re: Thermal Data for Logic Devices
55323: 03/05/04: Glen Herrmannsfeldt: Re: Thermal Data for Logic Devices
55353: 03/05/05: Ray Andraka: Re: Thermal Data for Logic Devices
55396: 03/05/06: Glen Herrmannsfeldt: Re: Thermal Data for Logic Devices
55400: 03/05/06: Ray Andraka: Re: Thermal Data for Logic Devices
55293: 03/05/03: Jim Granville: Re: Thermal Data for Logic Devices
55295: 03/05/02: Peter Alfke: Re: Thermal Data for Logic Devices
55275: 03/05/02: Jan Panteltje: I want a 800 k gates FPGA in 40 pin DIL
55277: 03/05/02: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55294: 03/05/02: Jan Panteltje: Re: I want a 800 k gates FPGA in 40 pin DIL
55298: 03/05/02: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55319: 03/05/03: Jan Panteltje: Re: I want a 800 k gates FPGA in 40 pin DIL
55301: 03/05/02: Peter Alfke: Re: I want a 800 k gates FPGA in 40 pin DIL
55314: 03/05/03: Rene Tschaggelar: Re: I want a 800 k gates FPGA in 40 pin DIL
55315: 03/05/03: Bob Perlman: Re: I want a 800 k gates FPGA in 40 pin DIL
55316: 03/05/03: Rene Tschaggelar: Re: I want a 800 k gates FPGA in 40 pin DIL
56305: 03/06/02: JoeG: Re: I want a 800 k gates FPGA in 40 pin DIL
55318: 03/05/03: Jan Panteltje: Re: I want a 800 k gates FPGA in 40 pin DIL
55470: 03/05/09: kryten_droid: Re: I want a 800 k gates FPGA in 40 pin DIL
55519: 03/05/11: Jan Panteltje: Re: I want a 800 k gates FPGA in 40 pin DIL
55279: 03/05/02: Ben Jackson: Re: I want a 800 k gates FPGA in 40 pin DIL
55297: 03/05/02: Rene Tschaggelar: Re: I want a 800 k gates FPGA in 40 pin DIL
55317: 03/05/03: Jan Panteltje: Re: I want a 800 k gates FPGA in 40 pin DIL
55397: 03/05/06: Torquemada: Re: I want a 800 k gates FPGA in 40 pin DIL
55398: 03/05/06: Uwe Bonnes: Re: I want a 800 k gates FPGA in 40 pin DIL
55399: 03/05/07: Jim Granville: Re: I want a 800 k gates FPGA in 40 pin DIL
55435: 03/05/08: Jim Granville: Re: I want a 800 k gates FPGA in 40 pin DIL
55403: 03/05/06: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55404: 03/05/06: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55406: 03/05/07: Torquemada: Re: I want a 800 k gates FPGA in 40 pin DIL
55420: 03/05/07: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55430: 03/05/07: Torquemada: Re: I want a 800 k gates FPGA in 40 pin DIL
55433: 03/05/08: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55454: 03/05/08: Torquemada: Re: I want a 800 k gates FPGA in 40 pin DIL
55456: 03/05/08: Ray Andraka: Re: I want a 800 k gates FPGA in 40 pin DIL
55462: 03/05/09: Hal Murray: Re: I want a 800 k gates FPGA in 40 pin DIL
55739: 03/05/18: Tim: Mini solder masks - was Re: I want a 800 k gates FPGA in 40 pin DIL
55749: 03/05/18: Uwe Bonnes: Re: Mini solder masks - was Re: I want a 800 k gates FPGA in 40 pin DIL
55300: 03/05/02: Tullio Grassi: Virtex2 BUFGMUX problem ?
55355: 03/05/05: Magnus Homann: Re: Virtex2 BUFGMUX problem ?
55357: 03/05/05: Austin Lesea: Re: Virtex2 BUFGMUX problem ?
55306: 03/05/03: ah: use of DRAM as massive FIFO
55308: 03/05/03: Falk Brunner: Re: use of DRAM as massive FIFO
55309: 03/05/03: dave garnett: Re: use of DRAM as massive FIFO
55313: 03/05/03: Paul Baxter: Re: use of DRAM as massive FIFO
55392: 03/05/06: Antonio Pasini: Re: use of DRAM as massive FIFO
55394: 03/05/06: emanuel stiebler: Re: use of DRAM as massive FIFO
55335: 03/05/04: rickman: Re: use of DRAM as massive FIFO
55391: 03/05/06: Antonio Pasini: Re: use of DRAM as massive FIFO
55393: 03/05/06: CB: Re: use of DRAM as massive FIFO
55427: 03/05/07: Antonio Pasini: Re: use of DRAM as massive FIFO
55307: 03/05/03: LIJO: Cadence NCSIm Vs NCSim Desktop Vs Modelsim Vs VCS
55320: 03/05/03: cfk: 802.11
55324: 03/05/04: Eric Smith: Re: 802.11
55331: 03/05/04: cfk: Re: 802.11
55338: 03/05/04: Hal Murray: Microcode in FPGAs (was 802.11)
55358: 03/05/05: Mike Treseler: Re: 802.11
55364: 03/05/06: cfk: Re: 802.11
55321: 03/05/04: Hal Murray: PLL chips
55325: 03/05/04: Eric Smith: Re: PLL chips
55327: 03/05/04: Michael S: Re: PLL chips
55402: 03/05/06: John_H: Re: PLL chips
55330: 03/05/05: Allan Herriman: Re: PLL chips
55334: 03/05/04: Falk Brunner: Re: PLL chips
55339: 03/05/04: Rene Tschaggelar: Re: PLL chips
55342: 03/05/04: Rene Tschaggelar: Re: PLL chips
55343: 03/05/05: Jim Granville: Re: PLL chips
55345: 03/05/04: Jake Janovetz: Re: PLL chips
55349: 03/05/05: Andras Tantos: Re: PLL chips
55410: 03/05/07: Hal Murray: Re: PLL chips
55411: 03/05/07: Jim Granville: Re: PLL chips
55424: 03/05/07: Larry Doolittle: Re: PLL chips
55326: 03/05/04: Martin Schoeberl: Output switching time
55350: 03/05/05: Martin Schoeberl: Re: Output switching time
55354: 03/05/05: Peter Alfke: Re: Output switching time
55356: 03/05/05: Martin Schoeberl: Re: Output switching time
55361: 03/05/05: Falk Brunner: Re: Output switching time
55362: 03/05/05: Austin Lesea: Re: Output switching time
55370: 03/05/06: Martin Schoeberl: Re: Output switching time
55384: 03/05/06: Austin Lesea: Re: Output switching time
55368: 03/05/05: Greg Steinke: Re: Output switching time
55371: 03/05/06: Martin Schoeberl: Re: Output switching time
55385: 03/05/06: Austin Lesea: Re: Output switching time
55719: 03/05/16: Greg Steinke: Re: Output switching time
55720: 03/05/16: Peter Alfke: Re: Output switching time
55729: 03/05/17: Martin Schoeberl: Re: Output switching time
55770: 03/05/19: Martin Schoeberl: Re: Output switching time
55780: 03/05/19: Glen Herrmannsfeldt: Re: Output switching time
55728: 03/05/17: Martin Schoeberl: Re: Output switching time
55765: 03/05/19: Austin Lesea: Re: Output switching time
55815: 03/05/20: Greg Steinke: Re: Output switching time
55329: 03/05/04: Ben Jackson: cable length on homemade Parallel Cable III
55332: 03/05/04: Duane Clark: Re: cable length on homemade Parallel Cable III
55333: 03/05/04: Falk Brunner: Re: cable length on homemade Parallel Cable III
55360: 03/05/05: Falk Brunner: Re: cable length on homemade Parallel Cable III
55336: 03/05/04: Laurent Gauch, Amontec: Re: cable length on homemade Parallel Cable III
55337: 03/05/04: FPGA user: LPM_ROM problem with Altera EP1K50 parts
55359: 03/05/05: Mike Treseler: Re: LPM_ROM problem with Altera EP1K50 parts
55365: 03/05/06: Paul Leventis: Re: LPM_ROM problem with Altera EP1K50 parts
55479: 03/05/09: Mike Treseler: Re: LPM_ROM problem with Altera EP1K50 parts
55412: 03/05/07: Ian McCrum, MI5AFL: Re: LPM_ROM problem with Altera EP1K50 parts
55431: 03/05/07: FPGA user: Re: LPM_ROM problem with Altera EP1K50 parts
55453: 03/05/08: Ben Twijnstra: Re: LPM_ROM problem with Altera EP1K50 parts
55340: 03/05/04: paraag: materail needed on Dynamic Reconfiguration of IP core
55344: 03/05/04: Domagoj: buffering
55369: 03/05/05: John_H: Re: buffering
55347: 03/05/05: Joona R: Ibis for Cyclone?
55363: 03/05/05: Ben Twijnstra: Re: Ibis for Cyclone?
55372: 03/05/06: Joona R: Re: Ibis for Cyclone?
55374: 03/05/06: Martin Schoeberl: Re: Ibis for Cyclone?
55383: 03/05/06: Ljubisa Bajic: Re: Ibis for Cyclone?
55388: 03/05/06: Martin Schoeberl: Re: Ibis for Cyclone?
55367: 03/05/05: Greg Steinke: Re: Ibis for Cyclone?
55373: 03/05/06: Joona R: Re: Ibis for Cyclone?
55348: 03/05/05: sudip saha: PLL in fpga
55351: 03/05/05: Austin Lesea: Re: PLL in fpga
55544: 03/05/12: Jochen Frensch: Re: PLL in fpga
55550: 03/05/12: Austin Lesea: Re: PLL in fpga
55375: 03/05/06: Andreas Wortmann: Xilinx VirtexII Pro Rocket-IO
55378: 03/05/06: Martin Kellermann: Re: Xilinx VirtexII Pro Rocket-IO
55380: 03/05/06: Josh Model: Re: Xilinx VirtexII Pro Rocket-IO--Power
55437: 03/05/08: Martin Kellermann: Re: Xilinx VirtexII Pro Rocket-IO--Power
55401: 03/05/06: Vikram: Re: Xilinx VirtexII Pro Rocket-IO
55460: 03/05/09: Steve Casselman: Re: Xilinx VirtexII Pro Rocket-IO
55377: 03/05/06: Mikhail: flash-disk
55382: 03/05/06: Michael Condon: Re: flash-disk
55416: 03/05/07: Mikhail: Re: flash-disk
55436: 03/05/08: David Kinsell: Re: flash-disk
59287: 03/08/14: Kevin Kilzer: Re: flash-disk
55381: 03/05/06: naveen: ROVING STARS
55389: 03/05/06: RM: xilinx area measure?
55395: 03/05/06: Ray Andraka: Re: xilinx area measure?
55405: 03/05/06: Amy Mitby: Functional simulation model for SelectMAP and/or System ACE MPU port
55408: 03/05/06: Frank Martinez: Xilinx XC4000 slave serial programming Q
55413: 03/05/07: Ken: OT: looking for I/Q mixers/modulators for TX and RX
55414: 03/05/07: Leon Heller: Re: looking for I/Q mixers/modulators for TX and RX
55421: 03/05/07: Ray Andraka: Re: OT: looking for I/Q mixers/modulators for TX and RX
55422: 03/05/07: Ken: Re: OT: looking for I/Q mixers/modulators for TX and RX
55423: 03/05/07: Brad Eckert: Re: OT: looking for I/Q mixers/modulators for TX and RX
55415: 03/05/07: Ondrej Zoubek: Problem erasing Coolrunner
55428: 03/05/07: Laurent Gauch, Amontec: Re: Problem erasing Coolrunner
55425: 03/05/07: Lorenzo Lutti: Xilinx configuration flash/proms
55429: 03/05/07: Peter Alfke: Re: Xilinx configuration flash/proms
55444: 03/05/08: Egads: Re: Xilinx configuration flash/proms
55455: 03/05/08: Peter Alfke: Re: Xilinx configuration flash/proms
55505: 03/05/10: Lorenzo Lutti: Re: Xilinx configuration flash/proms
55434: 03/05/08: Dennis Maasbommel: Modelsim generating (Sigsegv BadPointer Access)-error on winXP
55443: 03/05/08: Hans: Re: Modelsim generating (Sigsegv BadPointer Access)-error on winXP
55438: 03/05/08: Gerald Bretschneider: Design Protection Spartan2
55448: 03/05/08: Nicholas C. Weaver: Re: Design Protection Spartan2
55439: 03/05/08: Joachim: SystemC and Virtex-E
55452: 03/05/08: Lina: Re: SystemC and Virtex-E
55441: 03/05/08: Mario Trams: Re: Software and hardware monopoly is bad
55446: 03/05/08: Harald: FPGA Design with Protel DXP
55451: 03/05/08: Rene Tschaggelar: Re: FPGA Design with Protel DXP
55447: 03/05/08: Nils Petter Vaskinn: Re: Software and hardware monopoly is bad
55449: 03/05/08: Jim Stewart: Re: Software and hardware monopoly is bad
55450: 03/05/08: Dragan Cvetkovic: Re: Software and hardware monopoly is bad
55457: 03/05/08: kris: accurate power measurements
55458: 03/05/09: Ray Andraka: Re: accurate power measurements
55459: 03/05/09: Hal Murray: Re: accurate power measurements
55463: 03/05/08: kris: Re: accurate power measurements
55466: 03/05/09: Hal Murray: Re: accurate power measurements
55461: 03/05/08: JDS: Missing App Notes
55606: 03/05/13: Marc Baker: Re: Missing App Notes
55464: 03/05/08: rickman: Price of CPLDs
55465: 03/05/09: Jim Granville: Re: Price of CPLDs
55486: 03/05/09: rickman: Re: Price of CPLDs
55488: 03/05/10: Jim Granville: Re: Price of CPLDs
55498: 03/05/10: rickman: Re: Price of CPLDs
55552: 03/05/12: Jim Stewart: Re: Price of CPLDs
55481: 03/05/09: Falk Brunner: Re: Price of CPLDs
55467: 03/05/08: Bobby Sardana: [Altera or Xilinx] Questions
55468: 03/05/09: Mario Trams: Re: [Altera or Xilinx] Questions
55469: 03/05/09: JP Nicholls: Encrypted bitstream - battery lifetime problem
55475: 03/05/09: Willem Oosthuizen: Re: Encrypted bitstream - battery lifetime problem
55478: 03/05/09: Ian Stirling: Re: Encrypted bitstream - battery lifetime problem
55485: 03/05/09: Mike Treseler: Re: Encrypted bitstream - battery lifetime problem
55489: 03/05/09: Austin Lesea: Re: Encrypted bitstream - battery lifetime solved
55497: 03/05/10: Simon Peacock: Re: Encrypted bitstream - battery lifetime solved
55518: 03/05/11: Falk Brunner: Re: Encrypted bitstream - battery lifetime solved
55500: 03/05/10: Falk Brunner: Re: Encrypted bitstream - battery lifetime solved
55491: 03/05/09: Peter Alfke: Re: Encrypted bitstream - battery lifetime problem
55492: 03/05/10: Steve Casselman: Re: Encrypted bitstream - battery lifetime problem
55516: 03/05/11: Austin Lesea: Re: Encrypted bitstream - battery lifetime problem
55501: 03/05/10: rickman: Re: Encrypted bitstream - battery lifetime problem
55502: 03/05/10: Peter Wallace: Re: Encrypted bitstream - battery lifetime problem
55503: 03/05/10: Nicholas C. Weaver: Re: Encrypted bitstream - battery lifetime problem
55517: 03/05/11: Austin Lesea: Re: Encrypted bitstream - battery lifetime problem
55471: 03/05/09: Ben Jackson: variable clock source for CPLD, PIC
55472: 03/05/09: Mario Trams: Re: variable clock source for CPLD, PIC
55473: 03/05/09: Giando: Info about development kit
55474: 03/05/09: Alex Gibson: Re: Info about development kit
55477: 03/05/09: Martin Schoeberl: Re: Info about development kit
55483: 03/05/09: Philip Freidin: Re: Info about development kit
55531: 03/05/12: Steve Casselman: Re: Info about development kit
55476: 03/05/09: Wolfgang Schmiesing: help on FPGA-programming tutorial for students
55480: 03/05/09: Falk Brunner: Re: help on FPGA-programming tutorial for students
55482: 03/05/09: Philip Freidin: Re: help on FPGA-programming tutorial for students
55484: 03/05/09: Mike Treseler: Re: help on FPGA-programming tutorial for students
55490: 03/05/09: Peter Alfke: Re: help on FPGA-programming tutorial for students
55496: 03/05/10: Alex Gibson: Re: help on FPGA-programming tutorial for students
55504: 03/05/10: Eric Crabill: Re: help on FPGA-programming tutorial for students
55507: 03/05/10: Philip Freidin: Re: help on FPGA-programming tutorial for students
55526: 03/05/12: Ralph Mason: Re: help on FPGA-programming tutorial for students
55527: 03/05/11: Eric Crabill: Re: help on FPGA-programming tutorial for students
55529: 03/05/12: Hal Murray: Re: help on FPGA-programming tutorial for students
55493: 03/05/10: DANFuboco: Xilinx parts listed on ebay..
55510: 03/05/11: chris: Re: Xilinx parts listed on ebay..
55495: 03/05/09: karthik: global buffer and the dll
55499: 03/05/10: Gilad Cohen: Re: global buffer and the dll
55506: 03/05/10: Avrum: Re: global buffer and the dll
55508: 03/05/11: lc: Altera Flex EPF81188A
55509: 03/05/11: Oleksandr Redchuk: Re: Altera Flex EPF81188A
55515: 03/05/11: Michael S: Re: Altera Flex EPF81188A
55524: 03/05/12: lc: Re: Altera Flex EPF81188A
55530: 03/05/12: lc: Re: Altera Flex EPF81188A
55511: 03/05/11: Kyle Davis: PacMan game in FPGA
55512: 03/05/11: Paul Baxter: Re: PacMan game in FPGA
55513: 03/05/11: Paul Hartke: Re: PacMan game in FPGA
55522: 03/05/11: Wil Limbacher: Re: PacMan game in FPGA
55545: 03/05/12: Dave Vanden Bout: Re: PacMan game in FPGA
55556: 03/05/12: Wil Limbacher: Re: PacMan game in FPGA
55514: 03/05/11: tsj: where to buy 1 virtex-e fg680
55533: 03/05/12: Peter Rauschert: Re: where to buy 1 virtex-e fg680
55543: 03/05/12: Ray Andraka: Re: where to buy 1 virtex-e fg680
55520: 03/05/11: Jan Panteltje: Confused about timing report in clock doubler in XST
55521: 03/05/11: Gorgo: Information about XC9536 ?
55523: 03/05/11: Karl Olsen: Re: Information about XC9536 ?
55525: 03/05/11: Spam Hater: Re: Information about XC9536 ?
55528: 03/05/12: pc: QuartusII issue
55546: 03/05/12: Ruth: Re: QuartusII issue
55568: 03/05/13: pc: Re: QuartusII issue
55571: 03/05/13: Subroto Datta: Re: QuartusII issue
55532: 03/05/12: geeko: wire and reg and modelling of combinational logic
55713: 03/05/16: Stefaan Vanheesbeke: Re: wire and reg and modelling of combinational logic
55736: 03/05/18: doh.....: Re: wire and reg and modelling of combinational logic
55534: 03/05/11: Vlsi Champ: Xilinx : Tools
55540: 03/05/12: Neeraj Varma: Re: Xilinx : Tools
55547: 03/05/12: Leon Heller: Re: Xilinx : Tools
55535: 03/05/12: John Daae: Exploting the DDR input registers in Virtex2
55554: 03/05/12: Avrum: Re: Exploting the DDR input registers in Virtex2
55573: 03/05/12: Marc Randolph: Re: Exploting the DDR input registers in Virtex2
55581: 03/05/13: Avrum: Re: Exploting the DDR input registers in Virtex2
55656: 03/05/15: John Daae: Re: Exploting the DDR input registers in Virtex2
55708: 03/05/16: Michael Rhotert: Re: Exploting the DDR input registers in Virtex2
55756: 03/05/19: John Daae: Re: Exploting the DDR input registers in Virtex2
55536: 03/05/12: Jon Masters: MMIX Implementation
55537: 03/05/12: Jens Nowack: Register in FPGA
55539: 03/05/12: Mario Trams: Re: Register in FPGA
55541: 03/05/12: Ray Andraka: Re: Register in FPGA
55855: 03/05/21: Charles Krinke: Re: Register in FPGA
55538: 03/05/12: Markus Meng: CRC Generator for 6Byte serial Transmission
55542: 03/05/12: Peter Rauschert: Re: CRC Generator for 6Byte serial Transmission
55548: 03/05/12: Marc Randolph: Re: CRC Generator for 6Byte serial Transmission
55549: 03/05/12: Jan Panteltje: OK I am pissed off with Xilinx webpack.
55551: 03/05/12: Austin Lesea: Re: OK I am pissed off with Xilinx webpack.
55553: 03/05/12: Chen Wei Tseng: Re: OK I am pissed off with Xilinx webpack.
55557: 03/05/12: Theron Hicks: Re: OK I am pissed off with Xilinx webpack.
55558: 03/05/12: Chen Wei Tseng: Re: OK I am pissed off with Xilinx webpack.
55561: 03/05/12: Austin Lesea: Re: OK I am pissed off with Xilinx webpack.
55559: 03/05/12: Uwe Bonnes: Re: OK I am pissed off with Xilinx webpack.
55560: 03/05/12: Ray Andraka: Re: OK I am pissed off with Xilinx webpack.
55596: 03/05/13: Jan Panteltje: Re: OK I am pissed off with Xilinx webpack.
55600: 03/05/13: Peter Alfke: Re: OK I am pissed off with Xilinx webpack.
55636: 03/05/14: Stephen Williams: Re: OK I am pissed off with Xilinx webpack.
55617: 03/05/14: Ray Andraka: Re: OK I am pissed off with Xilinx webpack.
55634: 03/05/14: Steve Lass: Re: OK I am pissed off with Xilinx webpack.
55637: 03/05/14: Thomas Heller: Re: OK I am pissed off with Xilinx webpack.
55642: 03/05/14: Steve Lass: Re: OK I am pissed off with Xilinx webpack.
55644: 03/05/15: Jim Granville: Re: OK I am pissed off with Xilinx webpack.
55646: 03/05/14: Jan Panteltje: Re: OK I am pissed off with Xilinx webpack.
55563: 03/05/12: Bill Hanna: Re: OK I am pissed off with Xilinx webpack.
55575: 03/05/13: Ken McElvain: Re: OK I am pissed off with Xilinx webpack.
55578: 03/05/13: Ralph Mason: Re: OK I am pissed off with Xilinx webpack.
55584: 03/05/13: Ken McElvain: Re: OK I am pissed off with Xilinx webpack.
55588: 03/05/13: Mike Treseler: Re: OK I am pissed off with Xilinx webpack.
55590: 03/05/13: Ken McElvain: Re: OK I am pissed off with Xilinx webpack.
55707: 03/05/16: Bret Wade: Re: OK I am pissed off with Xilinx webpack.
55718: 03/05/16: Jan Panteltje: Re: OK I am pissed off with Xilinx webpack.
55817: 03/05/20: Bret Wade: Re: OK I am pissed off with Xilinx webpack.
55829: 03/05/20: Jan Panteltje: Re: OK I am pissed off with Xilinx webpack.
55555: 03/05/12: Paolo Tardivel: ModelSim and Specman: on the fly generation
57334: 03/06/27: Jonathan Bromley: Re: ModelSim and Specman: on the fly generation
55562: 03/05/12: Francisco Rodriguez: How do I know of Xilinx connectivity restrictions?
55564: 03/05/12: Nicholas C. Weaver: Re: How do I know of Xilinx connectivity restrictions?
55566: 03/05/12: Ray Andraka: Re: How do I know of Xilinx connectivity restrictions?
55591: 03/05/13: Francisco Rodriguez: Re: How do I know of Xilinx connectivity restrictions?
55565: 03/05/12: rickman: Atmel, just another case of bad support?
55570: 03/05/13: Jim Granville: Re: Atmel, just another case of bad support?
55574: 03/05/13: rickman: Re: Atmel, just another case of bad support?
55577: 03/05/13: Jim Granville: Re: Atmel, just another case of bad support?
55567: 03/05/12: Maciej (@): GSR
55569: 03/05/12: Wong: VitalGlitch
55589: 03/05/13: Mike Treseler: Re: VitalGlitch
55608: 03/05/13: Wong: Re: VitalGlitch
55626: 03/05/14: Mike Treseler: Re: VitalGlitch
55632: 03/05/14: Muzaffer Kal: Re: VitalGlitch
55652: 03/05/14: Wong: Re: VitalGlitch
55676: 03/05/15: Mike Treseler: Re: VitalGlitch
55698: 03/05/15: Wong: Re: VitalGlitch
55702: 03/05/16: Ray Andraka: Re: VitalGlitch
55654: 03/05/14: Wong: Re: VitalGlitch
55572: 03/05/13: Kyle Davis: Xilinx ISE Student Edition
55579: 03/05/13: Toby: Ramb16_s18_s18
55580: 03/05/13: Peter Sommerfeld: Altera SignalTap and Incremental Route
55582: 03/05/13: Jimmy: CLK_SIGNAL CONSTRAINT
55587: 03/05/13: Mike Treseler: Re: CLK_SIGNAL CONSTRAINT
55614: 03/05/14: Jimmy: Re: CLK_SIGNAL CONSTRAINT
55628: 03/05/14: Mike Treseler: Re: CLK_SIGNAL CONSTRAINT
55585: 03/05/13: Rick HORMIGO: Spartan 3 Power requirements
55586: 03/05/13: Austin Lesea: Re: Spartan 3 Power requirements
55592: 03/05/13: Rick HORMIGO: Re: Spartan 3 Power requirements
55593: 03/05/13: =?ISO-8859-1?Q?Eduardo_Wenzel_Bri=E3o?=: Problems with Leonardo Spectrum
55595: 03/05/13: Mike Treseler: Re: Problems with Leonardo Spectrum
55630: 03/05/14: Mike Treseler: Re: Problems with Leonardo Spectrum
55594: 03/05/13: Gorgo: XC9536 - how to make my own programing device for this chip ?
55597: 03/05/13: Bertram Geiger: Re: XC9536 - how to make my own programing device for this chip ?
55599: 03/05/13: Ben Jackson: Re: XC9536 - how to make my own programing device for this chip ?
55619: 03/05/14: Valerio Gionco: Re: XC9536 - how to make my own programing device for this chip ?
55629: 03/05/14: Kolja Sulimma: Re: XC9536 - how to make my own programing device for this chip ?
55664: 03/05/15: Valerio Gionco: Re: XC9536 - how to make my own programing device for this chip ?
55598: 03/05/13: Michael Bills: Spartan3 DLL?
55601: 03/05/13: Nicholas C. Weaver: Re: Spartan3 DLL?
55603: 03/05/13: Vikram Pasham: Re: Spartan3 DLL?
55604: 03/05/13: Uwe Bonnes: Re: Spartan3 DLL?
55607: 03/05/14: Nicholas C. Weaver: Re: Spartan3 DLL?
55662: 03/05/15: Luiz Carlos: Re: Spartan3 DLL?
55605: 03/05/13: Richard Erlacher: CollRunner-II EVB problems
55635: 03/05/14: Mark Ng: Re: CollRunner-II EVB problems
55683: 03/05/15: Richard Erlacher: Re: CollRunner-II EVB problems
55685: 03/05/16: Jim Granville: Re: CollRunner-II EVB problems
55686: 03/05/15: Uwe Bonnes: Re: CollRunner-II EVB problems
55821: 03/05/20: Richard Erlacher: Re: CollRunner-II EVB problems
55609: 03/05/13: Tempe Dele: Xilinx Coregen FFT64
55625: 03/05/14: Sandeep: Re: Xilinx Coregen FFT64
55610: 03/05/13: Jake Janovetz: "Primitives" in XST?
55612: 03/05/13: Pete Dudley: Re: "Primitives" in XST?
55620: 03/05/14: Jake Janovetz: Re: "Primitives" in XST?
55624: 03/05/14: Ray Andraka: Re: "Primitives" in XST?
55667: 03/05/15: Jake Janovetz: Re: "Primitives" in XST?
55622: 03/05/14: Chen Wei Tseng: Re: "Primitives" in XST?
55638: 03/05/14: Stephen Williams: Re: "Primitives" in XST?
55611: 03/05/14: John Williams: EDK under linux/wine - xflow problem
55613: 03/05/14: Uwe Bonnes: Re: EDK under linux/wine - xflow problem
55647: 03/05/15: John Williams: Re: EDK under linux/wine - xflow problem
55648: 03/05/15: John Williams: Re: EDK under linux/wine - xflow problem
55657: 03/05/15: Uwe Bonnes: Re: EDK under linux/wine - xflow problem
55615: 03/05/14: Yu Haiwen: Can XST takes place of Synplify or FPGA Compiler?
55627: 03/05/14: Ken McElvain: Re: Can XST takes place of Synplify or FPGA Compiler?
55633: 03/05/14: Austin Lesea: Re: Can XST takes place of Synplify or FPGA Compiler? "No" FAQ #3.
55669: 03/05/15: Spam Hater: Re: Can XST takes place of Synplify or FPGA Compiler?
55616: 03/05/14: praveen: how to calculate the gate count required for a FPGA design
55618: 03/05/14: Ray Andraka: Re: how to calculate the gate count required for a FPGA design
55621: 03/05/14: Michael S: Re: how to calculate the gate count required for a FPGA design
55640: 03/05/14: H. Peter Anvin: Re: how to calculate the gate count required for a FPGA design
55641: 03/05/14: Ray Andraka: Re: how to calculate the gate count required for a FPGA design
55643: 03/05/15: Jim Granville: Re: how to calculate the gate count required for a FPGA design
55651: 03/05/14: H. Peter Anvin: Re: how to calculate the gate count required for a FPGA design
55650: 03/05/15: Hal Murray: Re: how to calculate the gate count required for a FPGA design
55663: 03/05/15: Ray Andraka: Re: how to calculate the gate count required for a FPGA design
55653: 03/05/15: Nicholas C. Weaver: Re: how to calculate the gate count required for a FPGA design
55665: 03/05/15: Ray Andraka: Re: how to calculate the gate count required for a FPGA design
55623: 03/05/14: Tom Hawkins: Re: LDPC Code implmentation using XILINX Vertex
55631: 03/05/14: Ewerson Carvalho: deficiency ICAP information.
55645: 03/05/14: el cintura partida: Error in the Simulation with Xilinx ISE 4.1.
55649: 03/05/15: Basuki Endah Priyanto: Re: Xilinx Coregen FFT64
55798: 03/05/20: Tempe Dele: Re: Xilinx Coregen FFT64
55655: 03/05/14: john paul: multiplexing resources in xilinx fpga
55659: 03/05/15: Philip Freidin: Re: multiplexing resources in xilinx fpga
55668: 03/05/15: Ken McElvain: Re: multiplexing resources in xilinx fpga
55658: 03/05/15: LIJO: Moore Vs Mealy machine ..
55671: 03/05/15: Spam Hater: Re: Moore Vs Mealy machine ..
55673: 03/05/15: Eric Bohlman: Re: Moore Vs Mealy machine ..
55950: 03/05/24: rickman: Re: Moore Vs Mealy machine ..
56109: 03/05/28: Mike Treseler: Re: Moore Vs Mealy machine ..
56119: 03/05/28: rickman: Re: Moore Vs Mealy machine ..
56157: 03/05/29: Mike Treseler: Re: Moore Vs Mealy machine ..
56159: 03/05/29: rickman: Re: Moore Vs Mealy machine ..
55674: 03/05/15: Mike Treseler: Re: Moore Vs Mealy machine ..
55700: 03/05/16: Jussi =?ISO-8859-1?Q?L=E4hteenm=E4ki?=: Re: Moore Vs Mealy machine ..
55704: 03/05/16: Rgr: Re: Moore Vs Mealy machine ..
55711: 03/05/16: Mike Treseler: Re: Moore Vs Mealy machine ..
55725: 03/05/17: Alexander Gnusin: Re: Moore Vs Mealy machine ..
55660: 03/05/15: Isabel: Do Service Pack of Xilinx really fixed the problems?
55678: 03/05/15: Jon Beniston: Re: Do Service Pack of Xilinx really fixed the problems?
55661: 03/05/15: Markus Meng: [Q] HowTo Speed Constraint Multiple Clock Constraints for Spartan-II
55666: 03/05/15: Luigi: Doubling data output without DRR banks and without double clock frequency
55675: 03/05/15: CC Nguyen: Re: Doubling data output without DRR banks and without double clock frequency
55679: 03/05/15: Lis Hu: Large Fifos
55680: 03/05/15: Peter Alfke: Re: Large Fifos
55689: 03/05/15: lc: smallest embedded cpu.
55691: 03/05/15: Peter C. Wallace: Re: smallest embedded cpu.
55752: 03/05/18: Nial Stewart: Re: smallest embedded cpu.
55754: 03/05/18: Peter Wallace: Re: smallest embedded cpu.
55809: 03/05/20: Kolja Sulimma: Re: smallest embedded cpu.
55692: 03/05/15: Goran Bilski: Re: smallest embedded cpu.
55694: 03/05/16: Ben Jackson: Re: smallest embedded cpu.
55697: 03/05/16: Ralph Mason: Re: smallest embedded cpu.
55699: 03/05/16: Jim Granville: Re: smallest embedded cpu.
55706: 03/05/16: Mario Trams: Re: smallest embedded cpu.
55714: 03/05/17: Ralph Mason: Re: smallest embedded cpu.
55716: 03/05/16: Mario Trams: Re: smallest embedded cpu.
55717: 03/05/17: M.Randelzhofer: Re: smallest embedded cpu.
55695: 03/05/16: Ralph Mason: Re: smallest embedded cpu.
55710: 03/05/16: Hal Murray: Re: smallest embedded cpu.
55715: 03/05/16: Peter Alfke: Re: smallest embedded cpu.
55701: 03/05/16: Herbert Kleebauer: Re: smallest embedded cpu.
55703: 03/05/16: rickman: Re: smallest embedded cpu.
55712: 03/05/16: Austin Lesea: Re: smallest embedded cpu....and the most pain?
55746: 03/05/18: Jan Gray: Re: smallest embedded cpu....and the most pain?
55755: 03/05/19: <invalid@invalid.com>: Re: smallest embedded cpu....and the most pain?
55758: 03/05/19: Neeraj Varma: Re: smallest embedded cpu....and the most pain?
55768: 03/05/19: Peter Alfke: Re: smallest embedded cpu....and the most pain?
55778: 03/05/19: Glen Herrmannsfeldt: Re: smallest embedded cpu....and the most pain?
55791: 03/05/19: <invalid@invalid.com>: Re: smallest embedded cpu....and the most pain?
55779: 03/05/19: Uwe Bonnes: Re: smallest embedded cpu....and the most pain?
55781: 03/05/19: Tom Hawkins: Re: smallest embedded cpu....and the most pain?
56152: 03/05/29: Hal Murray: Re: smallest embedded cpu....and the most pain?
56169: 03/05/30: Jim Granville: Re: smallest embedded cpu....and the most pain?
56174: 03/05/29: Peter Alfke: Re: smallest embedded cpu....and the most pain?
56186: 03/05/29: rickman: Re: smallest embedded cpu....and the most pain?
56193: 03/05/30: Jim Granville: Re: smallest embedded cpu....and the most pain?
56203: 03/05/30: rickman: Re: smallest embedded cpu....and the most pain?
55747: 03/05/18: Rudolf Usselmann: Re: smallest embedded cpu.
55801: 03/05/20: Leon Heller: Re: smallest embedded cpu.
55812: 03/05/20: Austin Lesea: Re: smallest embedded cpu.
55705: 03/05/16: Mark Schellhorn: Eng. samples -- differences from production?
55709: 03/05/16: Austin Lesea: Re: Eng. samples -- differences from production?
55721: 03/05/17: praveen: what and how encrypted VHDL code work
55723: 03/05/17: Muzaffer Kal: Re: what and how encrypted VHDL code work
55722: 03/05/17: praveen: test cases for testing PCI core
55724: 03/05/17: Muthu: Re: test cases for testing PCI core
55806: 03/05/20: praveen: Re: test cases for testing PCI core
55726: 03/05/17: Isabel: Urgent: About ModelSim XEII Starter
55727: 03/05/17: Falk Brunner: Re: Urgent: About ModelSim XEII Starter
55730: 03/05/17: Kyle Davis: Re: Urgent: About ModelSim XEII Starter
55731: 03/05/17: rickman: Spartan 3 availability
55732: 03/05/17: Dereck Fernandes: Place and Route tool : PAR
55733: 03/05/17: Sheldon D.: Xilinx Project Navigator in ISE 5.2i
55734: 03/05/18: Ben Jackson: Re: Xilinx Project Navigator in ISE 5.2i
55735: 03/05/18: Peng Cong: Re: Xilinx Project Navigator in ISE 5.2i
55737: 03/05/18: Greger G.: easy design implementation ic's
55738: 03/05/18: Electron: Interfacing cpld with eeprom, energy metering ic, real time clock
55745: 03/05/18: Tim Boescke: Re: Interfacing cpld with eeprom, energy metering ic, real time clock
55740: 03/05/18: Daniel Fichtner: SID chip describtion
55741: 03/05/18: Jon Beniston: Re: SID chip describtion
55744: 03/05/18: Tim Boescke: Re: SID chip describtion
55783: 03/05/19: MikeJ: Re: SID chip describtion
55784: 03/05/20: Tim Boescke: Re: SID chip describtion
55826: 03/05/20: MikeJ: Re: SID chip describtion
55828: 03/05/21: Karl de Boois: Re: SID chip describtion
55743: 03/05/18: Selenium: Altera CPLDs
55753: 03/05/18: Ben Jackson: Re: Altera CPLDs
55816: 03/05/20: Greg Steinke: Re: Altera CPLDs
55748: 03/05/18: Kevin Neilson: High-Speed Clock & Data Recovery
55797: 03/05/20: Hal Murray: Re: High-Speed Clock & Data Recovery
56084: 03/05/28: Kolja Sulimma: Re: High-Speed Clock & Data Recovery
56021: 03/05/27: Kevin Neilson: Re: High-Speed Clock & Data Recovery
56029: 03/05/27: Peter Alfke: Re: High-Speed Clock & Data Recovery
56033: 03/05/27: Ed Stevens: Re: High-Speed Clock & Data Recovery
55750: 03/05/18: Dennis Maasbommel: Modelsim generating (Sigsegv BadPointer Access)-error on winXP
55751: 03/05/18: cfk: 802.11
55757: 03/05/19: Tsvika Hirst: a (PC) workstation for FPGA development
55759: 03/05/19: Neeraj Varma: Re: a (PC) workstation for FPGA development
55761: 03/05/19: Petter Gustad: Re: a (PC) workstation for FPGA development
55766: 03/05/19: Tsvika Hirst: Re: a (PC) workstation for FPGA development
55789: 03/05/20: Ray Andraka: Re: a (PC) workstation for FPGA development
55792: 03/05/20: Hal Murray: Re: a (PC) workstation for FPGA development
55794: 03/05/20: Nicholas C. Weaver: Re: a (PC) workstation for FPGA development
55803: 03/05/20: Ray Andraka: Re: a (PC) workstation for FPGA development
55762: 03/05/19: Arash Salarian: Re: a (PC) workstation for FPGA development
55771: 03/05/19: Nicholas C. Weaver: Re: a (PC) workstation for FPGA development
55796: 03/05/20: Petter Gustad: Re: a (PC) workstation for FPGA development
55807: 03/05/20: Nicholas C. Weaver: Re: a (PC) workstation for FPGA development
55811: 03/05/20: Petter Gustad: Re: a (PC) workstation for FPGA development
55764: 03/05/19: rickman: Re: a (PC) workstation for FPGA development
55769: 03/05/19: Duane Clark: Re: a (PC) workstation for FPGA development
55776: 03/05/19: fred: Re: a (PC) workstation for FPGA development
55813: 03/05/20: Bob Perlman: Re: a (PC) workstation for FPGA development
55820: 03/05/20: Ray Andraka: Re: a (PC) workstation for FPGA development
55827: 03/05/20: Ben Twijnstra: Re: a (PC) workstation for FPGA development
55830: 03/05/21: Ray Andraka: Re: a (PC) workstation for FPGA development
55841: 03/05/21: Duane Clark: Re: a (PC) workstation for FPGA development
55890: 03/05/22: Ben Twijnstra: Re: a (PC) workstation for FPGA development
55897: 03/05/23: Ray Andraka: Re: a (PC) workstation for FPGA development
55899: 03/05/22: Duane Clark: Re: a (PC) workstation for FPGA development
55904: 03/05/23: Russell Shaw: Re: a (PC) workstation for FPGA development
55831: 03/05/20: B. Joshua Rosen: Re: a (PC) workstation for FPGA development
55835: 03/05/21: Petter Gustad: Opteron support?
55832: 03/05/20: Jake Janovetz: Re: a (PC) workstation for FPGA development
55845: 03/05/21: Ray Andraka: Re: a (PC) workstation for FPGA development
55846: 03/05/21: Duane Clark: Re: a (PC) workstation for FPGA development
55872: 03/05/22: Colin Marquardt: Re: a (PC) workstation for FPGA development
55885: 03/05/22: Ray Andraka: Re: a (PC) workstation for FPGA development
55760: 03/05/19: Petter Gustad: XILINX ISE 5.2iSP2 ngdbuild: File Pr_Logical.dfa is not found!
55763: 03/05/19: Henning Bahr: FPGA: Feasibility of Memory testing
55767: 03/05/19: Peter Alfke: Re: FPGA: Feasibility of Memory testing
55782: 03/05/19: Peter Alfke: Re: FPGA: Feasibility of Memory testing
55839: 03/05/21: Falser Klaus: Re: FPGA: Feasibility of Memory testing
55773: 03/05/19: Dave: Anyone used the CeSys USB2FPGA board
55774: 03/05/20: newbie: about simulation
55777: 03/05/19: Ralf Hildebrandt: Re: about simulation
55788: 03/05/19: Jon Beniston: Re: about simulation
55793: 03/05/20: newbie: Re: about simulation
55775: 03/05/19: ben cohen: New book on PSL/SUGAR with Verilog and VHDL
55785: 03/05/19: vicky: downloading a VHDL design on a XSV board ?
55787: 03/05/19: Jon Beniston: Re: downloading a VHDL design on a XSV board ?
55786: 03/05/19: Shalin Sheth: verilog question
55790: 03/05/20: Peng Cong: Re: verilog question
55795: 03/05/19: dipu bhaskar: 8253 vhdl code
55799: 03/05/20: Vlsi Champ: Xilinx : Tools
55808: 03/05/20: Mario Trams: Re: Xilinx : Tools
55865: 03/05/22: Robert: Re: Xilinx : Tools
55869: 03/05/22: Mario Trams: Re: Xilinx : Tools
55894: 03/05/22: Jan Panteltje: Re: Xilinx : Tools
55800: 03/05/20: Dennis Maasbommel: problem with modelsim 5.7d on winXP system
55818: 03/05/20: Jon Beniston: Re: problem with modelsim 5.7d on winXP system
55842: 03/05/21: Michael Bills: Re: problem with modelsim 5.7d on winXP system
55942: 03/05/24: Alex Gibson: Re: problem with modelsim 5.7d on winXP system
55956: 03/05/25: Alex Gibson: Re: problem with modelsim 5.7d on winXP system
55802: 03/05/20: LIJO: what are DCMs in FPGA
55804: 03/05/20: Ray Andraka: Re: what are DCMs in FPGA
55805: 03/05/20: Christian Lotze: newbie question plx9054 and memory access
55814: 03/05/20: Newsgroup: Thermal problems with large FPGA BGA's
55833: 03/05/21: Mario Trams: Re: Thermal problems with large FPGA BGA's
55819: 03/05/20: PawelT: fir distributed arithmetic
55870: 03/05/22: DAB sounds worse than FM: Re: fir distributed arithmetic
55908: 03/05/23: PawelT: Re: fir distributed arithmetic
55915: 03/05/23: DAB sounds worse than FM: Re: fir distributed arithmetic
55917: 03/05/23: PawelT: Re: fir distributed arithmetic
55974: 03/05/25: DAB sounds worse than FM: Re: fir distributed arithmetic
55992: 03/05/26: Ray Andraka: Re: fir distributed arithmetic
56000: 03/05/27: DAB sounds worse than FM: Re: fir distributed arithmetic
55822: 03/05/20: Jaap Mol: Ethernet MAC IP-core in Nios design
55823: 03/05/20: Manuel: modulators and demodulators help
55824: 03/05/20: Yevgeny K.: Using GERMS monitor with NIOS CPU on non-Altera board
55834: 03/05/21: Fredrik: Re: Using GERMS monitor with NIOS CPU on non-Altera board
55905: 03/05/22: Yevgeny K.: Re: Using GERMS monitor with NIOS CPU on non-Altera board
55911: 03/05/23: Fredrik: Re: Using GERMS monitor with NIOS CPU on non-Altera board
55923: 03/05/23: Jesse Kempa: Re: Using GERMS monitor with NIOS CPU on non-Altera board
55936: 03/05/23: Yevgeny K.: Re: Using GERMS monitor with NIOS CPU on non-Altera board
55825: 03/05/20: =?ISO-8859-1?Q?Eduardo_Wenzel_Bri=E3o?=: Modular Design: Map error
55836: 03/05/21: Christof Paar: CHES 2003: accepted papers etc.
55838: 03/05/21: Jens Nowack: Re: Register in FPGA
55840: 03/05/21: Mario Trams: Re: Register in FPGA
55843: 03/05/21: Charles Wagner: BC pipelined loop synthesis
55867: 03/05/22: Alan Fitch: Re: BC pipelined loop synthesis
55844: 03/05/21: ted: Programming Altera EPC1 and EPC1441
55868: 03/05/22: Leon Heller: Re: Programming Altera EPC1 and EPC1441
56200: 03/05/30: Antti Lukats: Re: Programming Altera EPC1 and EPC1441
55876: 03/05/22: phil: Re: Programming Altera EPC1 and EPC1441
55847: 03/05/21: Steve Casselman: Evolvable Hardware Class at UCLA
55848: 03/05/21: Johan: CLKDLL: Dividing
55866: 03/05/22: Patrik Eriksson: Re: CLKDLL: Dividing
55913: 03/05/23: Johan: Re: CLKDLL: Dividing
55900: 03/05/23: brijesh: Re: CLKDLL: Dividing
55947: 03/05/24: Markus Meng: Re: CLKDLL: Dividing
55929: 03/05/24: Ralph Mason: Re: CLKDLL: Dividing
56011: 03/05/27: Johan: Re: CLKDLL: Dividing
55849: 03/05/21: Joe Frese: FPGA design: firmware or hardware?
55850: 03/05/21: Bob Perlman: Re: FPGA design: firmware or hardware?
55852: 03/05/21: Pete Fraser: Re: FPGA design: firmware or hardware?
55853: 03/05/21: Ray Andraka: Re: FPGA design: firmware or hardware?
55854: 03/05/21: Austin Lesea: Re: FPGA design: firmware or hardware?
55858: 03/05/22: Phil Hays: Re: FPGA design: firmware or hardware?
55878: 03/05/22: Austin Lesea: Re: FPGA design: firmware or hardware?
55863: 03/05/22: Steve Casselman: Re: FPGA design: firmware or hardware?
55871: 03/05/22: Ray Andraka: Re: FPGA design: firmware or hardware?
55882: 03/05/22: Steve Casselman: Re: FPGA design: firmware or hardware?
55889: 03/05/22: Jake Janovetz: Re: FPGA design: firmware or hardware?
55898: 03/05/23: Ray Andraka: Re: FPGA design: firmware or hardware?
55918: 03/05/23: Brian: Re: FPGA design: firmware or hardware?
55920: 03/05/23: Ray Andraka: Re: FPGA design: firmware or hardware?
55922: 03/05/23: Steve Casselman: Re: FPGA design: firmware or hardware?
55934: 03/05/23: Bob Perlman: Re: FPGA design: firmware or hardware?
56028: 03/05/27: Tom Hawkins: Re: FPGA design: firmware or hardware?
56175: 03/05/29: H. Peter Anvin: Re: FPGA design: firmware or hardware?
56190: 03/05/29: rickman: Re: FPGA design: firmware or hardware?
56212: 03/05/30: H. Peter Anvin: Re: FPGA design: firmware or hardware?
56219: 03/05/31: rickman: Re: FPGA design: firmware or hardware?
56262: 03/06/01: H. Peter Anvin: Re: FPGA design: firmware or hardware?
56265: 03/06/02: rickman: Re: FPGA design: firmware or hardware?
56291: 03/06/02: H. Peter Anvin: Re: FPGA design: firmware or hardware?
56319: 03/06/03: Neeraj Varma: Re: FPGA design: firmware or hardware?
56017: 03/05/27: Hĺkon Lislebř: Re: FPGA design: firmware or hardware?
55906: 03/05/23: Simon: Re: FPGA design: firmware or hardware?
55916: 03/05/23: Ray Andraka: Re: FPGA design: firmware or hardware?
55940: 03/05/24: Simon: Re: FPGA design: firmware or hardware?
55943: 03/05/24: Martin Euredjian: Re: FPGA design: firmware or hardware?
55949: 03/05/24: Bob Perlman: Re: FPGA design: firmware or hardware?
55951: 03/05/24: Hal Murray: Re: FPGA design: firmware or hardware?
56303: 03/06/02: JoeG: Re: FPGA design: firmware or hardware?
55957: 03/05/24: Mike Butts: Re: FPGA design: firmware or hardware?
55909: 03/05/23: Kate Palmer: Re: FPGA design: firmware or hardware?
55948: 03/05/24: dasari: Re: FPGA design: firmware or hardware?
55851: 03/05/21: Paul Cousoulis: tms34010 fpga core
55859: 03/05/21: Jim Ranlett: Asynchronous State Machines and HDLs
55862: 03/05/22: Jim Granville: Re: Asynchronous State Machines and HDLs
55864: 03/05/21: Marco: Re: Asynchronous State Machines and HDLs
55873: 03/05/22: Mario Trams: Re: Asynchronous State Machines and HDLs
55875: 03/05/22: steve synakowski: Re: Asynchronous State Machines and HDLs
55881: 03/05/22: Eric Crabill: Re: Asynchronous State Machines and HDLs
55883: 03/05/22: John_H: Re: Asynchronous State Machines and HDLs
55930: 03/05/23: rickman: Re: Asynchronous State Machines and HDLs
55896: 03/05/23: David R Brooks: Re: Asynchronous State Machines and HDLs
55860: 03/05/21: Yu Haiwen: How to verify timing parameters of clock
55879: 03/05/22: Austin Lesea: Re: How to verify timing parameters of clock
55874: 03/05/22: Alphaboran: Change the value of a register in an implemented design
55884: 03/05/22: Chen Wei Tseng: Re: Change the value of a register in an implemented design
55877: 03/05/22: Vijay Pandya: Handel-C query
55886: 03/05/22: kalogera: FPGA : Partial Reconfiguration
55887: 03/05/22: Michael Bills: Spartan 3 Power up
55888: 03/05/22: Michael Bills: Re: Spartan 3 Power up
55931: 03/05/23: rickman: Re: Spartan 3 Power up
55891: 03/05/22: Klix: Nois generator - project
55895: 03/05/22: Peter Alfke: Re: Nois generator - project
55914: 03/05/23: Josh Model: Re: Nois generator - project
55921: 03/05/23: Peter Alfke: Re: Nois generator - project
55937: 03/05/23: Hal Murray: Re: Nois generator - project
55938: 03/05/23: Peter Alfke: Re: Nois generator - project
56092: 03/05/28: Tim Shoppa: Re: Nois generator - project
56097: 03/05/28: Peter Alfke: Re: Nois generator - project
56151: 03/05/29: Hal Murray: Re: Nois generator - project
55924: 03/05/23: Klix: Re: Nois generator - project
55927: 03/05/23: Peter Alfke: Re: Nois generator - project
55932: 03/05/23: Josh Model: Re: Nois generator - project
55892: 03/05/22: danyxp: FIFO with EABs in Altera MaxPlusII for Flex 10K
55893: 03/05/22: K W: Altera aquire a second DSP IP company
55901: 03/05/23: John Williams: Virtex2 DCM CLKIN_PERIOD
55926: 03/05/23: Marc Randolph: Re: Virtex2 DCM CLKIN_PERIOD
55902: 03/05/23: leon qin: New version,Low Speed
55903: 03/05/23: Paul Leventis: Re: New version,Low Speed
56144: 03/05/29: Vaughn Betz: Re: New version,Low Speed
56164: 03/05/30: Jim Granville: Re: New version,Low Speed
56231: 03/05/31: Vaughn Betz: Re: New version,Low Speed
56234: 03/05/31: rickman: Re: New version,Low Speed
56239: 03/06/01: Paul Leventis: Re: New version,Low Speed
56309: 03/06/03: Jim Granville: Re: New version,Low Speed
55928: 03/05/23: Ben Twijnstra: Re: New version,Low Speed
55907: 03/05/23: Wong: FPGA interfacing problems
55910: 03/05/23: Francisco Rodriguez: Re: Using Desigin Constraints in VHDL for Xilinx Spartan-II
55912: 03/05/23: Markus Meng: Using Desigin Constraints in VHDL for Xilinx Spartan-II
55919: 03/05/23: delahaye: Constant on Multiplier Synthesis problem with XST for VirteX 2/E
56698: 03/06/11: Jaap Mol: Re: Constant on Multiplier Synthesis problem with XST for VirteX 2/E
55925: 03/05/23: Martin Euredjian: DCM Trouble
55933: 03/05/23: Austin Lesea: Re: DCM Trouble
55935: 03/05/23: Martin Euredjian: Re: DCM Trouble
55939: 03/05/24: valentin tihomirov: Can I implement frequency multiplier using FPGA/CPLD?
55941: 03/05/23: Peter Alfke: Re: Can I implement frequency multiplier using FPGA/CPLD?
55944: 03/05/23: Atif: FPGA Board
55945: 03/05/24: Hal Murray: Re: FPGA Board
55946: 03/05/24: Alex Gibson: Re: FPGA Board
55953: 03/05/24: Jerry: Re: FPGA Board
55954: 03/05/24: Jerry: Re: FPGA Board
55978: 03/05/25: H. Peter Anvin: Re: FPGA Board
55979: 03/05/25: Philip Freidin: Re: FPGA Board
55952: 03/05/24: Jacques athow: Has anyone tried Internet Design Team.
55955: 03/05/25: Ben Jackson: Why is there a large gulf between CPLD and FPGA?
55959: 03/05/25: rickman: Re: Why is there a large gulf between CPLD and FPGA?
55962: 03/05/25: Ben Jackson: Re: Why is there a large gulf between CPLD and FPGA?
55963: 03/05/25: Ben Jackson: Re: Why is there a large gulf between CPLD and FPGA?
55986: 03/05/26: rickman: Re: Why is there a large gulf between CPLD and FPGA?
55970: 03/05/25: Uwe Bonnes: Re: Why is there a large gulf between CPLD and FPGA?
55987: 03/05/26: rickman: Re: Why is there a large gulf between CPLD and FPGA?
55989: 03/05/26: Uwe Bonnes: Re: Why is there a large gulf between CPLD and FPGA?
55967: 03/05/25: Ralph Mason: Re: Why is there a large gulf between CPLD and FPGA?
56003: 03/05/27: Jim Granville: Re: Why is there a large gulf between CPLD and FPGA?
56005: 03/05/27: Hal Murray: Re: Why is there a large gulf between CPLD and FPGA?
56008: 03/05/26: rickman: Re: Why is there a large gulf between CPLD and FPGA?
56009: 03/05/27: Jim Granville: Re: Why is there a large gulf between CPLD and FPGA?
56022: 03/05/27: rickman: Re: Why is there a large gulf between CPLD and FPGA?
56023: 03/05/28: Allan Herriman: Re: Why is there a large gulf between CPLD and FPGA?
56040: 03/05/28: Jim Granville: Re: Why is there a large gulf between CPLD and FPGA?
56046: 03/05/28: Allan Herriman: Re: Why is there a large gulf between CPLD and FPGA?
55958: 03/05/25: James Fitzsimons: Newbie CPLD question
55960: 03/05/25: Leon Heller: Re: Newbie CPLD question
55975: 03/05/25: Leon Heller: Re: Newbie CPLD question
55998: 03/05/27: James Fitzsimons: Re: Newbie CPLD question
56001: 03/05/26: Ben Jackson: Re: Newbie CPLD question
56198: 03/05/30: Alex Gibson: Re: Newbie CPLD question
56010: 03/05/27: Leon Heller: Re: Newbie CPLD question
55961: 03/05/25: rickman: Re: Newbie CPLD question
55964: 03/05/25: Tim Boescke: Re: Newbie CPLD question
55968: 03/05/25: Ben Jackson: Re: Newbie CPLD question
55973: 03/05/25: Alex Gibson: Re: Newbie CPLD question
55965: 03/05/25: Alex Gibson: Re: Newbie CPLD question
55966: 03/05/25: Ralph Mason: Re: Newbie CPLD question
55969: 03/05/25: James Fitzsimons: Re: Newbie CPLD question
55971: 03/05/25: James Fitzsimons: Re: Newbie CPLD question
55972: 03/05/25: Uwe Bonnes: Re: Newbie CPLD question
55976: 03/05/26: Cooley: about the uclinux in Altera Nios
55977: 03/05/26: Cooley: about the uclinux in Altera Nios
55980: 03/05/26: John Williams: Re: about the uclinux in Altera Nios
56695: 03/06/11: Jaap Mol: Re: about the uclinux in Altera Nios
55981: 03/05/26: John Williams: attributes and generics
55982: 03/05/26: John Williams: Re: attributes and generics
55983: 03/05/26: David R Brooks: Re: attributes and generics
55984: 03/05/26: John Williams: Re: attributes and generics
55985: 03/05/26: Ken McElvain: Re: attributes and generics
55988: 03/05/26: Frank: New Architectures
55990: 03/05/26: Rene Tschaggelar: Re: New Architectures
55993: 03/05/26: Michael S: Re: New Architectures
55991: 03/05/26: DB: Any recommendation for an FPGA kit ?
55995: 03/05/26: Rene Tschaggelar: Re: Any recommendation for an FPGA kit ?
55996: 03/05/26: DB: Re: Any recommendation for an FPGA kit ?
55997: 03/05/26: Rene Tschaggelar: Re: Any recommendation for an FPGA kit ?
56156: 03/05/29: Jesse Kempa: Re: Any recommendation for an FPGA kit ?
55994: 03/05/26: Benoit: Pos Phys L4
55999: 03/05/26: Jon Beniston: Re: Pos Phys L4
56002: 03/05/26: emanuel stiebler: xilinix edk 3.2 and webpack
56004: 03/05/27: John Williams: Re: xilinix edk 3.2 and webpack
56006: 03/05/27: leon qin: Can I implement a NIOS cpu in EP1C6
56016: 03/05/27: Paul Leventis: Re: Can I implement a NIOS cpu in EP1C6
56061: 03/05/28: leon qin: Re: Can I implement a NIOS cpu in EP1C6
56007: 03/05/26: Mike Rosing: Re: JTAG madness
56037: 03/05/27: Brett Foster: Re: JTAG madness
56042: 03/05/27: CBFalconer: Re: JTAG madness
56044: 03/05/27: <ararghNOSPAM@NOT.AT.enteract.com>: Re: JTAG madness
56051: 03/05/27: Jerry Avins: Re: JTAG madness
56053: 03/05/27: <ararghNOSPAM@NOT.AT.enteract.com>: Re: JTAG madness
56082: 03/05/28: Jerry Avins: Re: JTAG madness
56054: 03/05/28: Brett Foster: Re: JTAG madness
56055: 03/05/28: Brett Foster: Re: JTAG madness
56056: 03/05/27: <ararghNOSPAM@NOT.AT.enteract.com>: Re: JTAG madness
56072: 03/05/28: Hans-Bernhard Broeker: Re: JTAG madness
56075: 03/05/28: Brett Foster: Re: JTAG madness
56086: 03/05/28: Jerry Avins: Re: JTAG madness
56108: 03/05/28: Brett Foster: Re: JTAG madness
56089: 03/05/28: Keith R. Williams: Re: JTAG madness
56098: 03/05/28: Eric Smith: Re: JTAG madness
56105: 03/05/28: Charles Krinke: Re: JTAG madness
56111: 03/05/28: Eric Jacobsen: Re: JTAG madness
56114: 03/05/28: Jerry Avins: Re: JTAG madness
56263: 03/06/02: Eric Jacobsen: Re: JTAG madness
56264: 03/06/02: robert bristow-johnson: Re: JTAG madness
56143: 03/05/29: Dave Hansen: Re: JTAG madness
56110: 03/05/28: Eric Jacobsen: Re: JTAG madness
56045: 03/05/27: Mike Rosing: Re: JTAG madness
56047: 03/05/27: rickman: Re: JTAG madness
56048: 03/05/27: Gene S. Berkowitz: Re: JTAG madness
56049: 03/05/27: Jerry Avins: Re: JTAG madness
56132: 03/05/29: Martin Thompson: Re: JTAG madness
56039: 03/05/28: Laurent Gauch, Amontec: Re: JTAG madness
56062: 03/05/27: Antti Lukats: Re: JTAG madness
56012: 03/05/27: Antti Lukats: Xilinx Spartan download with Parallel III cable
56013: 03/05/27: Uwe Bonnes: Re: Xilinx Spartan download with Parallel III cable
56065: 03/05/28: Antti Lukats: Re: Xilinx Spartan download with Parallel III cable
56018: 03/05/27: Leon Heller: Re: Xilinx Spartan download with Parallel III cable
56024: 03/05/27: Falk Brunner: Re: Xilinx Spartan download with Parallel III cable
56025: 03/05/27: Peter Seng: Re: Xilinx Spartan download with Parallel III cable
56060: 03/05/27: Antti Lukats: Re: Xilinx Spartan download with Parallel III cable
56067: 03/05/28: Peter Seng: Re: Xilinx Spartan download with Parallel III cable
56150: 03/05/29: Antti Lukats: Re: Xilinx Spartan download with Parallel III cable
56038: 03/05/27: Neil Glenn Jacobson: Re: Xilinx Spartan download with Parallel III cable
56071: 03/05/28: Falser Klaus: Re: Xilinx Spartan download with Parallel III cable
56093: 03/05/28: Neil Glenn Jacobson: Re: Xilinx Spartan download with Parallel III cable
56041: 03/05/27: Ben Jackson: Re: Xilinx Spartan download with Parallel III cable
56068: 03/05/28: Antti Lukats: Re: Xilinx Spartan download with Parallel III cable
56087: 03/05/28: Amontec Team: Re: Xilinx Spartan download with Parallel III cable
56236: 03/05/31: Petter Gustad: Re: Xilinx Spartan download with Parallel III cable
56237: 03/05/31: Gregory C. Read: Re: Xilinx Spartan download with Parallel III cable
56314: 03/06/03: David Kinsell: Re: Xilinx Spartan download with Parallel III cable
56329: 03/06/03: David Kinsell: Re: Xilinx Spartan download with Parallel III cable
56352: 03/06/03: Ben Jackson: Re: Xilinx Spartan download with Parallel III cable
56374: 03/06/04: David Kinsell: Re: Xilinx Spartan download with Parallel III cable
56389: 03/06/04: Falk Brunner: Re: Xilinx Spartan download with Parallel III cable
56494: 03/06/06: Jon Elson: Re: Xilinx Spartan download with Parallel III cable
56521: 03/06/07: Falk Brunner: Re: Xilinx Spartan download with Parallel III cable
56522: 03/06/07: Falk Brunner: Re: Xilinx Spartan download with Parallel III cable
56955: 03/06/19: Kasper Pedersen: Re: Xilinx Spartan download with Parallel III cable
56546: 03/06/09: Kolja Sulimma: Re: Xilinx Spartan download with Parallel III cable
56015: 03/05/27: Patrik Eriksson: Multiply 19.44MHz with Virtex-II DCM
56019: 03/05/27: Austin Lesea: Re: Multiply 19.44MHz with Virtex-II DCM
56032: 03/05/27: Jon Beniston: Re: Multiply 19.44MHz with Virtex-II DCM
56034: 03/05/27: Austin Lesea: Re: Multiply 19.44MHz with Virtex-II DCM
56063: 03/05/28: Heavenfish: Re: Multiply 19.44MHz with Virtex-II DCM
56079: 03/05/28: Austin Lesea: Re: Multiply 19.44MHz with Virtex-II DCM
56118: 03/05/29: Jay: Re: Multiply 19.44MHz with Virtex-II DCM
56148: 03/05/29: Austin Lesea: Re: Multiply 19.44MHz with Virtex-II DCM
56199: 03/05/30: Patrik Eriksson: Re: Multiply 19.44MHz with Virtex-II DCM
56020: 03/05/27: Spam Hater: Re: 2 Questions about VHDL
56027: 03/05/27: Steve Lass: Re: 2 Questions about VHDL
56036: 03/05/28: Ralph Mason: Re: 2 Questions about VHDL
56043: 03/05/27: Ed Stevens: Re: 2 Questions about VHDL
56050: 03/05/28: Spam Hater: Re: 2 Questions about VHDL
56094: 03/05/28: Ed Stevens: Re: 2 Questions about VHDL
56196: 03/05/30: Alex Gibson: Re: 2 Questions about VHDL
56207: 03/05/30: Spam Hater: Re: 2 Questions about VHDL
56026: 03/05/27: rickman: JTAG madness
56091: 03/05/28: Magnus Homann: Re: JTAG madness
56107: 03/05/28: rickman: Re: JTAG madness
56115: 03/05/28: Peter C. Wallace: Re: JTAG madness
56120: 03/05/28: rickman: Re: JTAG madness
56121: 03/05/28: Peter Wallace: Re: JTAG madness
56117: 03/05/28: Mike Rosing: Re: JTAG madness
56128: 03/05/29: Magnus Homann: Re: JTAG madness
56131: 03/05/29: Arie de Muynck: Re: JTAG madness
56139: 03/05/29: rickman: Re: JTAG madness
56149: 03/05/29: Keith Larson: Re: JTAG madness
56125: 03/05/29: Fred Viles: Re: JTAG madness
56137: 03/05/29: rickman: Re: JTAG madness
56172: 03/05/29: Fred Viles: Re: JTAG madness
56188: 03/05/29: rickman: Re: JTAG madness
56248: 03/06/01: KG7HF: Re: JTAG madness
56251: 03/06/01: rickman: Re: JTAG madness
56313: 03/06/03: KG7HF: Re: JTAG madness
56333: 03/06/03: Dziadek: Re: JTAG madness
56350: 03/06/03: rickman: Re: JTAG madness
56386: 03/06/04: Dziadek: Re: JTAG madness
56031: 03/05/27: Ed Stevens: 2 Questions about VHDL
56195: 03/05/30: Alex Gibson: Re: 2 Questions about VHDL
56035: 03/05/27: Sriram: Dynamic Reconfiguration of arithmetic units
56057: 03/05/27: Muthu: FIFO Controller
56058: 03/05/28: Ralph Mason: Re: FIFO Controller
56064: 03/05/28: Hal Murray: Re: FIFO Controller
56080: 03/05/28: Peter Wallace: Re: FIFO Controller
56088: 03/05/28: Peter Alfke: Re: FIFO Controller
58510: 03/07/25: Stan Lackey: Re: FIFO Controller
56090: 03/05/29: Ralph Mason: Re: FIFO Controller
56095: 03/05/28: Peter Alfke: Re: FIFO Controller
56100: 03/05/29: Jim Granville: Re: FIFO Controller
56154: 03/05/29: Peter Alfke: Re: FIFO Controller
56167: 03/05/30: Jim Granville: Re: FIFO Controller
56102: 03/05/28: Pete Fraser: Re: FIFO Controller
56155: 03/05/29: Peter Alfke: Re: FIFO Controller
56205: 03/05/30: Hal Murray: Re: FIFO Controller
56147: 03/05/29: Marc Randolph: Re: FIFO Controller
56158: 03/05/29: Peter Alfke: Re: FIFO Controller
56166: 03/05/30: Jim Granville: Re: FIFO Controller
56171: 03/05/29: Marc Randolph: Re: FIFO Controller
56176: 03/05/30: John Williams: Re: FIFO Controller
56218: 03/05/31: Ray Andraka: Re: FIFO Controller
56206: 03/05/30: Hal Murray: Re: FIFO Controller
58511: 03/07/25: Stan Lackey: Re: FIFO Controller
56183: 03/05/29: Dan Hicks: Re: FIFO Controller
56217: 03/05/31: Ray Andraka: Re: FIFO Controller
58509: 03/07/25: Stan Lackey: Re: FIFO Controller
56081: 03/05/28: Ray Andraka: Re: FIFO Controller
56059: 03/05/28: leon qin: Cyclone doesn't non-clock rom?
56140: 03/05/29: Vaughn Betz: Re: Cyclone doesn't non-clock rom?
56066: 03/05/28: Masoud Naderi: IL711 with LVDS
56073: 03/05/28: Falser Klaus: Re: IL711 with LVDS
56252: 03/06/01: Masoud Naderi: Re: IL711 with LVDS
56069: 03/05/28: Leon Heller: ANN: Getting started with programmable logic
56070: 03/05/28: Jens Nowack: Simulation in Altera Quartus II
56146: 03/05/29: Subroto Datta: Re: Simulation in Altera Quartus II
56224: 03/05/31: Jesus Jimenez: Re: Simulation in Altera Quartus II
56076: 03/05/28: Alfredo: why xflow?
56077: 03/05/29: Allan Herriman: Re: why xflow?
56113: 03/05/29: John Williams: Re: why xflow?
56078: 03/05/28: Robert: New Xilinx PROMs
56085: 03/05/28: Laurent Gauch, Amontec: Re: New Xilinx PROMs
56106: 03/05/28: Lorenzo Lutti: Re: New Xilinx PROMs
56083: 03/05/28: Paulo Valentim: Altera hold violation errors
56138: 03/05/29: Vaughn Betz: Re: Altera hold violation errors
56096: 03/05/28: Amontec Team: 5v TTL to 3.3v 2.5v 1.8v 1.2v LVTTL solution
56099: 03/05/28: Uwe Bonnes: Re: 5v TTL to 3.3v 2.5v 1.8v 1.2v LVTTL solution
56101: 03/05/29: Jim Granville: Re: 5v TTL to 3.3v 2.5v 1.8v 1.2v LVTTL solution
56103: 03/05/28: Amontec Team: Re: 5v TTL to 3.3v 2.5v 1.8v 1.2v LVTTL solution
56104: 03/05/29: Jim Granville: Re: 5v TTL to 3.3v 2.5v 1.8v 1.2v LVTTL solution
56187: 03/05/30: brijesh: Re: 5v TTL to 3.3v 2.5v 1.8v 1.2v LVTTL solution
56112: 03/05/28: spyng: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56123: 03/05/29: Muzaffer Kal: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56127: 03/05/29: Hal Murray: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56208: 03/05/30: spyng: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56130: 03/05/29: Falser Klaus: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56133: 03/05/29: Christopher Saunter: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56209: 03/05/30: spyng: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56134: 03/05/29: Uwe Bonnes: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56216: 03/05/30: john jakson: Re: need help on sending 500Mbit/s data through 100 feet of cable, Giga-Ethernet?
56116: 03/05/28: Mike Butts: An FPGA is flying to Mars
56371: 03/06/04: rk: Re: An FPGA is flying to Mars
56377: 03/06/04: Bob Perlman: Re: An FPGA is flying to Mars
56392: 03/06/04: rk: Re: An FPGA is flying to Mars
56400: 03/06/04: rickman: Re: An FPGA is flying to Mars
56404: 03/06/04: rk: Re: An FPGA is flying to Mars
56430: 03/06/05: rickman: Re: An FPGA is flying to Mars
56414: 03/06/04: Klaus Vestergaard Kragelund: Re: An FPGA is flying to Mars
56447: 03/06/05: Austin Lesea: Re: An FPGA is flying to Mars
56475: 03/06/06: rk: Re: An FPGA is flying to Mars
56407: 03/06/04: Kate Palmer: Re: An FPGA is flying to Mars
56122: 03/05/29: Jean Nicolle: fpga4un
56124: 03/05/29: Muzaffer Kal: 20 to 5 encoder optimization?
56126: 03/05/29: Gil Herbeck: Re: 20 to 5 encoder optimization?
56142: 03/05/29: Marc Randolph: Re: 20 to 5 encoder optimization?
56129: 03/05/29: Hal Murray: Re: 20 to 5 encoder optimization?
56145: 03/05/29: nospam: Re: 20 to 5 encoder optimization?
56135: 03/05/29: Wong: Antifuse and SRAM FPGA
56141: 03/05/29: rickman: Re: Antifuse and SRAM FPGA
56180: 03/05/29: Wong: Re: Antifuse and SRAM FPGA
56182: 03/05/29: Peter Alfke: Re: Antifuse and SRAM FPGA
56192: 03/05/29: rickman: Re: Antifuse and SRAM FPGA
56153: 03/05/29: John Eaton: Re: Antifuse and SRAM FPGA
56162: 03/05/29: Peter Alfke: Re: Antifuse and SRAM FPGA
56173: 03/05/29: H. Peter Anvin: Re: Antifuse and SRAM FPGA
56178: 03/05/29: Peter Alfke: Re: Antifuse and SRAM FPGA
56179: 03/05/29: Gregory C. Read: Re: Antifuse and SRAM FPGA
56189: 03/05/29: rickman: Re: Antifuse and SRAM FPGA
56202: 03/05/30: Austin Lesea: Antifuse and CCC FPGA
56204: 03/05/30: rickman: Re: Antifuse and CCC FPGA
56372: 03/06/04: rk: Re: Antifuse and CCC FPGA
56439: 03/06/05: H. Peter Anvin: Re: Antifuse and CCC FPGA
56474: 03/06/06: rk: Re: Antifuse and CCC FPGA
56136: 03/05/29: Antti Lukats: Simplest PCI - VHDL core (BIOS Post port80 Tester)
56160: 03/05/29: =?ISO-8859-1?Q?Eduardo_Wenzel_Bri=E3o?=: MapLib Error (463 ) in Modular Design Flow
56163: 03/05/30: Ralph Mason: FPGA's an Flash
56165: 03/05/29: Austin Lesea: Re: FPGA's an Flash
56210: 03/05/30: Lorenzo Lutti: Re: FPGA's an Flash
56211: 03/05/30: Austin Lesea: Re: FPGA's an Flash
56226: 03/05/31: Lorenzo Lutti: Re: FPGA's an Flash
56227: 03/05/31: jetmarc: Re: FPGA's an Flash
56228: 03/05/31: Paul Leventis: Re: FPGA's an Flash
56233: 03/05/31: rickman: Re: FPGA's an Flash
56235: 03/05/31: emanuel stiebler: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56243: 03/05/31: Eric Smith: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56246: 03/06/01: emanuel stiebler: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56249: 03/06/01: rickman: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56292: 03/06/02: Peter Alfke: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56335: 03/06/03: Luiz Carlos: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56346: 03/06/03: Peter Alfke: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56390: 03/06/04: raymund hofmann: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56406: 03/06/04: Peter Alfke: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56440: 03/06/05: raymund hofmann: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56408: 03/06/04: Austin Lesea: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56448: 03/06/05: EU: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56451: 03/06/05: Austin Lesea: Re: DES-encrypt, Spartan3, was Re: FPGA's an Flash
56290: 03/06/02: Peter Alfke: Re: FPGA's an Flash
56307: 03/06/03: Jim Granville: Re: FPGA's an Flash
56356: 03/06/03: jetmarc: Re: FPGA's an Flash
56357: 03/06/03: Peter Alfke: Re: FPGA's an Flash
56168: 03/05/29: Peter Alfke: Re: FPGA's an Flash
56177: 03/05/30: Ralph Mason: Re: FPGA's an Flash
56191: 03/05/29: rickman: Re: FPGA's an Flash
56229: 03/05/31: Markus Meng: Re: FPGA's an Flash
56230: 03/05/31: Peter Wallace: Re: FPGA's an Flash
56232: 03/05/31: Magnus Homann: Re: FPGA's an Flash
56238: 03/05/31: Peter Wallace: Re: FPGA's an Flash
56245: 03/06/01: Markus Meng: Re: FPGA's an Flash
56250: 03/06/01: rickman: Re: FPGA's an Flash
56387: 03/06/04: Hal Murray: Re: FPGA's an Flash
56399: 03/06/04: rickman: Re: FPGA's an Flash
56308: 03/06/03: Jim Granville: Re: FPGA's an Flash
56348: 03/06/03: Markus Meng: Re: FPGA's an Flash
56170: 03/05/30: Jim Granville: Re: FPGA's an Flash
56181: 03/05/30: Paul Leventis: Re: FPGA's an Flash
56184: 03/05/29: rickman: Re: FPGA's an Flash
56185: 03/05/29: rickman: Re: FPGA's an Flash
56213: 03/05/31: Sergei Skorobogatov: Re: FPGA's an Flash
56214: 03/05/30: Peter Alfke: Re: FPGA's an Flash
56220: 03/05/31: rickman: Re: FPGA's an Flash
56277: 03/06/02: Austin Lesea: Re: FPGA's an Flash
56322: 03/06/03: rickman: Re: FPGA's an Flash
56339: 03/06/03: Austin Lesea: Re: FPGA's an Flash
56340: 03/06/03: John_H: Re: FPGA's an Flash
56349: 03/06/03: rickman: Re: FPGA's an Flash
56354: 03/06/03: Peter Alfke: Re: FPGA's an Flash
56379: 03/06/04: rickman: Re: FPGA's an Flash
56410: 03/06/04: FE: Re: FPGA's an Flash
56420: 03/06/04: Peter Alfke: Re: FPGA's an Flash
56431: 03/06/05: rickman: Re: FPGA's an Flash
56289: 03/06/02: Peter Alfke: Re: FPGA's an Flash
56323: 03/06/03: rickman: Re: FPGA's an Flash
56393: 03/06/04: jakab tanko: Re: FPGA's an Flash
56398: 03/06/04: Austin Lesea: Re: FPGA's an Flash
56424: 03/06/05: Jim Granville: Re: FPGA's an Flash
56444: 03/06/05: Markus Meng: Re: FPGA's an Flash
56194: 03/05/29: Muthu: Gate arrays
56197: 03/05/30: Jay: Is something wrong with ISE5.1 simulation library
56215: 03/05/30: Bob Fischer: Using FPGA to conduct novel device research & development
56221: 03/05/31: Sergio Masci: Software support for experimenting with CPU core design
56222: 03/05/31: Muthu: FSM Coding Style
56240: 03/05/31: Jake Janovetz: Re: FSM Coding Style
56223: 03/05/31: Valli: power consumption in CMOS..
56242: 03/06/01: Glen Herrmannsfeldt: Re: power consumption in CMOS..
56255: 03/06/01: Ray Andraka: Re: power consumption in CMOS..
56267: 03/06/02: Glen Herrmannsfeldt: Re: power consumption in CMOS..
56280: 03/06/02: Austin Lesea: Re: power consumption in CMOS..
56285: 03/06/02: Falk Brunner: Re: power consumption in CMOS..
56294: 03/06/02: Peter Alfke: Re: power consumption in CMOS..
56302: 03/06/02: Brian: Re: power consumption in CMOS..
56459: 03/06/05: Glen Herrmannsfeldt: Re: power consumption in CMOS..
56225: 03/05/31: Jesus Jimenez: Is it possible to simulate Nios designs with Quartus?
56429: 03/06/05: War pawn: Re: Is it possible to simulate Nios designs with Quartus?
56484: 03/06/06: Jesus Jimenez: Re: Is it possible to simulate Nios designs with Quartus?
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