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On 4 Jun 2003 03:37:44 GMT, rk <stellare@NOSPAMPLEASE.erols.com> wrote: >There are also FPGAs on the way to Saturn on the Cassini spacecraft. I'm pretty sure some FPGAs that I RMA'd a while back ended up going to Pluto. Bob Perlman Cambrian Design WorksArticle: 56378
Karsten Becker wrote: > > Steve Knapp wrote: > > If designing for applications going to production early next year and if > > you are considering changing FPGA families, you should also consider the > > recently announced Spartan-3 family. Spartan-3 is manufactured on > > advanced 90 nm (0.09u) technology, offering about a 50% area advantage > > over 0.13u. Software support is already available in ISE 5.2i, but I > > recommend downloading the latest service pack for recent feature > > upgrades. > > > > http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp > > > If you just would have added support for the full spartan-3 line in your > ISE Webpack it might have been a reason to wait for me. But as the > Cyclone-family is fully supported by alteras quartus-2-web edition I > don't see any point paying a xxx dollars license/per year + xxx dollars > for a board.... > BTW. I'm a student and I want to have a very low entry price. The more > features are avaible for free, the better for me. > So I start loving Quartus-II and will use it in future. I was under the impression that all of the Spartan 3 parts were supported by WebPack. Which ones are and aren't? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 56379
Peter Alfke wrote: > > Now let me get back to the technical issues... > Peter Alfke Please don't let me get in the way of your technical work. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 56380
Karsten Becker wrote: > > rickman wrote: > > Eric wrote: > >>.....especially since some of our applications focus on DSP. Does... > > > Again, I don't want to knock Xilinx (I like 'em... I like 'em a lot!), > > but the Altera Cyclone is looking pretty good and priced right. The > > Cyclone parts have as much or more RAM bits than the XC2S parts. > > Compared to the XC3S they are in smaller blocks. If you don't need a > > full 18kbits in each block, the Cyclone may be just what you need with > > 4kbit blocks. > > > > If they just would have placed some DSP blocks on it..... > > Karsten What exactly is a DSP block? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 56381
History tends to suggest 1 year between Xilinx announcing a new product and normal people (small to midsize companies) even being able to get thier hands on small quantities and possible another year before they readily vailable and easy to get (digikey). So do your best with whats out there, hopefully I'm wrong but I fear I'm not. They are only sampling the 50 and 1000 now so the wait for the 200 in volume is going to be a while. Karsten Becker <KB@Karsten-Becker.de> wrote in message news:<bbjhn1$a5n1a$1@news.hansenet.net>... > rickman wrote: > > Eric wrote: > >>.....especially since some of our applications focus on DSP. Does... > > > Again, I don't want to knock Xilinx (I like 'em... I like 'em a lot!), > > but the Altera Cyclone is looking pretty good and priced right. The > > Cyclone parts have as much or more RAM bits than the XC2S parts. > > Compared to the XC3S they are in smaller blocks. If you don't need a > > full 18kbits in each block, the Cyclone may be just what you need with > > 4kbit blocks. > > > > If they just would have placed some DSP blocks on it..... > > KarstenArticle: 56382
On Wed, 04 Jun 2003 01:06:48 -0400, rickman <spamgoeshere4@yahoo.com> wrote: >Karsten Becker wrote: >> >> rickman wrote: >> > Eric wrote: >> >>.....especially since some of our applications focus on DSP. Does... >> >> > Again, I don't want to knock Xilinx (I like 'em... I like 'em a lot!), >> > but the Altera Cyclone is looking pretty good and priced right. The >> > Cyclone parts have as much or more RAM bits than the XC2S parts. >> > Compared to the XC3S they are in smaller blocks. If you don't need a >> > full 18kbits in each block, the Cyclone may be just what you need with >> > 4kbit blocks. >> > >> >> If they just would have placed some DSP blocks on it..... >> >> Karsten > >What exactly is a DSP block? A Stratix embedded macro with 4 18x18 multipliers and two levels of adders needed to get to one output of 38 bits. Very useful for brute force FIR designs. Muzaffer Kal http://www.dspia.com ASIC/FPGA design/verification consulting specializing in DSP algorithm implementationsArticle: 56383
Hi all, I have just finished my scheme (Orcad) with a big stratix and I would like to insert automatically I/Os in Quartus. Can anyone describe me a method ?. Thanks in advance. Benoit.Article: 56385
Hi,
For the test/debugging of our VHDL designs we're looking for a development
board that has a Xilinx Virtex FPGA directly connected to a compact PCI
(cPCI) bus. The board must fit in a 3U 3.3V rack system. The FPGA chip
should have at least 1M system gates but if its less then we'll settle for
that.
Any research labs that might have this kind of board and are interested to
sell one?
If this exists on the market i'm also interested but haven't found it yet.
Thanks,
Pete
Article: 56386"rickman" <spamgoeshere4@yahoo.com> wrote in message news:3EDCFEC4.D05B0518@yahoo.com... > Dziadek wrote: > > > > In the past I have done a board with the TI DSP and a CPLD in chain. There > > were some problems at the beginning to configure the debugger but later it > > worked OK. I have also a board with two SHARCs and few CPLDs and FPGAs in > > series and everything works OK. > > > > But for now I prefer separate connectors: one for the processor and one for > > the CPLD/FPGA. With two connectors you can have connected both the processor > > emulator and the FPGA/CLPD programmer at the same time. This speeds up the > > debugging because you have both the hardware tool and software tools ready > > and can quickly update the H/W and S/W. > > Thanks for your comments. I won't need to use the scan chain for > debugging or programming the CPLD/FPGAs. The processor will do that. I > need them in the same chain for production boundary scan testing. But > knowing that the TI CC will work ok with the PLDs in the chain is > important. > > Did it matter if the DSP was first or last in the chain? I seem to > recall being advised to make the DSP last. > AFAIR, the DSP (320VC5410) was the first, the CPLD (XC95144XL) was the next. It worked with XDS510 PP Plus. DziadekArticle: 56387
>I expect this is not a large market. Many of the FPGAs do not use >dedicated serial PROMs for configuration since there is often an MCU or >CPLD and a standard Flash part on board. I don't think I have ever used >a serial configuration device in the ten years or more that I have been >designing FPGAs. If the really large quantities are not there, then >there is no room for profit at $2 a part. I've used serial ROMs a couple of times. There was a small FPGA for the "glue" logic needed to get far enough so the CPU could load the real/bigger FPGAs. Consider a PCI card. How do you get off the ground if you don't have a CPU on the card? If you have multiple FPGAs, it's easy to load the others from the one connected directly to the PCI bus, but you don't have anyplace to stand while loading it. -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.Article: 56388
rickman <spamgoeshere4@yahoo.com> wrote: : Karsten Becker wrote: :> :> Steve Knapp wrote: :> > If designing for applications going to production early next year and if :> > you are considering changing FPGA families, you should also consider the :> > recently announced Spartan-3 family. Spartan-3 is manufactured on :> > advanced 90 nm (0.09u) technology, offering about a 50% area advantage :> > over 0.13u. Software support is already available in ISE 5.2i, but I :> > recommend downloading the latest service pack for recent feature :> > upgrades. :> > :> > http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp :> > :> If you just would have added support for the full spartan-3 line in your :> ISE Webpack it might have been a reason to wait for me. But as the :> Cyclone-family is fully supported by alteras quartus-2-web edition I :> don't see any point paying a xxx dollars license/per year + xxx dollars :> for a board.... :> BTW. I'm a student and I want to have a very low entry price. The more :> features are avaible for free, the better for me. :> So I start loving Quartus-II and will use it in future. : I was under the impression that all of the Spartan 3 parts were : supported by WebPack. Which ones are and aren't? Support in Webpack only goes up to the 400 size Bye -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------Article: 56389
"David Kinsell" <kinsell@poboxyz.com> schrieb im Newsbeitrag news:Z9eDa.62966$M01.39756@sccrnsc02... > Those aren't classic low pass filters, the caps should be on the other > side of the resistors. I've used 470 pf on the other side of the TCK > resistor and gotten much better results programming an original Spartan > part. Those filters are just nonsense, IMHO. It has been said a few times, that the TCK line is VERY sensitive to glitches, since it is as fast as all other IOs. So it is a good idea to put RC-filter (330 Ohm, 1nF) followed by a schmitt-trigger (74HC14) in front of the TCK line (before the tristate driver). A second schmitt-trigger reveres the polarity to the original level, so from the software view its identical. In my download cable, I also removed the diode feeding VCC. -- MfG FalkArticle: 56390
"Peter Alfke" <peter@xilinx.com> schrieb im Newsbeitrag news:3EDB8423.29CA2C46@xilinx.com... > > > emanuel stiebler wrote: > > > But, anybody out here has an idea, why there is no bitstream encryption > > on the spartan 3 ? With all this gates & memory, you could do impressive > > designs, but to keep them for safe you still have to go to the virtex > > chips ... > > It's really quite simple: > The priorities for Spartan are: Low cost first, features and speed second. > For Virtex the priorities are reversed. > Makes a lot of sense, avoids unproductive overlap, and gives the user a > fair choice. Cheap or fancy. There is no free lunch... > > Now, if encryption were a popular feature in the low-cost market (please > tell us), then it would make sense to dedicate some silicon and a pin > for the on-chip decryption. Why don't put a kind of "Host ID/Serialnumber" on the FPGA in some kind of "one time programmable" way at Manufacturing the FPGA ? I think Intel CPU's already each have different ID's since some time. I doubt this is a cost/performance penalty like manufacturing a FPGA on a flash-process. This ID can then be used to decrypt a bitstream. And the device should accept two kinds of bitstreams: Encrypted with it's ID + Unencrypted. And this ID should be electronically readeable off the FPGA. I think it is only a matter of time when one FPGA company starts such a thing even for the "low cost" Parts. Of course will the FPGA Customer have to care about generating individual Bitstreams for each device ID of the Part's used, if he wants "security". As there often is a MCU with the FPGA(s) on Board there is additional flexibility in handling the "design security". Or he may choose not to encrypt. Raymund HofmannArticle: 56391
Bob Perlman wrote: >>There are also FPGAs on the way to Saturn on the Cassini >>spacecraft. > > I'm pretty sure some FPGAs that I RMA'd a while back ended up going > to Pluto. That's probably a bit doubtful as no spacecraft has yet gone to Pluto and none are en route. There is one project that is going to go to Pluto but it's still in the early stages (the early stages can last a while ;-) and hasn't yet had it's Critical Design Review. Perhaps what you RMA'd was for a development project for a mission to project and those sorts of things go back many, many years. -- rk, Citizen, Noooo Yawk "Sometimes when you connect the dots you get a picture. Other times you just have a bunch of dots." -- rk, January 23, 2003Article: 56393
Interesting discussion, sory to interfere;just have one thing to say: Mr.Alfke and Lesea are the most valuable contributors to this newsgroup in my oppinion(+Ray Andraka). I learned more from their answers to technical questions over the last few years than from any other source. I think we should all thank them for their time and willingness to participate in our sometimes silly discussions instead of taking them to task over their companies stock price!!. Of course, this is my personal oppinion ( ) insert your favorite legal mambojambo in the bracket to make the point that this is my personal oppinion! --- jakab rickman <spamgoeshere4@yahoo.com> wrote in message news:3EDC3709.F81EC1EC@yahoo.com... > Yes, Peter, the whole industry was down and Xilinx is no exception. So > why did you claim that "all these companies so small and/or doing so > poorly"? I didn't think you were gloating, but I also don't think it > was a reasonable assessment of the technology. I felt your comment was > a cheap shot. > > I seem to recall some of your past postings where you mention that you > don't like to discuss the competition because doing so makes it look > like you are taking cheap shots, or something similar. That is exactly > how it looked to me. > > I gave a much longer reply to Austin because I feel he projects an image > here that is a bit stronger in knocking the competition. As I said > there, I like Xilinx products and I forgot to mention that I also like > their support. I expect to be using the Spartan 3 in a new design > shortly. But no technology is "perfect". > > The rational that you gave about company size is not valid. There are > new chips out that have not seen their chance at the market place. But > I can tell you that Xilinx is losing some sockets to them. My design > has replaced two Coolrunner parts with the Lattice parts. I thought the > Coolrunners were perfect for the job. But Xilinx would not come down on > price on one and they put the part in too large a package for the > other. I am sure I am not the only engineer who sees the advantages of > some of the new flash parts, even compared to the FPGAs. BTW, Xilinx > FPGAs were never considered for these sockets because none of the > current families have 5 volt tolerance. Seems that is making a comeback > these days. > > So I hope you can take my comments in the sense they were intended, not > as an insult or argument, but as a comment on what I am reading here. > > > Peter Alfke wrote: > > > > Rick, that's a cheap shot. The whole industry is down... > > But at least we did not lay off anybody, unlike some of our competitors. > > > > I was not gloating, just pointing out that there must be a fly in the > > ointment with all those glorious technologies that were mentioned. > > > > Peter Alfke > > ===================== > > rickman wrote: > > > > > > > > > I remember a time when Xilinx stock was over 90. Last time I checked it > > > was still below 30. I bet there are some very unhappy investors out > > > there still. > > > > > > How was *your* bonus last year? ;) > > > > > > -- > > > > > > Rick "rickman" Collins > > > > > > rick.collins@XYarius.com > > > Ignore the reply address. To email me use the above address with the XY > > > removed. > > > > > > Arius - A Signal Processing Solutions Company > > > Specializing in DSP and FPGA design URL http://www.arius.com > > > 4 King Ave 301-682-7772 Voice > > > Frederick, MD 21701-3110 301-682-7666 FAX > > -- > > Rick "rickman" Collins > > rick.collins@XYarius.com > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design URL http://www.arius.com > 4 King Ave 301-682-7772 Voice > Frederick, MD 21701-3110 301-682-7666 FAXArticle: 56394
Dear All, I've developed an IDE interface controller for an ARM920core processor (S3c2410). The controller has been developed in an FPGA. Actually I view the IDE registers in a memory location: see this sample: #define EXTENSIONBOARD_IO_BASE_ADDRESS (0x28000000) //nGCS5 #define SectorCountR_OFFSET 0x06 //0x03 #define rSectorCountR (*(volatile U8 *)(EXTENSIONBOARD_IO_BASE_ADDRESS+SCR_OFFSET )) ..... so I can access to the register in this form Sector=Uart_GetIntNum(); rSectorCountR= Sector; // sector ..... The device seems to function very well. I can read an write sectors with a C program compiled for arm-processor. Now I want to write a linux driver for this device. Do I write the driver from scratch or I can modify an existing driver? Which files Do I need to modify? Every suggestion are welcome... Best Regards BrazilArticle: 56395
Tom Hawkins (tom1@launchbird.com) wrote: : christopher.saunter@durham.ac.uk (Christopher Saunter) wrote in message news:<bbi8rq$glp$1@sirius.dur.ac.uk>... : > Tom Hawkins (tom1@launchbird.com) wrote: : > : Over the weekend we released Confluence 0.4.6: the first : > : version to included the new Python model generator. : > : > Neato. I have found Python to be very well suited to removing some of the : > pain of HDLs ;-) - can you say how long the free trial licences of : > Confluence are likely to last for? : > : Confluence actually originated from a Python based HDL called : ParaCore (http://www.dilloneng.com/paracore.html). I use a rather simpler (read naffer ;-) Python based simulater for synchronous logic I wrote to help design some dspish projects. One thing I use is a GUI front end, primarily for visualising dataflow through a desgin - I find visual feedback drastically simplifies aligning data pipelines and control flow etc. From a brief look at the Confluence docs on the Python model, it should not be to involved to produce a GUI front end for it. Is this something Launchbird plan, or is there scope / interest for a GUI front end for visualisation of the Python models? Of the various suported languages, I expect Python would be the best suited to such a task. Also, from reading the docs, maybee it's time I revived my side project of investigating Haskell... : The first Confluence seat is free, indefinite, and : enables the full compiler -- no size or performance restrictions. : Our revenue comes from the medium to larger design firms. Nice one. I hope that aproach proves fruitfull - it is certianly appreciated at my end of the world. Cheers, Chris SaunterArticle: 56396
Uwe Bonnes wrote: > Support in Webpack only goes up to the 400 size This http://www.xilinx.com/ise/products/webpack_config.htm claims webpack to even just support the 50 one... KarstenArticle: 56397
Mark Sandford wrote: > > History tends to suggest 1 year between Xilinx announcing a new > product and normal people (small to midsize companies) even being able > to get thier hands on small quantities and possible another year > before they readily vailable and easy to get (digikey). So do your > best with whats out there, hopefully I'm wrong but I fear I'm not. > They are only sampling the 50 and 1000 now so the wait for the 200 in > volume is going to be a while. The info I have says the 200,400 and 1500 will be in full production in Q4 of 03. This may mean Dec 31, but I don't expect them to be much beyond this date. They got a little burnt on the Virtex 2 schedule, IIRC, and I expect they will be pushing to meet their commitments this time. The 50 and 1000 are sampling now, but the parts are not 3 volt qualified and need to be reworked. So they have been pushed back to 1Q04 for production. The parts mentioned above will be the first out of the shoot now. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 56398
Jakab, Thank you for your kind words. Rick has some valid points. We have discussed them hopefully to the enlightenment of all. Austin jakab tanko wrote: > Interesting discussion, sory to interfere;just have one thing to say: > Mr.Alfke and Lesea are the most valuable contributors to this newsgroup in > my oppinion(+Ray Andraka). I learned more from their answers to technical > questions > over the last few years than from any other source. I think we should all > thank them for > their time and willingness to participate in our sometimes silly discussions > instead of > taking them to task over their companies stock price!!. > Of course, this is my personal oppinion ( ) insert > your favorite legal mambojambo > in the bracket to make the point that this is my personal oppinion! > --- > jakab > rickman <spamgoeshere4@yahoo.com> wrote in message > news:3EDC3709.F81EC1EC@yahoo.com... > > Yes, Peter, the whole industry was down and Xilinx is no exception. So > > why did you claim that "all these companies so small and/or doing so > > poorly"? I didn't think you were gloating, but I also don't think it > > was a reasonable assessment of the technology. I felt your comment was > > a cheap shot. > > > > I seem to recall some of your past postings where you mention that you > > don't like to discuss the competition because doing so makes it look > > like you are taking cheap shots, or something similar. That is exactly > > how it looked to me. > > > > I gave a much longer reply to Austin because I feel he projects an image > > here that is a bit stronger in knocking the competition. As I said > > there, I like Xilinx products and I forgot to mention that I also like > > their support. I expect to be using the Spartan 3 in a new design > > shortly. But no technology is "perfect". > > > > The rational that you gave about company size is not valid. There are > > new chips out that have not seen their chance at the market place. But > > I can tell you that Xilinx is losing some sockets to them. My design > > has replaced two Coolrunner parts with the Lattice parts. I thought the > > Coolrunners were perfect for the job. But Xilinx would not come down on > > price on one and they put the part in too large a package for the > > other. I am sure I am not the only engineer who sees the advantages of > > some of the new flash parts, even compared to the FPGAs. BTW, Xilinx > > FPGAs were never considered for these sockets because none of the > > current families have 5 volt tolerance. Seems that is making a comeback > > these days. > > > > So I hope you can take my comments in the sense they were intended, not > > as an insult or argument, but as a comment on what I am reading here. > > > > > > Peter Alfke wrote: > > > > > > Rick, that's a cheap shot. The whole industry is down... > > > But at least we did not lay off anybody, unlike some of our competitors. > > > > > > I was not gloating, just pointing out that there must be a fly in the > > > ointment with all those glorious technologies that were mentioned. > > > > > > Peter Alfke > > > ===================== > > > rickman wrote: > > > > > > > > > > > > I remember a time when Xilinx stock was over 90. Last time I checked > it > > > > was still below 30. I bet there are some very unhappy investors out > > > > there still. > > > > > > > > How was *your* bonus last year? ;) > > > > > > > > -- > > > > > > > > Rick "rickman" Collins > > > > > > > > rick.collins@XYarius.com > > > > Ignore the reply address. To email me use the above address with the > XY > > > > removed. > > > > > > > > Arius - A Signal Processing Solutions Company > > > > Specializing in DSP and FPGA design URL http://www.arius.com > > > > 4 King Ave 301-682-7772 Voice > > > > Frederick, MD 21701-3110 301-682-7666 FAX > > > > -- > > > > Rick "rickman" Collins > > > > rick.collins@XYarius.com > > Ignore the reply address. To email me use the above address with the XY > > removed. > > > > Arius - A Signal Processing Solutions Company > > Specializing in DSP and FPGA design URL http://www.arius.com > > 4 King Ave 301-682-7772 Voice > > Frederick, MD 21701-3110 301-682-7666 FAXArticle: 56399
Hal Murray wrote: > > >I expect this is not a large market. Many of the FPGAs do not use > >dedicated serial PROMs for configuration since there is often an MCU or > >CPLD and a standard Flash part on board. I don't think I have ever used > >a serial configuration device in the ten years or more that I have been > >designing FPGAs. If the really large quantities are not there, then > >there is no room for profit at $2 a part. > > I've used serial ROMs a couple of times. There was a small FPGA > for the "glue" logic needed to get far enough so the CPU could load > the real/bigger FPGAs. > > Consider a PCI card. How do you get off the ground if you don't have > a CPU on the card? If you have multiple FPGAs, it's easy to load > the others from the one connected directly to the PCI bus, but you > don't have anyplace to stand while loading it. As you said, a small CPLD can drive the address lines on a byte wide Flash and provide the timing strobes. You just need power and clock from the PCI bus and you are off! $1 for the CPLD, $2-4 for the flash. With this low a price ceiling, it is hard to make any money on a serial part. The board we built had a separate PCI bus interface part from PLX and we loaded the FPGA from the PCI bus. I had a scheme to use a couple of the special IO pins on the part to control PRGM, DONE, INIT, but they wanted to add a CPLD for other reasons. But we could have done it without another PLD. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
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