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Threads Starting Feb 2003

52115: 03/02/01: Skillwood: Static Timing Analysis
    52117: 03/02/01: Amit: Re: Static Timing Analysis
    52137: 03/02/02: John_H: Re: Static Timing Analysis
        52142: 03/02/02: Anthony J Bybell: Re: Static Timing Analysis
    52146: 03/02/03: ac: Re: Static Timing Analysis
    52462: 03/02/10: Andre Powell: Re: Static Timing Analysis
52118: 03/02/01: Steve: Spartan2E and parallel port
    52121: 03/02/01: Falk Brunner: Re: Spartan2E and parallel port
        52145: 03/02/03: Steve: Re: Spartan2E and parallel port
            52168: 03/02/03: Falk Brunner: Re: Spartan2E and parallel port
52119: 03/02/01: Jing: Xilinx SwitchBox Structure
    52136: 03/02/02: John_H: Re: Xilinx SwitchBox Structure
        52152: 03/02/03: Jing: Re: Xilinx SwitchBox Structure
            52153: 03/02/03: Ray Andraka: Re: Xilinx SwitchBox Structure
52120: 03/02/01: Jing: Xilinx's XDL
    52201: 03/02/05: Anup Kumar Raghavan: Re: Xilinx's XDL
    52216: 03/02/04: Jeff: Re: Xilinx's XDL
52124: 03/02/01: David: Analog display in modelsim
    52128: 03/02/02: Falk Brunner: Re: Analog display in modelsim
52125: 03/02/02: Bouh: FPGA Overclocking
    52131: 03/02/02: Rene Tschaggelar: Re: FPGA Overclocking
        52133: 03/02/02: Bouh: Re: FPGA Overclocking
            52141: 03/02/02: john jakson: Re: FPGA Overclocking
                52169: 03/02/03: Falk Brunner: Re: FPGA Overclocking
    52134: 03/02/02: Mike D: Re: FPGA Overclocking
    52284: 03/02/05: Max Khusid: Re: top colleges in VLSI Design education
52130: 03/02/02: Jarmo: How to program Altera EPC1213
    52132: 03/02/02: Marcin E. Hamerla: Re: How to program Altera EPC1213
52139: 03/02/02: TI: Ip core pricing info
    52151: 03/02/03: Fredrik: Re: Ip core pricing info
    52571: 03/02/14: gary: Re: Ip core pricing info
52147: 03/02/03: praveen: difference between pci2.1 and pci2.2
    52149: 03/02/03: Uwe Bonnes: Re: difference between pci2.1 and pci2.2
    52215: 03/02/04: Kevin Brace: Re: difference between pci2.1 and pci2.2
        52240: 03/02/04: praveen: Re: difference between pci2.1 and pci2.2
            52242: 03/02/05: Nicholas C. Weaver: Re: difference between pci2.1 and pci2.2
    52241: 03/02/05: Nicholas C. Weaver: Re: difference between pci2.1 and pci2.2
        52296: 03/02/06: praveen: Re: difference between pci2.1 and pci2.2
            52320: 03/02/06: Mauricio Lange: Re: difference between pci2.1 and pci2.2
    52311: 03/02/06: Philipp Krause: Re: difference between pci2.1 and pci2.2
52150: 03/02/03: Markus Meng: Spartan-II OBUF Driver Impedance
    52159: 03/02/03: Austin Lesea: Re: Spartan-II OBUF Driver Impedance
52155: 03/02/03: Johannes Sandvall: Modules in a large design
    52163: 03/02/03: Ray Andraka: Re: Modules in a large design
        52205: 03/02/04: Kate Kelley: Re: Modules in a large design
            52209: 03/02/04: Ray Andraka: Re: Modules in a large design
52156: 03/02/03: Johannes Sandvall: Coregenerator Accum place problem (constraints)
52157: 03/02/03: Ernest Jamro: which microprocessor core?
    52158: 03/02/03: Nicholas C. Weaver: Re: which microprocessor core?
        52164: 03/02/03: Ray Andraka: Re: which microprocessor core?
            52568: 03/02/13: Josh Pfrimmer: Re: which microprocessor core?
                52575: 03/02/13: Eric Smith: Re: which microprocessor core?
52161: 03/02/03: Paul Sereno: 3.3 Volt tolerance in Virtex II Pro...
    52166: 03/02/03: Austin Lesea: Re: 3.3 Volt tolerance in Virtex II Pro...
        52172: 03/02/04: Jim Granville: Re: Voltage Creep ( was 3.3 Volt tolerance in Virtex II Pro...)
52165: 03/02/03: Peter Sommerfeld: Using Quartus II SignalTap with Tcl
52167: 03/02/03: Paul Martek: Altera Stratix terminator technology
    52170: 03/02/03: Austin Lesea: Re: Altera Stratix terminator technology
        52566: 03/02/13: Greg Steinke: Re: Altera Stratix terminator technology
            52570: 03/02/13: Austin Lesea: Re: Altera Stratix terminator technology
52173: 03/02/03: Roberto Gallo: Group Multiple tables
    52175: 03/02/03: Tullio Grassi: Re: Group Multiple tables
        52371: 03/02/07: Vaughn Betz: Re: Group Multiple tables
    52180: 03/02/03: Mike Treseler: Re: Group Multiple tables
        52193: 03/02/04: Amit: Re: Group Multiple tables
    52221: 03/02/04: Prashant: Re: Group Multiple tables
        52228: 03/02/04: Mike Treseler: Re: Group Multiple tables
52174: 03/02/03: bams: xilinx tools: How to convert Schematic design to VHDL code
    52176: 03/02/03: Chen Wei Tseng: Re: xilinx tools: How to convert Schematic design to VHDL code
        52190: 03/02/03: bams: Re: xilinx tools: How to convert Schematic design to VHDL code
            52207: 03/02/04: Chen Wei Tseng: Re: xilinx tools: How to convert Schematic design to VHDL code
            52222: 03/02/04: naveen: Re: xilinx tools: How to convert Schematic design to VHDL code
52177: 03/02/03: Nial Stewart: Targeting the VirtexII version of Picoblaze at a SpartanII....
    52181: 03/02/03: Theron Hicks: Re: Targeting the VirtexII version of Picoblaze at a SpartanII....
        52280: 03/02/05: Nial Stewart: Re: Targeting the VirtexII version of Picoblaze at a SpartanII....
52182: 03/02/04: Florian-Wolfgang Stock: Routing in JBits
    52197: 03/02/04: svhb: Re: Spice - Powersupply
52188: 03/02/03: azim premji: Difference between : CPLD , FPGA , ASICS
    52192: 03/02/04: Uwe Bonnes: Re: Difference between : CPLD , FPGA , ASICS
    52196: 03/02/04: S. Ramirez: Re: Difference between : CPLD , FPGA , ASICS
        52198: 03/02/04: Jonathan Bromley: Re: Difference between : CPLD , FPGA , ASICS
            52203: 03/02/04: Rene Tschaggelar: Re: Difference between : CPLD , FPGA , ASICS
            52237: 03/02/05: S. Ramirez: Re: Difference between : CPLD , FPGA , ASICS
    52211: 03/02/04: Theron Hicks: Re: Difference between : CPLD , FPGA , ASICS
52189: 03/02/04: Bill Turnip: What's the difference: WebPack 5.1 vs. Xilinx Student Edition 4.2i ?
    52194: 03/02/04: Alex Gibson: Re: What's the difference: WebPack 5.1 vs. Xilinx Student Edition 4.2i ?
    52234: 03/02/04: Steve Lass: Re: What's the difference: WebPack 5.1 vs. Xilinx Student Edition 4.2i ?
52191: 03/02/04: David: Project fits in Leonardo, not in maxplus?!?
    52206: 03/02/04: Mike Treseler: Re: Project fits in Leonardo, not in maxplus?!?
52195: 03/02/04: Noddy: First ISE design...
52199: 03/02/04: sadik: Can't start server quartus_cmp in quartus II 1.0
    52204: 03/02/04: Mike Treseler: Re: Can't start server quartus_cmp in quartus II 1.0
    52236: 03/02/05: Subroto Datta: Re: Can't start server quartus_cmp in quartus II 1.0
    52487: 03/02/11: Mike Treseler: Re: Can't start server quartus_cmp in quartus II 1.0
52200: 03/02/04: Young-Su Kwon: Quartus II's VQM to EDIF.
    52235: 03/02/05: Xanatos: Re: Quartus II's VQM to EDIF.
52208: 03/02/04: Steve Charlwood: Partitioning interconnect in Xilinx FPGAs
    52210: 03/02/04: Kate Kelley: Re: Partitioning interconnect in Xilinx FPGAs
        52224: 03/02/04: Kate Kelley: Re: Partitioning interconnect in Xilinx FPGAs
52212: 03/02/04: bams: component instantiation in Xilinx
    52213: 03/02/04: Alan Raphael: Re: component instantiation in Xilinx
    52220: 03/02/04: Ray Andraka: Re: component instantiation in Xilinx
52214: 03/02/04: douglas fast: xilinx virtex II floorplanning
    52219: 03/02/04: Ray Andraka: Re: xilinx virtex II floorplanning
    52223: 03/02/04: ac: Re: xilinx virtex II floorplanning
        52230: 03/02/05: Ray Andraka: Re: xilinx virtex II floorplanning
            52283: 03/02/05: douglas fast: Re: xilinx virtex II floorplanning
52225: 03/02/04: Garry Allen: low pass FIR filter in FPGA
    52229: 03/02/05: Ray Andraka: Re: low pass FIR filter in FPGA
    52245: 03/02/05: Alexander Belov: Re: low pass FIR filter in FPGA
    52253: 03/02/05: <vt313@comsys.ntu-kpi.kiev.ua>: Re: low pass FIR filter in FPGA
    52322: 03/02/06: jetmarc: Re: low pass FIR filter in FPGA
        52388: 03/02/07: John_H: Re: low pass FIR filter in FPGA
            52434: 03/02/09: Garry Allen: Re: low pass FIR filter in FPGA
    52362: 03/02/07: <news@rtrussell.co.uk>: Re: low pass FIR filter in FPGA
52226: 03/02/04: Vishker: Clock Enables
    52227: 03/02/04: Ray Andraka: Re: Clock Enables
    52232: 03/02/04: Peter Alfke: Re: Clock Enables
        52243: 03/02/05: Jussi =?ISO-8859-1?Q?L=E4hteenm=E4ki?=: Re: Clock Enables
            52244: 03/02/05: Jan De Ceuster: Re: Clock Enables
                52248: 03/02/05: Jonathan Bromley: Re: Clock Enables
                    52275: 03/02/05: Brian Guralnick: Re: Clock Enables
            52279: 03/02/05: Vishker: Re: Clock Enables
                52281: 03/02/05: Peter Alfke: Re: Clock Enables
                    52288: 03/02/05: Vishker: Re: Clock Enables
                        52310: 03/02/06: John_H: Re: Clock Enables
                            52319: 03/02/06: Ray Andraka: Re: Clock Enables
                                52339: 03/02/06: Jay: Re: Clock Enables
                                    52390: 03/02/07: Jay: Re: Clock Enables
                        52312: 03/02/06: Peter Alfke: Re: Clock Enables
                            52313: 03/02/06: Nicholas C. Weaver: Re: Clock Enables
                52305: 03/02/06: Caleb Hess: Re: Clock Enables
            52406: 03/02/08: Rudolf Usselmann: Re: Clock Enables
        52266: 03/02/05: Theron Hicks: Re: Clock Enables
            52295: 03/02/06: Yves Tchapda: Re: Clock Enables
                52321: 03/02/06: Theron Hicks: Re: Clock Enables
                    52329: 03/02/06: Theron Hicks (Terry): Re: Clock Enables
    52233: 03/02/05: John Williams: Re: Clock Enables
    52272: 03/02/05: Bob Perlman: Re: Clock Enables
        52290: 03/02/06: Jonathan Bromley: Re: Clock Enables
        52291: 03/02/06: Philip Freidin: Re: Clock Enables
        52330: 03/02/06: Theron Hicks (Terry): Re: Clock Enables
52231: 03/02/04: David: DSP design in fpga - general guidelines please.
    52258: 03/02/05: Ray Andraka: Re: DSP design in fpga - general guidelines please.
52246: 03/02/05: <khtsoi@pc90026.cse.cuhk.edu.hk>: Xilinx ISE optimization
    52247: 03/02/05: Hal Murray: Re: Xilinx ISE optimization
        52250: 03/02/05: <khtsoi@pc90026.cse.cuhk.edu.hk>: Re: Xilinx ISE optimization
            52265: 03/02/05: John_H: Re: Xilinx ISE optimization
52249: 03/02/05: Talal: Mix VHDL with Verilog modules
52251: 03/02/05: Niels Thomsen: Distributing component without source
    52257: 03/02/05: <khtsoi@pc90026.cse.cuhk.edu.hk>: Re: Distributing component without source
52252: 03/02/05: Skillwood: clock ditribution tree
    52255: 03/02/05: Jeffrey Turner: Re: clock ditribution tree
    52256: 03/02/05: Sander Vesik: Re: clock ditribution tree
    52271: 03/02/05: Tauno Voipio: Re: clock ditribution tree
        52303: 03/02/06: Yves Tchapda: Re: clock ditribution tree
        52318: 03/02/06: Thomas: Re: clock ditribution tree
            52323: 03/02/06: MR: Re: clock ditribution tree
                52335: 03/02/06: Theron Hicks (Terry): Re: clock ditribution tree
    52297: 03/02/06: MooCow: Re: clock ditribution tree
52254: 03/02/05: Viral Shah: Virtex-2 Timing Simulation - 5.1i Service pack-3
52259: 03/02/05: Salman Sheikh: Nallatech Ballynuey 3
52260: 03/02/05: Alphaboran: Xilinx Foundation 5.1: reasons to upgrade
    52282: 03/02/05: Andras Tantos: Re: Xilinx Foundation 5.1: reasons to upgrade
        52286: 03/02/06: Neeraj Varma: Re: Xilinx Foundation 5.1: reasons to upgrade
    52316: 03/02/06: Patrick Mullarky: Re: Xilinx Foundation 5.1: reasons to upgrade
        52381: 03/02/07: Alphaboran: Re: Xilinx Foundation 5.1: reasons to upgrade
    52598: 03/02/15: <hamish@cloud.net.au>: Re: Xilinx Foundation 5.1: reasons to upgrade
52263: 03/02/05: Florin Franovici: Help needed
    52264: 03/02/05: John_H: Re: Help needed
        52267: 03/02/05: Florin Franovici: Re: Help needed
            52268: 03/02/05: Buddy Smith: Re: Help needed
                52300: 03/02/06: Aurash Lazarut: Re: Help needed
                    52302: 03/02/06: Ray Andraka: Re: Help needed
                        52304: 03/02/06: Aurash Lazarut: Re: Help needed
                            52309: 03/02/06: Ray Andraka: Re: Help needed
                                52317: 03/02/06: Ray Andraka: Re: Help needed
52269: 03/02/05: Ravi Bhormish: A forum for SystemC
52273: 03/02/05: Nicholas Girde: Switching synthesis tools
    52277: 03/02/05: Ray Andraka: Re: Switching synthesis tools
        52292: 03/02/06: Jonathan Bromley: Re: Switching synthesis tools
            52384: 03/02/07: Nicholas Girde: Re: Switching synthesis tools
                52392: 03/02/07: Jonathan Bromley: Re: Switching synthesis tools
            52562: 03/02/13: Nicholas Girde: Re: Switching synthesis tools
    52298: 03/02/06: <khtsoi@pc90026.cse.cuhk.edu.hk>: Re: Switching synthesis tools
        52301: 03/02/06: Petter Gustad: Re: Switching synthesis tools
52274: 03/02/05: Tom: JTAG from CAN
    52289: 03/02/06: Martin Thompson: Re: JTAG from CAN
52276: 03/02/05: Wojciech Zabolotny: Java NullPointerException in Xilinx System Generator 2.2
    52278: 03/02/05: Wojciech Zabolotny: Re: Java NullPointerException in Xilinx System Generator 2.2 & 2.3
        52293: 03/02/06: Wojciech Zabolotny: Re: SOLVED! - Bug in Xilinx SysGen (Was: Java NullPointerException
52285: 03/02/05: Jerry: Redhat versions
    52294: 03/02/06: Alan Fitch: Re: Redhat versions
52287: 03/02/06: Michael: xsvf, CoolrunnerII and XAPP058
52299: 03/02/06: Giaccaglini Giorgio: NIOS and ACEX1K
    52358: 03/02/07: Nial Stewart: Re: NIOS and ACEX1K
    52363: 03/02/07: Mahesh M. Bandi: Re: NIOS and ACEX1K
52306: 03/02/06: max: Max+PlusII: Design Doctor: synchronized by another clock
    52307: 03/02/06: nospam: Re: Max+PlusII: Design Doctor: synchronized by another clock
    52445: 03/02/10: max: Re: Max+PlusII: Design Doctor: synchronized by another clock:Counter
52308: 03/02/06: Ruth: Silly Quartus Question
    52448: 03/02/10: Greg Deuerling: Re: Silly Quartus Question
    52472: 03/02/11: Roger: Re: Silly Quartus Question
        52520: 03/02/12: Ruth: Re: Silly Quartus Question
            52578: 03/02/14: Roger: Re: Silly Quartus Question
                52579: 03/02/14: Nial Stewart: Re: Silly Quartus Question
52314: 03/02/06: Aroen (nospam): Parsic
52315: 03/02/06: Tom: Re: JTAG from CAN
52324: 03/02/07: Jim Raynor: HELP NEEDED
    52379: 03/02/07: Patrick Mullarky: Re: HELP NEEDED
    52404: 03/02/08: Kevin Brace: Re: HELP NEEDED
52325: 03/02/06: Kevin Brace: Quartus II 2.2 doesn't run when installed to a newly transferred hard
    52334: 03/02/06: Theron Hicks (Terry): Re: Quartus II 2.2 doesn't run when installed to a newly transferred
        52336: 03/02/06: Mahesh M. Bandi: Re: Quartus II 2.2 doesn't run when installed to a newly transferred hard drive
            52340: 03/02/06: Kevin Brace: Re: Quartus II 2.2 doesn't run when installed to a newly transferred
                    52345: 03/02/07: Mahesh M. Bandi: Re: Quartus II 2.2 doesn't run when installed to a newly transferred hard drive
                52343: 03/02/07: Mahesh M. Bandi: Re: Quartus II 2.2 doesn't run when installed to a newly transferred hard drive
                52344: 03/02/07: Mahesh M. Bandi: Re: Quartus II 2.2 doesn't run when installed to a newly transferred hard drive
        52341: 03/02/06: Kevin Brace: Re: Quartus II 2.2 doesn't run when installed to a newly transferred
52326: 03/02/07: Gregory C. Read: Contract Rates?
    52346: 03/02/07: Austin Franklin: Re: Contract Rates?
        52402: 03/02/07: hamilton: Re: Contract Rates?
52327: 03/02/06: naveen: debounce circuit
    52328: 03/02/06: Peter Alfke: Re: debounce circuit
    52333: 03/02/06: Theron Hicks (Terry): Re: debounce circuit
    52347: 03/02/07: Bill Turnip: Re: debounce circuit
52331: 03/02/06: Theron Hicks (Terry): USB2 or firewire or 100Mb ethernet link to FPGA design
    52332: 03/02/07: Nicholas C. Weaver: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52337: 03/02/06: Theron Hicks (Terry): Re: USB2 or firewire or 100Mb ethernet link to FPGA design
            52338: 03/02/07: Nicholas C. Weaver: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52387: 03/02/07: Eric Smith: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52348: 03/02/07: Nobody: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52351: 03/02/07: Blake: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
            52365: 03/02/07: Theron Hicks: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52355: 03/02/07: Aurash Lazarut: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52366: 03/02/07: Theron Hicks: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
            52405: 03/02/08: Alex Gibson: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52509: 03/02/12: David A Hand: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
            52514: 03/02/12: Aurash Lazarut: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52374: 03/02/07: John_H: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52380: 03/02/07: Theron Hicks: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52401: 03/02/07: Jeff Cunningham: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52413: 03/02/08: Peter Wallace: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52422: 03/02/09: Allan Herriman: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
        52537: 03/02/12: Marc Randolph: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52419: 03/02/08: Stephen Bradshaw: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
    52427: 03/02/09: john jakson: Re: USB2 or firewire or 100Mb ethernet link to FPGA design
52352: 03/02/07: Thorsten Bunte: Byteblaster II
52353: 03/02/07: RC: Multicontext FPGA
    52411: 03/02/08: john jakson: Re: Multicontext FPGA
        52412: 03/02/08: Florian-Wolfgang Stock: Re: Multicontext FPGA
            52414: 03/02/08: Nicholas C. Weaver: Re: Multicontext FPGA
                52457: 03/02/10: Christian Plessl: Re: Multicontext FPGA
                    52458: 03/02/10: Nicholas C. Weaver: Re: Multicontext FPGA
                        52464: 03/02/10: Christian Plessl: Re: Multicontext FPGA
                            52465: 03/02/10: Nicholas C. Weaver: Re: Multicontext FPGA
                        52470: 03/02/10: john jakson: Re: Multicontext FPGA
                            52471: 03/02/11: Nicholas C. Weaver: Re: Multicontext FPGA
                                52490: 03/02/11: john jakson: Re: Multicontext FPGA
                                    52491: 03/02/11: Nicholas C. Weaver: Re: Multicontext FPGA
                    52512: 03/02/12: Rudolf Usselmann: Re: Multicontext FPGA
                        52521: 03/02/12: Austin Lesea: Re: Multicontext FPGA
                            52557: 03/02/13: Kuan Zhou: Re: Multicontext FPGA
                                52558: 03/02/13: Nicholas C. Weaver: Re: Multicontext FPGA
                                    52572: 03/02/14: Kuan Zhou: Re: Multicontext FPGA
                                        52574: 03/02/14: Nicholas C. Weaver: Re: Multicontext FPGA
                                52559: 03/02/13: Austin Lesea: Re: Multicontext FPGA
                                    52573: 03/02/14: Kuan Zhou: Re: Multicontext FPGA
                            52607: 03/02/15: Rudolf Usselmann: Re: Multicontext FPGA
                52495: 03/02/11: Alex Martin: Re: Multicontext FPGA
52354: 03/02/07: Alphaboran: blockram initialization
    52356: 03/02/07: Aurash Lazarut: Re: blockram initialization
    52376: 03/02/07: Steve Lass: Re: blockram initialization
        52386: 03/02/07: Florian-Wolfgang Stock: Re: blockram initialization
            52454: 03/02/10: Alphaboran: Re: blockram initialization
52357: 03/02/07: Valeri Serebrianski: Virtex-II Pro PowerPC cache memory as main program/data storage?
    52423: 03/02/09: Allan Herriman: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
        52426: 03/02/09: <hamish@cloud.net.au>: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
            52438: 03/02/09: Valeri Serebrianski: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
                52442: 03/02/10: Allan Herriman: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
        52444: 03/02/10: Tim: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
    52508: 03/02/11: Peter Ryser: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
        52552: 03/02/13: Valeri Serebrianski: Re: Virtex-II Pro PowerPC cache memory as main program/data storage?
52359: 03/02/07: Roger: Quartus II problems
    52383: 03/02/07: Ruth: Re: Quartus II problems
    52418: 03/02/08: Peter Sommerfeld: Re: Quartus II problems
52360: 03/02/07: Rainer Schmidt: Partial Reconfiguration - Virtex-E
    52367: 03/02/07: Ray Andraka: Re: Partial Reconfiguration - Virtex-E
        52370: 03/02/07: Rainer Schmidt: Re: Partial Reconfiguration - Virtex-E
52361: 03/02/07: Lars Unger: Carry Save Adder
    52368: 03/02/07: Ray Andraka: Re: Carry Save Adder
        52815: 03/02/23: Ashish Kapoor: Re: Carry Save Adder
    52408: 03/02/08: Lars Unger: Re: Carry Save Adder
52364: 03/02/07: llaa57: Divide clock frequency by 1.5: output duty cycle is not 50%
    52372: 03/02/07: John_H: Re: Divide clock frequency by 1.5: output duty cycle is not 50%
    52378: 03/02/07: Peter Alfke: Re: Divide clock frequency by 1.5: output duty cycle is not 50%
    159827: 17/03/28: <vjkaran19@gmail.com>: Re: Divide clock frequency by 1.5: output duty cycle is not 50%
        159828: 17/03/28: Uwe Bonnes: Re: Divide clock frequency by 1.5: output duty cycle is not 50%
    159829: 17/03/28: <vjkaran19@gmail.com>: Re: Divide clock frequency by 1.5: output duty cycle is not 50%
52369: 03/02/07: gallenm: FFT Size and speed
    52389: 03/02/07: Peter Sommerfeld: Re: FFT Size and speed
    52394: 03/02/07: Paul Baxter: Re: FFT Size and speed
        52395: 03/02/07: Paul Baxter: Re: FFT Size and speed
            52398: 03/02/08: Ray Andraka: Re: FFT Size and speed
    52397: 03/02/08: Ray Andraka: Re: FFT Size and speed
    52455: 03/02/10: Ken Chapman: Re: FFT Size and speed
        52456: 03/02/10: gallenm: Re: FFT Size and speed
        52482: 03/02/11: Britta Fuhrmann: Re: FFT Size and speed
52373: 03/02/07: Chris Ward: LFSR: Galois and Fibonacci
    52382: 03/02/07: Bob Perlman: Re: LFSR: Galois and Fibonacci
        52424: 03/02/09: Allan Herriman: Re: LFSR: Galois and Fibonacci
            52443: 03/02/10: Chris Ward: Re: LFSR: Galois and Fibonacci
                52630: 03/02/17: Chris Ward: Re: LFSR: Galois and Fibonacci
                    52644: 03/02/18: Allan Herriman: Re: LFSR: Galois and Fibonacci
                        52649: 03/02/18: Chris Ward: Re: LFSR: Galois and Fibonacci
52375: 03/02/07: Andreas Schweizer: Xilinx Virtex-II Readback
    52385: 03/02/07: Steve Casselman: Re: Xilinx Virtex-II Readback
        52479: 03/02/11: Andreas Schweizer: Re: Xilinx Virtex-II Readback
52377: 03/02/07: ABloke: Annapolis Microsystems Wildcard
    52400: 03/02/08: Ray Andraka: Re: Annapolis Microsystems Wildcard
        53212: 03/03/06: ABloke: Re: Annapolis Microsystems Wildcard
            53218: 03/03/06: Ray Andraka: Re: Annapolis Microsystems Wildcard
                53226: 03/03/06: john jakson: Re: Annapolis Microsystems Wildcard
52391: 03/02/07: Petter Gustad: Xilinx ISE 4.2i killing Windows 2000?
    52393: 03/02/07: Chen Wei Tseng: Re: Xilinx ISE 4.2i killing Windows 2000?
        52396: 03/02/08: Petter Gustad: Re: Xilinx ISE 4.2i killing Windows 2000?
            52431: 03/02/09: Petter Gustad: Re: Xilinx ISE 4.2i killing Windows 2000?
                52439: 03/02/10: Petter Gustad: Re: Xilinx ISE 4.2i killing Windows 2000?
                    52452: 03/02/10: Chen Wei Tseng: Re: Xilinx ISE 4.2i killing Windows 2000?
        52466: 03/02/10: Lasse Langwadt Christensen: Re: Xilinx ISE 4.2i killing Windows 2000?
    52399: 03/02/08: Ray Andraka: Re: Xilinx ISE 4.2i killing Windows 2000?
        52432: 03/02/09: Petter Gustad: Re: Xilinx ISE 4.2i killing Windows 2000?
            52435: 03/02/10: David R Brooks: Re: Xilinx ISE 4.2i killing Windows 2000?
                52437: 03/02/10: Ray Andraka: Re: Xilinx ISE 4.2i killing Windows 2000?
52403: 03/02/08: Ralph Mason: XC9536XL - ISP
    52410: 03/02/08: Falk Brunner: Re: XC9536XL - ISP
52407: 03/02/08: Tan Peng Khiang: Overclock Xilinx Coolrunner 2 ?
    52409: 03/02/08: Uwe Bonnes: Re: Overclock Xilinx Coolrunner 2 ?
        52446: 03/02/10: Tan Peng Khiang: Re: Overclock Xilinx Coolrunner 2 ?
    52420: 03/02/08: John_H: Re: Overclock Xilinx Coolrunner 2 ?
52415: 03/02/08: Moss Ben: estimate area/speed effect
52416: 03/02/08: Moss Ben: estimate the area/speed effect
52417: 03/02/08: Peter Sommerfeld: JBits
    52450: 03/02/10: Eric Pearson: Re: JBits
        52485: 03/02/11: Steve Casselman: Re: JBits
            52494: 03/02/11: Ray Andraka: Re: JBits
            52501: 03/02/11: Eric Pearson: Re: JBits
                52564: 03/02/13: Steve Casselman: Re: JBits
                    52589: 03/02/14: Neil Franklin: Re: JBits
52421: 03/02/08: Guy: Win CE or CE.NET
52425: 03/02/09: =?ISO-8859-1?Q?Markus_Knau=DF?=: JTAG Download Problems iMPACT and Insight parallel cable
    52428: 03/02/09: Walter Dvorak: Re: JTAG Download Problems iMPACT and Insight parallel cable
        52429: 03/02/09: =?ISO-8859-1?Q?Markus_Knau=DF?=: Re: JTAG Download Problems iMPACT and Insight parallel cable
    52440: 03/02/10: Giuseppe³: Re: JTAG Download Problems iMPACT and Insight parallel cable
        52460: 03/02/10: =?ISO-8859-1?Q?Markus_Knau=DF?=: Re: JTAG Download Problems iMPACT and Insight parallel cable
52430: 03/02/09: Srini Krishnamoorthy: RTL area/delay estimation
52433: 03/02/09: Roger: Quartus / ModelSim
    52461: 03/02/10: Mike Treseler: Re: Quartus / ModelSim
    52473: 03/02/11: Roger: Re: Quartus / ModelSim
        52475: 03/02/11: Nial Stewart: Re: Quartus / ModelSim
        52483: 03/02/11: Prashant: Re: Quartus / ModelSim
            52486: 03/02/11: Nial Stewart: Re: Quartus / ModelSim
                52503: 03/02/12: Hal Murray: Re: Quartus / ModelSim
                52511: 03/02/12: Arash Salarian: Re: Quartus / ModelSim
    52522: 03/02/12: Ruth: Re: Quartus / ModelSim
        52577: 03/02/14: Roger: Re: Quartus / ModelSim
            52596: 03/02/15: Paul Baxter: Re: Quartus / ModelSim
52436: 03/02/09: Kevin Becker: Signal delays
    52451: 03/02/10: Aurash Lazarut: Re: Signal delays
52441: 03/02/10: Lijo: Synthesis Scripts
    52453: 03/02/10: Colin Paul Gloster: Re: Synthesis Scripts
        52459: 03/02/10: Kumaran Selvaratnam: Re: Synthesis Scripts
    52463: 03/02/10: Andre Powell: Re: Synthesis Scripts
        52489: 03/02/11: Andre Powell: Re: Synthesis Scripts
        52493: 03/02/11: Petter Gustad: Re: Synthesis Scripts
        52499: 03/02/11: Alexander Gnusin: Re: Synthesis Scripts
    52488: 03/02/11: Andy Botterill: Re: Synthesis Scripts
    52492: 03/02/11: Andy Botterill: Re: Synthesis Scripts
52447: 03/02/10: praveen: regarding PCI specification in that configuration register doubt
    52540: 03/02/12: Chris Hopkins: Re: regarding PCI specification in that configuration register doubt
52449: 03/02/11: John: Disabling XC9500XL write protection?
52467: 03/02/10: Florin Franovici: Directions needed
52468: 03/02/11: John_H: Fast BlockRAM updates
    52469: 03/02/11: Ray Andraka: Re: Fast BlockRAM updates
        52474: 03/02/11: Nial Stewart: Re: Fast BlockRAM updates
            52484: 03/02/11: John_H: Re: Fast BlockRAM updates
                52515: 03/02/12: Ray Andraka: Re: Fast BlockRAM updates
        52478: 03/02/11: RISC taker: Re: Fast BlockRAM updates
            52480: 03/02/11: Nial Stewart: Re: Fast BlockRAM updates
            52516: 03/02/12: Ray Andraka: Re: Fast BlockRAM updates
            52519: 03/02/12: Philip Freidin: Re: Fast BlockRAM updates
    52518: 03/02/12: Philip Freidin: Re: Fast BlockRAM updates
52476: 03/02/11: Dirk Koch: What is wrong with Altera Website?
    52477: 03/02/11: Marcin E. Hamerla: Re: What is wrong with Altera Website?
52481: 03/02/11: Brad Eckert: XST choking hazard
    52497: 03/02/12: David R Brooks: Re: XST choking hazard
    52500: 03/02/11: Chris Rosewarne: Re: XST choking hazard
52496: 03/02/11: Norbert Hermann Pramstaller - nhp: Distributed RAM/ROM
    52505: 03/02/11: Chris Rosewarne: Re: Distributed RAM/ROM
    52525: 03/02/12: Ray Andraka: Re: Distributed RAM/ROM
52498: 03/02/11: Moss Ben: estimation of area/speed
52502: 03/02/12: Mathew Orman: Einstein era>>the ultimate killer experiment! (do it your self instantaneous signal propagation above 40 x c speed )***************************
    52507: 03/02/12: Bernhard Holzmayer: Re: Einstein era>>the ultimate killer experiment! (do it your self instantaneous signal propagation above 40 x c speed )***************************
52504: 03/02/11: Matthew Fowle: Newbie Starting Places + Books?
    52506: 03/02/12: Russell: Re: Newbie Starting Places + Books?
        52510: 03/02/12: Hal Murray: Re: Newbie Starting Places + Books?
            52529: 03/02/12: Matthew Fowle: Re: Newbie Starting Places + Books?
        52517: 03/02/12: Ray Andraka: Re: Newbie Starting Places + Books?
            52530: 03/02/12: Matthew Fowle: Re: Newbie Starting Places + Books?
                52538: 03/02/12: Eric Crabill: Re: Newbie Starting Places + Books?
                52545: 03/02/13: Ray Andraka: Re: Newbie Starting Places + Books?
    52585: 03/02/14: Al Williams: Re: Newbie Starting Places + Books?
52513: 03/02/12: Peter Baltazarovic: Floorplanning of design written in verilogHDL Designer question
    52546: 03/02/12: Chris Rosewarne: Re: Floorplanning of design written in verilogHDL Designer question
52523: 03/02/12: denis.r: constant on maxplus
52524: 03/02/12: Kuan Zhou: difficulty in designing butterfly processor
    52528: 03/02/12: Ray Andraka: Re: difficulty in designing butterfly processor
52526: 03/02/12: Jon Jacox: Fractional Divide
    52527: 03/02/12: Peter Alfke: Re: Fractional Divide
    52547: 03/02/12: Chris Rosewarne: Re: Fractional Divide
52531: 03/02/12: Brian: Coolrunner II I/O speeds?
    52532: 03/02/13: Jim Granville: Re: Coolrunner II I/O speeds?
        52554: 03/02/13: Brian: Re: Coolrunner II I/O speeds?
            52555: 03/02/13: Austin Lesea: Re: Coolrunner II I/O speeds?
            52563: 03/02/14: Jim Granville: Re: Coolrunner II I/O speeds?
                52569: 03/02/13: Austin Lesea: Re: Coolrunner II I/O speeds?
                    52584: 03/02/14: Brian: Re: Coolrunner II I/O speeds?
    52533: 03/02/12: Uwe Bonnes: Re: Coolrunner II I/O speeds?
    52560: 03/02/13: John_H: Re: Coolrunner II I/O speeds?
52534: 03/02/12: cabaret: Card developpement
52535: 03/02/12: Frederic Bastenaire: Causing Modelsim to break using VHDL code
    52544: 03/02/13: Allan Herriman: Re: Causing Modelsim to break using VHDL code
    52549: 03/02/13: Lars Unger: Re: Causing Modelsim to break using VHDL code
    52551: 03/02/13: Ray Andraka: Re: Causing Modelsim to break using VHDL code
        52586: 03/02/14: Frederic Bastenaire: Re: Causing Modelsim to break using VHDL code
52536: 03/02/13: Ralph Mason: Setting CPLD options (Webpac)
    52542: 03/02/13: Matt: Re: Setting CPLD options (Webpac)
    52543: 03/02/13: Matt: Re: Setting CPLD options (Webpac)
52539: 03/02/12: news-server.houston.rr.com: FPGA for audio record and playback???
52541: 03/02/12: J.G.: FPGA for audio record and playback???
    52576: 03/02/13: Thomas Stanka: Re: FPGA for audio record and playback???
52548: 03/02/13: Christian Schuhegger: is there a xnf2edif program?
52553: 03/02/13: Salman Sheikh: Designware Components and Modelsim
52556: 03/02/13: naveen: BLACK BOX
    52635: 03/02/17: Mike Goldsmith: Re: BLACK BOX
52561: 03/02/13: Peter Alfke: Easy links to Xilinx documentation
    52565: 03/02/13: Tim: Re: Easy links to Xilinx documentation
    52676: 03/02/18: Marc Baker: Re: Easy links to Xilinx documentation
52580: 03/02/14: Heiko Kalte: Xilinx Virtex-II Pro OCM and PLB Clock Frequency
52581: 03/02/14: Matthew Warren: Xilinx BRAM enable or wrote
    52583: 03/02/15: Allan Herriman: Re: Xilinx BRAM enable or wrote
52582: 03/02/14: DougMiller: Xilinx CORDIC core v1.0 used to compute atan
    52605: 03/02/15: Rudolf Usselmann: Re: Xilinx CORDIC core v1.0 used to compute atan
    52612: 03/02/16: David Gesswein: Re: Xilinx CORDIC core v1.0 used to compute atan
52587: 03/02/14: Ron Huizen: Dynamic Reconfig Terminology
    52588: 03/02/14: Steve Casselman: Re: Dynamic Reconfig Terminology
52590: 03/02/14: Anand Kumar Rajaram: Implementing BIG state machhine
    52591: 03/02/14: Austin Lesea: Re: Implementing BIG state machhine
    52592: 03/02/15: Robert Sefton: Re: Implementing BIG state machhine
    52593: 03/02/15: <khtsoi@pc90026.cse.cuhk.edu.hk>: Re: Implementing BIG state machhine
    52594: 03/02/15: Philip Freidin: Re: Implementing BIG state machhine
52595: 03/02/15: Kyle Davis: Xilinx Flex License Utility
    52597: 03/02/15: Giuseppe³: Re: Xilinx Flex License Utility
52600: 03/02/15: Kresten Nørgaard: Altera disassembler
52601: 03/02/15: Jacky Renaux: end-around-carry
    52781: 03/02/21: Glen Herrmannsfeldt: Re: end-around-carry
        52810: 03/02/23: Jacky Renaux: Re: end-around-carry
52602: 03/02/15: Matthew Fowle: Star Bridge
52604: 03/02/15: Laura Faus: Virtex-E 600--2'sC/Straight Binary?
    52608: 03/02/16: Chris Rosewarne: Re: Virtex-E 600--2'sC/Straight Binary?
52606: 03/02/15: Kiran: Help wanted on Installing Xilinx on Win NT
    52609: 03/02/16: Uwe Bonnes: Re: Help wanted on Installing Xilinx on Win NT
    52613: 03/02/16: Jim: Re: Help wanted on Installing Xilinx on Win NT
        52616: 03/02/16: Uwe Bonnes: Re: Help wanted on Installing Xilinx on Win NT
52610: 03/02/16: Martin Sauer: VITAL_primitives Library in Xilinx WebPack
    52617: 03/02/16: Jim Wu: Re: VITAL_primitives Library in Xilinx WebPack
    52632: 03/02/17: Duane Clark: Re: VITAL_primitives Library in Xilinx WebPack
52611: 03/02/16: Frederic Bastenaire: JTAG and SVF
52618: 03/02/16: Kris Vorwerk: About automatically programming my FPGA
    52621: 03/02/16: Assaf Sarfati: Re: About automatically programming my FPGA
        52628: 03/02/17: Theron Hicks: Re: About automatically programming my FPGA
        52636: 03/02/17: Johann Glaser: Re: About automatically programming my FPGA
        52642: 03/02/17: Peter Wallace: Re: About automatically programming my FPGA
    52665: 03/02/18: jetmarc: Re: About automatically programming my FPGA
        52666: 03/02/18: Nicholas C. Weaver: Re: About automatically programming my FPGA
            52714: 03/02/20: Hal Murray: Re: About automatically programming my FPGA
                53684: 03/03/19: Turgut Abacioglu: Re: About automatically programming my FPGA
52619: 03/02/16: Amanda: XC9500 JTAG programming problems
    52865: 03/02/25: <awynne@controlsystems.com.au>: XC9500 JTAG programming problems
52620: 03/02/16: ron: pos-map and post-PAR mismatch
    52622: 03/02/17: Lars Unger: Re: pos-map and post-PAR mismatch
    52641: 03/02/17: Chris Rosewarne: Re: pos-map and post-PAR mismatch
        52678: 03/02/19: ron: Re: pos-map and post-PAR mismatch
            52741: 03/02/20: Chris Rosewarne: Re: pos-map and post-PAR mismatch
52623: 03/02/17: geeko: SoC pheripheral Design Resouraces
    52625: 03/02/17: Jan De Ceuster: Re: SoC pheripheral Design Resouraces
        52647: 03/02/18: geeko: Re: SoC pheripheral Design
            52658: 03/02/18: Rudolf Usselmann: Re: SoC pheripheral Design
                52726: 03/02/20: Jan De Ceuster: Re: SoC pheripheral Design
    52646: 03/02/18: Jussi =?ISO-8859-1?Q?L=E4hteenm=E4ki?=: Re: SoC pheripheral Design Resouraces
52624: 03/02/17: Stefano M: HDL Bench
    52639: 03/02/17: Chris Rosewarne: Re: HDL Bench
52626: 03/02/17: Akshay: Generating a sin wave with vhdl
    52629: 03/02/17: Theron Hicks: Re: Generating a sin wave with vhdl
    52631: 03/02/17: Ken Chapman: Re: Generating a sin wave with vhdl
        52688: 03/02/19: Akshay: Re: Generating a sin wave with vhdl
    52710: 03/02/19: Andy Peters: Re: Generating a sin wave with vhdl
        52747: 03/02/20: Ray Andraka: Re: Generating a sin wave with vhdl
        52750: 03/02/20: Akshay: Re: Generating a sin wave with vhdl
            52786: 03/02/21: Ray Andraka: Re: Generating a sin wave with vhdl
52627: 03/02/17: Iwo Mergler: PCMCIA + FPGA/CPLD
    52634: 03/02/17: Frederic Bastenaire: Re: PCMCIA + FPGA/CPLD
    52638: 03/02/17: Philip Freidin: Re: PCMCIA + FPGA/CPLD
        52656: 03/02/18: Iwo Mergler: Re: PCMCIA + FPGA/CPLD
            52668: 03/02/18: Philip Freidin: Re: PCMCIA + FPGA/CPLD
            52673: 03/02/18: Kolja Sulimma: Re: PCMCIA + FPGA/CPLD
                52686: 03/02/19: Iwo Mergler: Re: PCMCIA + FPGA/CPLD
            52715: 03/02/20: Hal Murray: Re: PCMCIA + FPGA/CPLD
52633: 03/02/17: Ken Frawley: Synopsys FC2 version 3.7.2 best so far
    52643: 03/02/17: Nicholas Girde: Re: Synopsys FC2 version 3.7.2 best so far
        52648: 03/02/18: Petter Gustad: Re: Synopsys FC2 version 3.7.2 best so far
            52663: 03/02/18: Ken Frawley: Re: Synopsys FC2 version 3.7.2 best so far
    52659: 03/02/18: FPGA EXpert: Re: Synopsys FC2 version 3.7.2 best so far
52637: 03/02/17: jakab tanko: Measuring die temperature
    52640: 03/02/17: Jim Wu: Re: Measuring die temperature
52645: 03/02/18: Basuki Endah Priyanto: Xilinx Filter
    52653: 03/02/18: Jim Wu: Re: Xilinx Filter
    52748: 03/02/20: Ray Andraka: Re: Xilinx Filter
52650: 03/02/18: Stamatis Sotiropoulos: PCB Design for a Xilinx Spartan-II FPGA
    52661: 03/02/18: John_H: Re: PCB Design for a Xilinx Spartan-II FPGA
    52674: 03/02/18: Kolja Sulimma: Re: PCB Design for a Xilinx Spartan-II FPGA
        52684: 03/02/19: Stamatis Sotiropoulos: Re: PCB Design for a Xilinx Spartan-II FPGA
            52696: 03/02/19: Hal Murray: Re: PCB Design for a Xilinx Spartan-II FPGA
                52700: 03/02/19: Peter Alfke: Re: PCB Design for a Xilinx Spartan-II FPGA
                    52701: 03/02/19: Nicholas C. Weaver: Re: PCB Design for a Xilinx Spartan-II FPGA
                        52702: 03/02/19: Hal Murray: Re: PCB Design for a Xilinx Spartan-II FPGA
                            52708: 03/02/19: Andras Tantos: Re: PCB Design for a Xilinx Spartan-II FPGA
                                52719: 03/02/20: Hal Murray: Re: PCB Design for a Xilinx Spartan-II FPGA
                                    52721: 03/02/20: Andras Tantos: Re: PCB Design for a Xilinx Spartan-II FPGA
                                        52722: 03/02/20: Hal Murray: Re: PCB Design for a Xilinx Spartan-II FPGA
                                            52771: 03/02/21: Kolja Sulimma: Re: PCB Design for a Xilinx Spartan-II FPGA
                        52745: 03/02/20: Marc Randolph: Re: PCB Design for a Xilinx Spartan-II FPGA
52651: 03/02/18: Pascal CADIC: Simulation of FIFO in Spartan IIE
52652: 03/02/18: Ken: Xilinx multi-cycle constraints report
    52683: 03/02/19: <hamish@cloud.net.au>: Re: Xilinx multi-cycle constraints report
        52687: 03/02/19: Ken: Re: Xilinx multi-cycle constraints report
            52806: 03/02/23: <hamish@cloud.net.au>: Re: Xilinx multi-cycle constraints report
52655: 03/02/18: Derek Shiels: Montgomery Bit-serial multiplier
52657: 03/02/18: Ryan: Code layout considerations
    52807: 03/02/23: Rudolf Usselmann: Re: Code layout considerations
    52813: 03/02/23: Mike Treseler: Re: Code layout considerations
52660: 03/02/18: Valli: Flop count..
    52677: 03/02/18: Marc Randolph: Re: Flop count..
        52804: 03/02/22: Jonathan Bromley: Re: Flop count..
52664: 03/02/18: RM: Xilinx Virtex-IIP multipliers
    52669: 03/02/18: Peter Alfke: Re: Xilinx Virtex-IIP multipliers
52667: 03/02/18: Frederic Bastenaire: Communicating with a configured FPGA through the JTAG interface
    52671: 03/02/18: Steve Casselman: Re: Communicating with a configured FPGA through the JTAG interface
        52763: 03/02/20: Frederic Bastenaire: Re: Communicating with a configured FPGA through the JTAG interface
52672: 03/02/18: Xateta: Verilog failed,please help
    52699: 03/02/19: Spam Hater 7: Re: Verilog failed,please help
        52738: 03/02/20: Xateta: Re: Verilog failed,please help
            52753: 03/02/20: John Providenza: Re: Verilog failed,please help
52679: 03/02/19: Steve T Shannon: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
    52704: 03/02/19: Lasse Langwadt Christensen: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
    52709: 03/02/19: Kevin Brace: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
        52736: 03/02/20: Steve T Shannon: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
            52817: 03/02/23: Clyde R. Shappee: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
                52845: 03/02/24: Andy Peters: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
                    52864: 03/02/24: Clyde R. Shappee: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
    52717: 03/02/20: Hal Murray: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
        52737: 03/02/20: Steve T Shannon: Re: Quick FPGA PCI I/O in Spartan-IIE for single peripheral
52680: 03/02/19: Lars Unger: XCV800 Configuration PROM
    52682: 03/02/19: Neeraj Varma: Re: XCV800 Configuration PROM
    52728: 03/02/20: Lars Unger: Re: XCV800 Configuration PROM
    52739: 03/02/20: Jens Hildebrandt: Re: XCV800 Configuration PROM
52681: 03/02/19: digari: Gate boosting
    52742: 03/02/20: Paul Leventis (at home): Re: Gate boosting
        52765: 03/02/20: Ljubisa Bajic: Re: Gate boosting
            52769: 03/02/21: Paul Leventis (at home): Re: Gate boosting
                52772: 03/02/21: digari: Re: Gate boosting
                52782: 03/02/21: Ljubisa Bajic: Re: Gate boosting
        52767: 03/02/20: john jakson: Re: Gate boosting
    52783: 03/02/21: Philip Freidin: Re: Gate boosting
        52784: 03/02/21: Austin Lesea: Re: Gate boosting
        52785: 03/02/21: Peter Alfke: Re: Gate boosting
52685: 03/02/19: chris Shaw: ABEL Help!
    52698: 03/02/20: Jim Granville: Re: ABEL Help!
    52727: 03/02/20: Bertram Geiger: Re: ABEL Help!
        52730: 03/02/20: chris Shaw: Re: ABEL Help!
            52910: 03/02/25: Dennis McCrohan: Re: ABEL Help!
52689: 03/02/19: Dominique: crc implementation
    52705: 03/02/19: Jim Wu: Re: crc implementation
        52716: 03/02/19: Vikram: Re: crc implementation
52690: 03/02/19: David Brown: Should I choose Xilink or Altera for a small project
    52691: 03/02/19: Nicholas C. Weaver: Re: Should I choose Xilink or Altera for a small project
    52693: 03/02/19: Peter Alfke: Re: Should I choose Xilink or Altera for a small project
        52724: 03/02/20: Petter Gustad: Re: Should I choose Xilink or Altera for a small project
            52752: 03/02/20: Peter Alfke: Re: Should I choose Xilink or Altera for a small project
        52729: 03/02/20: Fredrik: Re: Should I choose Xilink or Altera for a small project
            52732: 03/02/20: David Brown: Re: Should I choose Xilink or Altera for a small project
            52758: 03/02/20: Peter Alfke: Re: Should I choose Xilink or Altera for a small project
                52916: 03/02/25: Clyde R. Shappee: Re: Should I choose Xilink or Altera for a small project
        52733: 03/02/20: David Brown: Re: Should I choose Xilink or Altera for a small project
        52740: 03/02/20: Russell Shaw: Re: Should I choose Xilink or Altera for a small project
        52798: 03/02/22: Martin Schoeberl: Re: Should I choose Xilink or Altera for a small project
    52725: 03/02/20: Petter Gustad: Re: Should I choose Xilink or Altera for a small project
        52734: 03/02/20: David Brown: Re: Should I choose Xilink or Altera for a small project
        52766: 03/02/20: Alan Calac: Re: Should I choose Xilink or Altera for a small project
    52778: 03/02/21: Theron Hicks: Re: Should I choose Xilink or Altera for a small project
        52779: 03/02/21: Nicholas C. Weaver: Re: Should I choose Xilink or Altera for a small project
52692: 03/02/19: Conor Carr: Spartan 1 : Help
    52697: 03/02/19: Aurash Lazarut: Re: Spartan 1 : Help
52694: 03/02/19: Martin Schoeberl: Cyclone EP1C6/EP1C12 pinout
52695: 03/02/19: Dr. Jones: WebPack 4.2i and Block RAM instantiation
    52703: 03/02/19: Jim Wu: Re: WebPack 4.2i and Block RAM instantiation
        52723: 03/02/20: Dr. Jones: Re: WebPack 4.2i and Block RAM instantiation
            52749: 03/02/20: John Providenza: Re: WebPack 4.2i and Block RAM instantiation
                52756: 03/02/20: Dr. Jones: Re: WebPack 4.2i and Block RAM instantiation
52706: 03/02/19: Was: Messaging Unit + Dorbells etc ..
    52707: 03/02/19: Richard Iachetta: Re: Messaging Unit + Dorbells etc ..
52711: 03/02/20: MikeJ: New Pacman in an FPGA released
52712: 03/02/19: ron: hold violation error
    52720: 03/02/20: Bob: Re: hold violation error
        52770: 03/02/21: ron: Re: hold violation error
            52774: 03/02/21: Bob: Re: hold violation error
52713: 03/02/19: makmorbi: FPGA's at High Temperatures
    52849: 03/02/24: Martin Forsberg Lie: Re: FPGA's at High Temperatures
        52859: 03/02/24: Peter Alfke: Re: FPGA's at High Temperatures
    52858: 03/02/25: Jim Granville: Re: FPGA's at High Temperatures
52718: 03/02/20: Kload: Bus Attributes in Xilinx 2.1i Schematic Editor
52731: 03/02/20: Gary Partis: Inventra/Mentor USB
    52808: 03/02/23: Rudolf Usselmann: Re: Inventra/Mentor USB
52735: 03/02/20: Basuki Endah Priyanto: Synthesis Tools
    52768: 03/02/21: Matt: Re: Synthesis Tools
52743: 03/02/20: ZX: Quartus II problem
    52746: 03/02/20: Thorsten Bunte: Re: Quartus II problem
        52757: 03/02/20: ZX: Re: Quartus II problem
    52755: 03/02/20: Subroto Datta: Re: Quartus II problem
52744: 03/02/20: ZX: Re: How good are Megafunctions
52751: 03/02/20: Robert Hamilton: APEXII TRUELVDS
52754: 03/02/20: Joze Dedic: spartan2: combinatorial logic -> clock buffer = problem
    52760: 03/02/20: Falk Brunner: Re: spartan2: combinatorial logic -> clock buffer = problem
52759: 03/02/20: James Flanagan: Cupl Simulation Question
52761: 03/02/20: Barry Brown: Modelsim warnings about Spartan2 Block RAM read/write
    52773: 03/02/21: Jim: Re: Modelsim warnings about Spartan2 Block RAM read/write
52764: 03/02/20: Chris Rosewarne: Free Tool for defining FPGA pinouts
52775: 03/02/21: Stefan Kulke: questions: create mcs-file / problem with downloading
    52777: 03/02/21: Chen Wei Tseng: Re: questions: create mcs-file / problem with downloading
        52930: 03/02/26: Stefan Kulke: Re: questions: create mcs-file / problem with downloading
52776: 03/02/21: Timothée GROS: PC-CARD to ISA converter
52780: 03/02/21: Axel: FPGA : best case delay timings
52787: 03/02/21: Kevin Neilson: parameters in ANSI-style Verilog port maps
    52792: 03/02/21: Abhijit: Re: parameters in ANSI-style Verilog port maps
    52847: 03/02/24: Steven Sharp: Re: parameters in ANSI-style Verilog port maps
52788: 03/02/21: David: Lpm equivalent for Xilinx devices
    52802: 03/02/22: Mike Treseler: Re: Lpm equivalent for Xilinx devices
        52805: 03/02/22: David: Re: Lpm equivalent for Xilinx devices
            52809: 03/02/23: Uwe Bonnes: Re: Lpm equivalent for Xilinx devices
52789: 03/02/21: jsmith: spartan III what is it?
    52791: 03/02/22: Philip Freidin: Re: spartan III what is it?
        52793: 03/02/22: Bob: Re: spartan III what is it?
            52795: 03/02/22: Ben Twijnstra: Re: spartan III what is it?
                52797: 03/02/22: Uwe Bonnes: Re: spartan III what is it?
                    52799: 03/02/22: Nicholas C. Weaver: Re: spartan III what is it?
            52801: 03/02/22: Bob: Re: spartan III what is it?
        52800: 03/02/22: Marc Randolph: Re: spartan III what is it?
    52839: 03/02/24: mueller at scs dot ch: Re: spartan III what is it?
    52989: 03/02/27: Steve Knapp: Re: spartan III what is it?
52790: 03/02/21: RM: setting constraints for Xilinx xpower
    52887: 03/02/25: Brendan Cullen: Re: setting constraints for Xilinx xpower
52794: 03/02/22: Kresten Nørgaard: Timing diagram input
    52796: 03/02/22: Rene Tschaggelar: Re: Timing diagram input
    52811: 03/02/23: Tim Pagden: Re: Timing diagram input
        52814: 03/02/23: Mike Treseler: Re: Timing diagram input
        52974: 03/02/27: Kresten Nørgaard: Re: Timing diagram input
52803: 03/02/22: Goran: VHDL & FPGA Design tools
    52816: 03/02/23: Spam Hater: Re: VHDL & FPGA Design tools
    52818: 03/02/23: Kevin Brace: Re: VHDL & FPGA Design tools
        52821: 03/02/23: Duane Clark: Re: VHDL & FPGA Design tools
            52841: 03/02/24: Duane Clark: Re: VHDL & FPGA Design tools
                52866: 03/02/25: Matt: Re: VHDL & FPGA Design tools
                    52882: 03/02/25: siriuswmx: Re: VHDL & FPGA Design tools
                    52904: 03/02/25: Andras Tantos: Re: VHDL & FPGA Design tools
                        52914: 03/02/25: Jeff Cunningham: Re: VHDL & FPGA Design tools
                            52994: 03/02/27: Steve Lass: Re: VHDL & FPGA Design tools
        52825: 03/02/24: Goran: Re: VHDL & FPGA Design tools
            53100: 03/03/04: Ray Andraka: Re: VHDL & FPGA Design tools
                53120: 03/03/04: Goran: Re: VHDL & FPGA Design tools
                    53126: 03/03/04: Theron Hicks: Re: VHDL & FPGA Design tools
                    53166: 03/03/05: Ray Andraka: Re: VHDL & FPGA Design tools
                        53271: 03/03/09: AbdulMoeed: Re: VHDL & FPGA Design tools
52812: 03/02/23: Xateta: Force a rising edge of clk
    54395: 03/04/10: Stan Lackey: Re: Force a rising edge of clk
52822: 03/02/24: Kyle Davis: Static 1 and Static 0 Hazard
    52940: 03/02/26: Peter Tawdross: Re: Static 1 and Static 0 Hazard
52823: 03/02/23: naveen: need help
    52833: 03/02/24: Sasi: Re: need help
    52836: 03/02/24: naveen: Re: need help
        52838: 03/02/24: Jonathan Bromley: Re: need help
52824: 03/02/23: bams: interfacing keyboard to a xilinix fpga board
    52939: 03/02/26: Peter Tawdross: Re: interfacing keyboard to a xilinix fpga board
52826: 03/02/24: praveen: expansion ROM in PCI bridge
    52909: 03/02/25: Kevin Brace: Re: expansion ROM in PCI bridge
52827: 03/02/24: Muhammad Khan: fe_shell.exe needed
    52828: 03/02/24: Stephan Neuhold: Re: fe_shell.exe needed
    52857: 03/02/24: botao: Re: fe_shell.exe needed
52829: 03/02/24: Martin: Looking for Virtex2Pro and Linux (PPC)
    52850: 03/02/25: John Williams: Re: Looking for Virtex2Pro and Linux (PPC)
        52854: 03/02/24: Austin Lesea: Re: Looking for Virtex2Pro and Linux (PPC)
        54060: 03/04/01: Peter Ryser: Re: Looking for Virtex2Pro and Linux (PPC)
            54067: 03/04/02: John Williams: Re: Looking for Virtex2Pro and Linux (PPC)
52830: 03/02/24: Steve T Shannon: two-clock FSM?
    52843: 03/02/24: Mike Treseler: Re: two-clock FSM?
    52894: 03/02/25: Loi Tran: Re: two-clock FSM?
52831: 03/02/24: Markus Meng: Program a Serial Data Flash - SPI - Interface through a CPLD via JTAG
52832: 03/02/24: Jim Wu: Re: Program a Serial Data Flash - SPI - Interface through a CPLD via JTAG
    52842: 03/02/24: Markus Meng: Re: Program a Serial Data Flash - SPI - Interface through a CPLD via JTAG
52835: 03/02/24: Joze Dedic: Spartan2 internal bus state?
    52985: 03/02/27: Dr. Jones: Re: Spartan2 internal bus state?
52837: 03/02/24: naveen: HELP WANTED
    52840: 03/02/24: Muzaffer Kal: Re: HELP WANTED
        52861: 03/02/24: naveen: Re: HELP WANTED
52844: 03/02/24: John Larkin: Xilinx FPGA on PCI board
    52851: 03/02/24: Uwe Bonnes: Re: Xilinx FPGA on PCI board
    52871: 03/02/25: Thorsten Trenz: Re: Xilinx FPGA on PCI board
    52872: 03/02/25: Lars Unger: Re: Xilinx FPGA on PCI board
    52881: 03/02/25: Greg Deuerling: Re: Xilinx FPGA on PCI board
52846: 03/02/24: mat: LVDS LCD
    52853: 03/02/24: Martin Forsberg Lie: Re: LVDS LCD
    52870: 03/02/25: Philip Freidin: Re: LVDS LCD
        52879: 03/02/25: Martin Thompson: Re: LVDS LCD
52848: 03/02/24: Scott: Connect USB device to Spartan 2e FPGA
    52852: 03/02/24: Uwe Bonnes: Re: Connect USB device to Spartan 2e FPGA
    52856: 03/02/24: Theron Hicks: Re: Connect USB device to Spartan 2e FPGA
        52869: 03/02/24: Scott: Re: Connect USB device to Spartan 2e FPGA
            52889: 03/02/25: Theron Hicks: Re: Connect USB device to Spartan 2e FPGA
                52918: 03/02/25: Scott: Re: Connect USB device to Spartan 2e FPGA
        53102: 03/03/04: Ray Andraka: Re: Connect USB device to Spartan 2e FPGA
52855: 03/02/24: Jeremy Whatley: Delay element in Virtex2
    52867: 03/02/25: Muzaffer Kal: Re: Delay element in Virtex2
    52895: 03/02/25: larry: Re: Delay element in Virtex2
    52898: 03/02/25: Kolja Sulimma: Re: Delay element in Virtex2
    52900: 03/02/25: Peter Alfke: Re: Delay element in Virtex2
    52906: 03/02/25: Peter Monta: Re: Delay element in Virtex2
52860: 03/02/24: bams: help me figure out this problem?
    52862: 03/02/24: Peter Alfke: Re: help me figure out this problem?
    52897: 03/02/25: John_H: Re: help me figure out this problem?
52868: 03/02/24: geo: AHB
    52873: 03/02/25: Charles Gardiner: AHB
52874: 03/02/25: Erik Spaenig: config SlewRate for PCI-pads in Xilinx WebPack ??
    52877: 03/02/25: Uwe Bonnes: Re: config SlewRate for PCI-pads in Xilinx WebPack ??
    52908: 03/02/25: Kevin Brace: Re: config SlewRate for PCI-pads in Xilinx WebPack ??
52875: 03/02/25: David Brown: Licencing for downloadable FPGA tools
    52878: 03/02/25: Neeraj Varma: Re: Licencing for downloadable FPGA tools
        52880: 03/02/25: David Brown: Re: Licencing for downloadable FPGA tools
            52913: 03/02/25: Jeff Cunningham: Re: Licencing for downloadable FPGA tools
                52921: 03/02/26: David Brown: Re: Licencing for downloadable FPGA tools
    52883: 03/02/25: Stuart Brorson: Re: Licencing for downloadable FPGA tools
        52886: 03/02/25: David Brown: Re: Licencing for downloadable FPGA tools
            52892: 03/02/25: Stuart Brorson: Re: Licencing for downloadable FPGA tools
                52912: 03/02/26: Russell Shaw: Re: Licencing for downloadable FPGA tools
        52891: 03/02/25: Uwe Bonnes: Re: Licencing for downloadable FPGA tools
            52893: 03/02/25: Stuart Brorson: Re: Licencing for downloadable FPGA tools
                52903: 03/02/25: Uwe Bonnes: Re: Licencing for downloadable FPGA tools
    52915: 03/02/25: Kevin Brace: Re: Licencing for downloadable FPGA tools
        52922: 03/02/26: David Brown: Re: Licencing for downloadable FPGA tools
52876: 03/02/25: sanjay: Decoupling Capacitor for CPLD
    53129: 03/03/04: David Kinsell: Re: Decoupling Capacitor for CPLD
52884: 03/02/25: Jim Wu: Re: Program a Serial Data Flash - SPI - Interface through a CPLD via JTAG
52885: 03/02/25: Brian Drummond: Simulating Coregen ROM?
52888: 03/02/25: Xateta: Help,please,Verilog
    52890: 03/02/25: Jonathan Bromley: Re: Help,please,Verilog
52896: 03/02/25: Markus Meng: Unprogrammed XC9536XL is driving the databus high
    52901: 03/02/25: Falk Brunner: Re: Unprogrammed XC9536XL is driving the databus high
        52905: 03/02/25: Markus Meng: Re: Unprogrammed XC9536XL is driving the databus high
            52907: 03/02/25: Peter Alfke: Re: Unprogrammed XC9536XL is driving the databus high
    52920: 03/02/26: Falser Klaus: Re: Unprogrammed XC9536XL is driving the databus high
        52946: 03/02/26: Markus Meng: Re: Unprogrammed XC9536XL is driving the databus high
            52949: 03/02/26: Markus Meng: Re: Unprogrammed XC9536XL ... the end ...
    52971: 03/02/27: jakab tanko: Re: Unprogrammed XC9536XL is driving the databus high
52899: 03/02/25: Johan Ditmar: Initializing multi-ported memories using MIF
    52995: 03/02/27: Subroto Datta: Re: Initializing multi-ported memories using MIF
52902: 03/02/25: Domagoj: Polynomial transform based DCT/IDCT
52911: 03/02/25: bams: do xilinx has this option ?
    52942: 03/02/26: Chen Wei Tseng: Re: do xilinx has this option ?
52919: 03/02/25: TI: VLSI outsourcing?
    52923: 03/02/26: Kevin Aylward: Re: VLSI outsourcing?
52924: 03/02/26: Jo Kenens (no_spam no_spam no_spam): configuring xilinx fpga with nand flash
    52928: 03/02/26: Martin Schoeberl: Re: configuring xilinx fpga with nand flash
        52933: 03/02/26: Jo Kenens (no_spam no_spam no_spam): Re: configuring xilinx fpga with nand flash
            52943: 03/02/26: Martin Schoeberl: Re: configuring xilinx fpga with nand flash
                52962: 03/02/27: Thomas Rudloff: Re: configuring xilinx fpga with nand flash
        52950: 03/02/27: Jim Granville: Re: configuring xilinx fpga with nand flash
            52955: 03/02/27: Martin Schoeberl: Re: configuring xilinx fpga with nand flash
52925: 03/02/26: Basuki Endah Priyanto: Xilinx Back-annotation Problem
52926: 03/02/26: panzo: Is anyone working with JBits there ?
    53108: 03/03/03: Alex Carreira: Re: Is anyone working with JBits there ?
        53167: 03/03/05: panzo: Re: Is anyone working with JBits there ?
52927: 03/02/26: Frederic Bastenaire: New release of Xilinx ISE tools (5.2)
    52929: 03/02/26: leon qin: Re: New release of Xilinx ISE tools (5.2)
    52952: 03/02/26: Eric Smith: Re: New release of Xilinx ISE tools (5.2)
52931: 03/02/26: Peter Tawdross: FPGA arch.
    52934: 03/02/26: Jonathan Bromley: Re: FPGA arch.
        52937: 03/02/26: Peter Tawdross: Re: FPGA arch.
            52944: 03/02/26: Nicholas C. Weaver: Re: FPGA arch.
                52958: 03/02/26: Kuan Zhou: Re: FPGA arch.
            52948: 03/02/26: Peter Alfke: Re: FPGA arch.
                53255: 03/03/08: Rick Filipkiewicz: Re: FPGA arch.
    52936: 03/02/26: Fritz: Re: FPGA arch.
52932: 03/02/26: Stamatis Sotiropoulos: Spartan II PCB, I/O pins consederations
    52935: 03/02/26: Uwe Bonnes: Re: Spartan II PCB, I/O pins consederations
    52947: 03/02/26: Peter Alfke: Re: Spartan II PCB, I/O pins consederations
        52976: 03/02/27: Theron Hicks: Re: Spartan II PCB, I/O pins consederations
            52981: 03/02/27: Austin Lesea: Re: Spartan II PCB, I/O pins consederations
                52988: 03/02/27: Theron Hicks: Re: Spartan II PCB, I/O pins consederations
                    52992: 03/02/27: Austin Lesea: Re: Spartan II PCB, I/O pins consederations
                53070: 03/03/03: Stamatis Sotiropoulos: Re: Spartan II PCB, bypass Capacitors
                    53073: 03/03/03: Uwe Bonnes: Re: Spartan II PCB, bypass Capacitors
                    53107: 03/03/04: Dziadek: Re: Spartan II PCB, bypass Capacitors
                    53127: 03/03/04: Theron Hicks: Re: Spartan II PCB, bypass Capacitors
            52987: 03/02/27: Kolja Sulimma: Re: Spartan II PCB, I/O pins consederations
52938: 03/02/26: =?iso-8859-1?Q?Pawe=B3?= J. Rajda: Spartan2 configuration pins 5V tolerance...?
52941: 03/02/26: Taka: Programming Altera EPC1 with ByteBlaster
    52951: 03/02/26: Rene Tschaggelar: Re: Programming Altera EPC1 with ByteBlaster
    53078: 03/03/03: Greg Deuerling: Re: Programming Altera EPC1 with ByteBlaster
52945: 03/02/26: Jim: Xilinx Coolrunner-II Dev Kit
    52970: 03/02/28: Alex Gibson: Re: Xilinx Coolrunner-II Dev Kit
        52972: 03/02/27: Jim: Re: Xilinx Coolrunner-II Dev Kit
            53043: 03/03/01: Alex Gibson: Re: Xilinx Coolrunner-II Dev Kit
52953: 03/02/26: Jerry: linux vs windows
    52980: 03/02/27: Duane Clark: Re: linux vs windows
        52998: 03/02/27: Jerry: Re: linux vs windows
52956: 03/02/26: Gaga: XILINX MICROBLAZE ERRORS
    52957: 03/02/27: John Williams: Re: XILINX MICROBLAZE ERRORS
        52984: 03/02/27: Gaga: Re: XILINX MICROBLAZE ERRORS
            52996: 03/02/28: John Williams: Re: XILINX MICROBLAZE ERRORS
52959: 03/02/26: Rita_Conaty: picoChip - DSP as fast as an FPGA - is this for real
    52975: 03/02/27: Tim Olson: Re: picoChip - DSP as fast as an FPGA - is this for real
    52979: 03/02/27: Jan Gray: Re: picoChip - DSP as fast as an FPGA - is this for real
        53360: 03/03/11: Rupert Baines: Re: picoChip - DSP as fast as an FPGA - is this for real
52960: 03/02/27: Basuki Endah Priyanto: Extend PCI slot to outside PC
    52961: 03/02/27: fizz: Re: Extend PCI slot to outside PC
        52963: 03/02/27: Thomas Rudloff: Re: Extend PCI slot to outside PC
    52964: 03/02/27: Hal Murray: Re: Extend PCI slot to outside PC
        52983: 03/02/27: Steen Larsen: Re: Extend PCI slot to outside PC
52965: 03/02/27: Ralph Mason: xc9500 Low power mode
    52967: 03/02/27: Uwe Bonnes: Re: xc9500 Low power mode
        52991: 03/02/28: Ralph Mason: Re: xc9500 Low power mode
52966: 03/02/27: praveen: PCI specification question
    52969: 03/02/27: Thomas Rudloff: Re: PCI specification question
        53035: 03/02/28: Richard Iachetta: Re: PCI specification question
52968: 03/02/27: Jeniffer: Newbie Qn: Power connections with virtex FPGAs
    53000: 03/02/27: Chris Rosewarne: Re: Newbie Qn: Power connections with virtex FPGAs
52973: 03/02/27: Basuki Endah Priyanto: Re:Extend PCI slot to outside PC
    53008: 03/02/28: Graham Smart: Re: Extend PCI slot to outside PC
52977: 03/02/27: Nahum Barnea: several fpga high bandwidth questions
    52982: 03/02/27: Austin Lesea: Re: several fpga high bandwidth questions
        53050: 03/03/01: Nahum Barnea: Re: several fpga high bandwidth questions
    52990: 03/02/27: Marc Randolph: Re: several fpga high bandwidth questions
        53052: 03/03/01: Nahum Barnea: Re: several fpga high bandwidth questions
52997: 03/02/27: inamikadika: Altera APEX20KE timing issue
53001: 03/02/27: Scott: Implementing Picoblaze with Xilinx Webpack 4.2
53002: 03/02/28: Dirk Dörr: 10 MHz Clock out of 30 MHz
    53003: 03/02/28: Uwe Bonnes: Re: 10 MHz Clock out of 30 MHz
    53011: 03/02/28: Peter Alfke: Re: 10 MHz Clock out of 30 MHz
        53021: 03/02/28: Theron Hicks: Re: 10 MHz Clock out of 30 MHz
            53022: 03/02/28: Peter Alfke: Re: 10 MHz Clock out of 30 MHz
    53028: 03/02/28: John_H: Re: 10 MHz Clock out of 30 MHz
        53032: 03/02/28: Peter Alfke: Re: 10 MHz Clock out of 30 MHz
            53056: 03/03/02: Dirk Dörr: Re: 10 MHz Clock out of 30 MHz
53004: 03/02/28: Sam Duncan: Virtex II - Driving more than one global clock net from one incoming clock pin
    53061: 03/03/02: Chris Rosewarne: Re: Virtex II - Driving more than one global clock net from one incoming clock pin
        53077: 03/03/03: Marc Randolph: Re: Virtex II - Driving more than one global clock net from one incoming clock pin
            53124: 03/03/04: Sam Duncan: Re: Virtex II - Driving more than one global clock net from one incoming clock pin
53005: 03/02/28: Noddy: SDA FIR Filter...
    53041: 03/03/01: Muzaffer Kal: Re: SDA FIR Filter...
        53059: 03/03/02: Noddy: Re: SDA FIR Filter...
53006: 03/02/28: naveen: error in the design
53007: 03/02/28: Jonathan Bromley: Re: How to maintain pipeline delays
    53015: 03/02/28: Nicholas C. Weaver: Re: How to maintain pipeline delays
53010: 03/02/28: ed: guided par question
    53062: 03/03/02: Chris Rosewarne: Re: guided par question
        53097: 03/03/03: ed: Re: guided par question
53012: 03/02/28: Michael Nicklas: Avnet Cilicon Xilinx Virtex-E development kit
    53095: 03/03/03: Robert Abiad: Re: Avnet Cilicon Xilinx Virtex-E development kit
        53096: 03/03/03: Austin Lesea: Re: Avnet Cilicon Xilinx Virtex-E development kit
            53128: 03/03/04: Michael Nicklas: Re: Avnet Cilicon Xilinx Virtex-E development kit
            53142: 03/03/04: Robert Abiad: Re: Avnet Cilicon Xilinx Virtex-E development kit
53013: 03/02/28: Peter Alfke: Re: How to maintain pipeline delays
53014: 03/02/28: S Embree: IBUF : Pullup Resistors
    53016: 03/02/28: Peter Alfke: Re: IBUF : Pullup Resistors
        53023: 03/02/28: S Embree: Re: IBUF : Pullup Resistors
            53024: 03/02/28: Ad Verschueren: Re: IBUF : Pullup Resistors
            53026: 03/02/28: Peter Alfke: Re: IBUF : Pullup Resistors
53017: 03/02/28: Nicholas C. Weaver: PCB board design software vs outsourcing?
    53018: 03/02/28: Rene Tschaggelar: Re: PCB board design software vs outsourcing?
        53019: 03/02/28: Nicholas C. Weaver: Re: PCB board design software vs outsourcing?
            53025: 03/02/28: Rene Tschaggelar: Re: PCB board design software vs outsourcing?
            53033: 03/02/28: Steen Larsen: Re: PCB board design software vs outsourcing?
    53020: 03/02/28: Mike Treseler: Re: PCB board design software vs outsourcing?
        53251: 03/03/07: Clyde R. Shappee: Re: PCB board design software vs outsourcing?
    53030: 03/02/28: Marc Battyani: Re: PCB board design software vs outsourcing?
    53038: 03/02/28: Theron Hicks: Re: PCB board design software vs outsourcing?
    53064: 03/03/03: Hal Murray: Re: PCB board design software vs outsourcing?
        53075: 03/03/03: Gregory C. Read: Re: PCB board design software vs outsourcing?
    53098: 03/03/03: Robert Abiad: Re: PCB board design software vs outsourcing?
53027: 03/02/28: Roberto Gallo: FPGA programming question.
    53031: 03/02/28: Rene Tschaggelar: Re: FPGA programming question.
        53037: 03/02/28: Peter Alfke: Re: FPGA programming question.
            53042: 03/03/01: Rene Tschaggelar: Re: FPGA programming question.
        53076: 03/03/03: svhb: Re: FPGA programming question.
    53034: 03/02/28: Peter Alfke: Re: FPGA programming question.
        53036: 03/02/28: Roberto Gallo: Re: FPGA programming question.
            53039: 03/02/28: Peter Alfke: Re: FPGA programming question.
    53047: 03/03/01: Mikeandmax: Re: FPGA programming question.
    53707: 03/03/20: Turgut Abacioglu: Re: FPGA programming question.
    53716: 03/03/20: Peter Alfke: Re: FPGA programming question.
53029: 03/02/28: Marlboro: SCSI SPI-4 interface
    53110: 03/03/04: Fizz: Re: SCSI SPI-4 interface


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