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On Aug 21, 5:03 pm, Kevin Neilson <kevin_neil...@removethiscomcast.net> wrote: > stewa...@gmail.com wrote: > > I want to implement 1280x1024but cannot synthesize an 108MHz pixel > > block for the timing. I would prefer to use a 100 MHz (generated from > > 200) but can also make a 104 or 112 Mhz. > > > Normal 1280x1024 timing: > > Horizontal > > Resolution pixels: 1280 > > Front porch pixels: 48 > > Sync pulse pixels: 112 > > Back porch pixel: 248 > > Veritcle > > Resolution lines: 1024 > > Front porch lines: 1 > > Sync pulse lines: 3 > > Back porch lines: 38 > > > Has anyone had any experience altering the porch/sync lengths and > > pixel clock to keep 60Hz that will sync to an LCD monitor? > > > Thanks! > > I pulled this piece of code from a video controller I wrote a while back: > > "1280x1024_60Hz": // pixel clk 110MHz > begin > H_FRONT_PORCH=48; HSYNC_WIDTH=112; > H_BACK_PORCH=248; LEFT_BORDER=0; LINE_WIDTH=1280; > RIGHT_BORDER=0; V_FRONT_PORCH=1; VSYNC_WIDTH=3; > V_BACK_PORCH=38; TOP_BORDER=0; FRAME_HEIGHT=1024; > BOTTOM_BORDER=0; SYNC_POLARITY=1; > end > > This seems to be exactly what you have. My comments note that I used a > 110MHz clock. (This HDL did work in hardware testing on the LCD > monitors I tried.) You have some leeway in what refresh rates you can > use. If your pixel clock is 112MHz, that will probably work fine, and > will just have a refresh rate a little higher than 60Hz. I think if you > want something closer to 60Hz you can stuff extra pixels/lines into the > front/back porch, but I would just try the 104 or 112MHz pixel clocks > with the constants you already have. > -Kevin There is a video timing calculator on the web which includes the VESA standard timings, as well as the ability to customize your own format: http://www.tkk.fi/Misc/Electronics/faq/vga2rgb/calc.html I seem to remember that there was an Excel spreadsheet for timing on the VESA website as well. Regards, GaborArticle: 134626
Sorry,
the message was incomplete. I have a Xylo-LM board with a LPC2138 and a
Spartan 3E onboard.
LPC2138
uart0----> NC
uart1---->FPGA---->Serial Adapter (3.3V to rs232 signals)--->
Serial2USB---> Laptop
This is the Verilog code I was using:
module serialz(FX2_CLK,TxD,LED0,LED1,P08TXD1);
input FX2_CLK;
output TxD;
reg TxD;
output LED0;
reg LED0;
output LED1;
reg LED1;
input P08TXD1;
always @(posedge FX2_CLK)
begin
TxD <= ~P08TXD1;
LED0 <= P08TXD1;
LED1 <= P08TXD1;
end
endmodule
P08TXD1 is the output of the serial port of the LPC2138, TxD is the output
of the FPGA that is connected to the laptop thru a serial usb adapter.
FX2_CLK is the clock that feeds the FPGA (12, 24 or 48MHz selectable).
I tested both
TxD <= ~P08TXD1~P08TXD1
and
TxD <= P08TXD1~P08TXD1
just to be sure it was not a polarity issue, but the chars I am expecting
( 0x41 ) is not received (I get 0x3f if I negate the input, almost nothing
if not)
I tried to assign the pins directly but it gave me error, until I removed
the
reg TxD;
Now I am using the simple
assign TxD = P08TXD1;
and the results are the same, there should be something wrong in how the
bytes are created (AFAIK they are 8N1 but I am not sure how the uart is
initialized)
Giuseppe Marullo
<cs_posting@hotmail.com> wrote in message
news:b97f227a-2f0f-4046-91c9-469e4a446b15@m36g2000hse.googlegroups.com...
> On Aug 21, 6:58 am, "Giuseppe Marullo"
> <giuseppemarullonotspa...@iname.com> wrote:
>
>> I would like to use the FPGA to route the signal of the uart1 tx pin to
>> the
>> tx pin of the serial adapter.
>
> You will need to define appropriate input and output pins on the fpga,
> with appropriate I/O voltage standards.
>
> Then you will need to connect them together with a combinatorial path
> int the FPGA fabric, for example the "wire" type in verilog.
>
> If you can find a demo project for your board, often it would be
> easiest to just add this one connection to that (and then maybe cut
> out some of what you don't need) rather than try to figure it all out
> from scratch.
>
> This might be one of the few cases where schematic entry if still
> available in your fpga tools would shine compared to a language such
> as verilog or vhdl.
>
> All of this assumes that the FPGA can tolerate and generate suitable
> voltages for what it is connected to.
Article: 134627Antti wrote: > On 21 aug, 00:17, rickman <gnu...@gmail.com> wrote: >> On Aug 20, 4:47 pm, Ed McGettigan <ed.mcgetti...@xilinx.com> wrote: >> >> >> >>> Gabor wrote: >>>> O.K. Big announcement, lots of marketing buzz, etc. >>>> Now without looking it up at the Xilinx website, i.e. using >>>> only the press release, what end of the line was extended? >>>> Was anything actually added or is this just a marketing >>>> gimmick? Are there new parts or did they just put >>>> three series (3A, 3AN, 3A DSP) into one datasheet? >>>> And where is Spartan 4? >>>> Eagerly awaiting much needed clarification, >>>> Gabor >>>> :) >>> New device/package combinations are available. >>> XC3S50A-VQ100 >>> XC3S200A-VQ100 >>> XC3S700A-FT256 >>> XC3S1400A-FT256 >>> Ed McGettigan >>> -- >>> Xilinx Inc. >> Oh yeah, I still don't see any of these parts in the VA100 package at >> Digikey. Are they in full production? >> >> Rick > > delayed as usual > > Antti All four of the new device/package combination are in production. It sometimes takes a couple of weeks for internal database systems to catch up with press releases which is why you may not see these in the online order tools today, but there should be no problems ordering these through a sales person at Avnet, NuHorizon or Silica. Ed McGettigan -- Xilinx Inc.Article: 134628
sky465nm@trline4.org wrote: > I stumbled onto this when looking for fpga/sdram combo: > > Apple II on FPGA: > http://www1.cs.columbia.edu/~sedwards/apple2fpga/ > http://www1.cs.columbia.edu/~sedwards/apple2fpga/apple2fpga-0.1.tar.gz The tip of the iceberg... ;) <http://pacedev.net/forums/forumdisplay.php?f=10> Regards, -- Mark McDougall, Engineer Virtual Logic Pty Ltd, <http://www.vl.com.au> 21-25 King St, Rockdale, 2216 Ph: +612-9599-3255 Fax: +612-9599-3266Article: 134629
Pete wrote: > > Looks like taco is talking about "VMWare Workstation" from a company > named vmware (vmware.com). I'm reading about it now. It > sounds......kind of scary: > > > It sounds great, in theory....but does it work? What happens when I'm > using EDK in my WinXP virtual machine, and I switch over to my Vista > virtual machine? I've had some bad experiences with using the Xilinx > programming cable driver on Linux, and this sounds even more > complicated to me > > I'm going to get the 30-day license and give it a shot. Thanks so > much! Hi Pete, Right. Give it a go. It works just great, although I've not used Vista myself. It was recommended to me by a friend who has several clients for his design business. He has virtual machines for each one, indeed for each individual project. Whenever Frys had a deal on a hard disk, he'd say something like "that's 4 new PCs for $60![After rebate]". If a customer comes back for extra features he can fire up their archived personalised development PC, complete with whatever (broken) version of vendor software he'd used the last time. Very cool. As for the programming cable, dunno. Everyone on CAF always simulates their code to death, so all our designs work in the silicon first time, every time, so no need for programming cables. Ahem. Anyway, you can run that from the host PC. Cheers, Syms.Article: 134630
On Aug 21, 6:24 pm, "Giuseppe Marullo" > I tried to assign the pins directly but it gave me error, until I removed > the > > reg TxD; You want to declare it as a wire, not as a reg. Unless you are sure that the signal needs to be inverted (don't think so), another option would be to just make both pins on the fpga inputs and temporarily bridge from one connector to the other with a piece of wire. That should at least tell you if straight through will work.,Article: 134631
"Ed McGettigan" <ed.mcgettigan@xilinx.com> wrote in message news:g8kves$qql2@cnn.xsj.xilinx.com... > ... > online order tools today, but there should be no problems ordering these > through a sales person at Avnet, NuHorizon or Silica. Not to be *too* cynical. Of course they'll take your order. I have open, no-cancel no-refund backorders with Avnet dating from May.Article: 134632
On 22 aug, 07:23, "MikeWhy" <boat042-nos...@yahoo.com> wrote: > "Ed McGettigan" <ed.mcgetti...@xilinx.com> wrote in message > > news:g8kves$qql2@cnn.xsj.xilinx.com... > > > ... > > online order tools today, but there should be no problems ordering these > > through a sales person at Avnet, NuHorizon or Silica. > > Not to be *too* cynical. Of course they'll take your order. I have open, > no-cancel no-refund backorders with Avnet dating from May. this is more likelym yes. i heard about the same, regarding S3A new packages the expected delivery 6 months from order or so. Despite xilinx saying full production maybe it lesst than 6 but I am still worried about the availability. AnttiArticle: 134633
Pete wrote: > On Aug 21, 7:43 am, "Symon" <symon_bre...@hotmail.com> wrote: >> "Pete" <petersen.c...@gmail.com> wrote in message >> >> news:166ed929-7d1f-495f-91be-e249f810ab5b@y38g2000hsy.googlegroups.com... >> >>> I'm wondering if anyone has found a workaround to install Xilinx EDK >>> 10.1 on Vista x64. 64-bit Vista is not "officially" supported. >>> However, the 32-bit version of Vista is. The majority of the >>> applications I use support Vista x64. I'm running some >>> implementations for a LX330T part, which could really benefit from the >>> extra memory. I really don't want to dual-boot XP and Vista x64. >>> Has anyone found a workaround to at least get the installer to run? I >>> can deal with EDK crashes (it crashes anyway, in XP). My fingers have >>> instinctively learned "Ctrl-S" by now. >>> Thank you for your help. >> VMWare? > > Looks like taco is talking about "VMWare Workstation" from a company > named vmware (vmware.com). I'm reading about it now. It > sounds......kind of scary: > > quote: > "VMware Workstation 6 makes it simple to create and run multiple > virtual machines on your desktop or laptop computer. You can convert > an existing physical PC into a VMware virtual machine, or create a new > virtual machine from scratch. Each virtual machine represents a > complete PC, including the processor, memory, network connections and > peripheral ports. > > VMware Workstation lets you use your virtual machines to run Windows, > Linux and a host of other operating systems side-by-side on the same > computer. You can switch between operating systems instantly with a > click of a mouse, share files between virtual machines with drag-and- > drop functionality and access all the peripheral devices you rely on." > > It sounds great, in theory....but does it work? What happens when I'm > using EDK in my WinXP virtual machine, and I switch over to my Vista > virtual machine? I've had some bad experiences with using the Xilinx > programming cable driver on Linux, and this sounds even more > complicated to me > > I'm going to get the 30-day license and give it a shot. Thanks so > much! An alternative is VirtualBox. It's a little less scary than VMWare, although it does pretty much the same job. VMWare is the heavyweight in the virtualisation world (on PC's - on big iron, IBM have been doing it for thirty years), so their software is big. Big functionality, big price, big download, big commercial support, big testing, big reputation. VirtualBox is much smaller (though it has been around for several years) - originally developed by a German company, and now bought by Sun. It's much smaller and simpler, free (a "free speech" version with a few features missing, and a "free beer" version for almost all commercial uses), and should probably work fine for your use.Article: 134634
On Aug 22, 1:32 am, Antti <Antti.Luk...@googlemail.com> wrote: > On 22 aug, 07:23, "MikeWhy" <boat042-nos...@yahoo.com> wrote: > > > "Ed McGettigan" <ed.mcgetti...@xilinx.com> wrote in message > > >news:g8kves$qql2@cnn.xsj.xilinx.com... > > > > ... > > > online order tools today, but there should be no problems ordering these > > > through a sales person at Avnet, NuHorizon or Silica. > > > Not to be *too* cynical. Of course they'll take your order. I have open, > > no-cancel no-refund backorders with Avnet dating from May. > > this is more likelym yes. i heard about the same, regarding S3A new > packages > the expected delivery 6 months from order or so. Despite xilinx saying > full production > > maybe it lesst than 6 but I am still worried about the availability. Actually delivery is not the main issue for me. Although Xilinx has a couple of X3SA parts in the Q100 package, there are *none* of the X3SAN parts in this package. I am currently using a flash based Lattice XP with 3000 LUTs. Pretty sweet part! It is an SRAM part with a Flash shadow. You can program the flash while running from RAM and once update is complete, reboot the chip from the flash. Or you can load directly into the RAM without changing the Flash. I don't think you can do all of this with the Xilinx parts, but I don't know for sure. I had the impression that the Xilinx part was a dual die package. But their info now says "single die". I guess they made some changes, but since when did Xilinx have a process compatible with Flash? I guess they finally decided to stop bad mouthing Flash parts and start making them! Funny how that sort of thing happens a lot with Xilinx. When they only had LUT RAM on their chips they shouted how block RAM was wasteful of silicon. Then when they came out with block RAM it was a *great* idea. They've done this with a couple of other features that the competition came out with first. Unless Xilinx has it, it's not important. But once Xilinx catches up, then it *is* important. So now Xilinx has gotten on the bandwagon for Flash and also for the smaller packages. But they are clearly an "also-ran" with very limited offerings in both areas. RickArticle: 134635
On 22 aug, 15:35, rickman <gnu...@gmail.com> wrote: > On Aug 22, 1:32 am, Antti <Antti.Luk...@googlemail.com> wrote: > > > > > On 22 aug, 07:23, "MikeWhy" <boat042-nos...@yahoo.com> wrote: > > > > "Ed McGettigan" <ed.mcgetti...@xilinx.com> wrote in message > > > >news:g8kves$qql2@cnn.xsj.xilinx.com... > > > > > ... > > > > online order tools today, but there should be no problems ordering = these > > > > through a sales person at Avnet, NuHorizon or Silica. > > > > Not to be *too* cynical. Of course they'll take your order. I have op= en, > > > no-cancel no-refund backorders with Avnet dating from May. > > > this is more likelym yes. i heard about the same, regarding S3A new > > packages > > the expected delivery 6 months from order or so. Despite xilinx saying > > full production > > > maybe it lesst than 6 but I am still worried about the availability. > > Actually delivery is not the main issue for me. =A0Although Xilinx has a > couple of X3SA parts in the Q100 package, there are *none* of the > X3SAN parts in this package. =A0I am currently using a flash based > Lattice XP with 3000 LUTs. =A0Pretty sweet part! =A0It is an SRAM part > with a Flash shadow. =A0You can program the flash while running from RAM > and once update is complete, reboot the chip from the flash. =A0Or you > can load directly into the RAM without changing the Flash. =A0I don't > think you can do all of this with the Xilinx parts, but I don't know > for sure. > > I had the impression that the Xilinx part was a dual die package. =A0But > their info now says "single die". =A0I guess they made some changes, but > since when did Xilinx have a process compatible with Flash? =A0I guess > they finally decided to stop bad mouthing Flash parts and start making > them! =A0Funny how that sort of thing happens a lot with Xilinx. =A0When > they only had LUT RAM on their chips they shouted how block RAM was > wasteful of silicon. =A0Then when they came out with block RAM it was a > *great* idea. =A0They've done this with a couple of other features that > the competition came out with first. =A0Unless Xilinx has it, it's not > important. =A0But once Xilinx catches up, then it *is* important. =A0So > now Xilinx has gotten on the bandwagon for Flash and also for the > smaller packages. =A0But they are clearly an "also-ran" with very > limited offerings in both areas. > > Rick hm.. first I AGREE 110% xilinx added a few packages, but not those that would be really in demand 1) XC3SAN-200 TQFP144 2)XC3SAN-50/100 VQFP100 - maybe that does not fit the plastic? 3) 8x8 mm paclage option for S3AN 4) EASY BGA (0.5mm with 1 row spares for routing)- like the siliconblue devices Xilinx has added some marketing security stuff for S3AN but i still see no real protection agains factory overbuild and design cloning in the S3AN sure it is almost doable if you have spare resources and add own special stuff but off the shelf there is no security The above are reason for me why Xilinx is nunber 4 on the list of choices 1) 65L04 Siliconblue (waiting sample order and devkit) package 8x8 (easyBGA) or 4x5 2) Lattice XP2-5 - package 8x8 - useable on double sided PCB 3) Actel A3P125 - package 8x8 - useable on double sided PCB 4) Xilinx - only conditionally as Xilinx lacks any security and really has no competive package options 5) Altera - hmm maybe altera should be 4 and xilinx 5, as both have no security in low cost families When Altera comes out MAX3 it would be placed defenetly before any current Xilinx offerings Isnt it weird? Xilinx IS the biggest. And the claim: "LOWEST TOTAL COST PERIOD" on their website, but in the list of choices for low cost consumer gadgets Xilinx is number 4 (or 5) not 1 ! AnttiArticle: 134636
On Jul 31, 11:36 am, "HT-Lab" <han...@ht-lab.com> wrote: > "Gabor" <ga...@alacron.com> wrote in message > > news:23a70911-0da5-4c72-8e52-dd8bbdb09035@34g2000hsf.googlegroups.com... > > > > >I often look through waveform views with many screens worth of > > signals, > > so I like to re-arrange the signals to have those of interest at the > > top of > > the view. With ModelSim PE 5.7, I could find the signals I wanted, > > select them, then cut (Ctrl+X), go to the top of the window (Ctrl > > +Home) > > and paste (Ctrl+V) these signals at the top of the window. > > > Now with ModelSim 6.3, I find that this trick doesn't work with > > multi-bit vectors anymore. I get errors like: > > > # Paste insertion failed: sim:/tst_brd_test/uut/app_af_addr: The "- > > min" and "-max" options can only be used with analog formats. > > > I have no clue what this error message means, but my only work- > > around is to painfully drag the vector to the top of the window, > > waiting > > for an annoyingly slow scroll when the signal needs to move more than > > a screen's height. Is there a better way to do this? > > > Regards, > > Gabor > > For what it is worth, I just tried it out in 6.4 under XP and it seems to > work OK. If you don't want to change to 6.4 try 6.3h, > > Hanswww.ht-lab.com Right now I don't want to juggle ModelSim versions, especially since I'm running the branded XE and Lattice editions. However I found that earlier versions including 6.2, which shipped in the XE edition with ISE 9.2i do not exhibit this problem. In any case I found a better work-around for moving signal names in the wave view. You can select multiple non-adjacent signals by control- clicking the name. You can then drag the whole lot by mousing on any one of the selected signals. So the obvious workaround is to also select one signal near where you want to drop the whole bunch of them and dragging it as well, even one position up or down. The other signals then end up next to it. Regards, GaborArticle: 134637
Hi, I'm looking for the Xilinx application note XAPP934. They removed it from their web site and thus i can't get the login and password for the root account on the Centos VMWARE virtual machine they provide for Uclinux. Can any body provide the article or at least the root login and password? Thanks benArticle: 134638
On Fri, 22 Aug 2008 11:03:47 -0700 (PDT), hotben@hotmail.fr wrote: >Hi, >I'm looking for the Xilinx application note XAPP934. They removed it >from their web site and thus i can't get the login and password for >the root account on the Centos VMWARE virtual machine they provide for >Uclinux. >Can any body provide the article or at least the root login and >password? >Thanks >ben Try the following: ftp://ftp.xilinx.com/pub/applications/xapp/xapp934_1.zip ftp://ftp.xilinx.com/pub/applications/xapp/xapp934_2.zip ftp://ftp.xilinx.com/pub/applications/xapp/xapp934_3.zip KalArticle: 134639
Do you really need to hook up a camera? If the primary goal is to demonstrate the processing algorythm in hardware. Then you can use a static image or video and pass the bitstream to the hardware. The bit stream could be passed via ethernet, usb or serial connections to the FPGA and read back the same way. Projects to pass data to and from a xilinx chip are scattered all over the internet. Take a look at sites like www.fpga4fun.com to just pass data. If you do need to have a real time video feed, you could use the suggestion above as a way to prove your alogrythm seperately from the circuit to control the camera/sensor. "Ghazal" <gzl.javed@gmail.com> wrote in message news:2ff87bd6-ffbc-4620-b47e-1ab625856f86@2g2000hsn.googlegroups.com... > Hello, > > I want to integrate an image processing algorithm (half tone pixel > converter, etc.) in Xilinx Spartan-3 FPGA (for a demo project only), > and the concern bugging me is how to get a simple image input. > > * Which camera should I use > * Will it be directly controlled by the FPGA and if yes then how, if > no then how will it be controlled > * How will it physically interface with the FPGA > * What will be the image format and how will it be read by the FPGA > * Will an image sensor be easier to interface and use or digital > camera > * Will a video camera take a snapshot image which can be processed > * Will any pre-processing or analog-to-digital conversion of the > image / captured snapshot be required > * Is there a Xilinx prototype board for image capturing only > > If anyone has designed / worked on cameras / images with FPGA .... do > let me know ... it will help me quick start the things here !!! > Anxiously waiting. > > Regards, > Ghazal Javed >Article: 134640
On 22 ao=FBt, 14:09, Muzaffer Kal <k...@dspia.com> wrote: > On Fri, 22 Aug 2008 11:03:47 -0700 (PDT), hot...@hotmail.fr wrote: > >Hi, > >I'm looking for the Xilinx application note XAPP934. They removed it > >from their web site and thus i can't get the login and password for > >the root account on the Centos VMWARE virtual machine they provide for > >Uclinux. > >Can any body provide the article or at least the root login and > >password? > >Thanks > >ben > > Try the following: > > ftp://ftp.xilinx.com/pub/applications/xapp/xapp934_1.zipftp://ftp.xilinx.= com/pub/applications/xapp/xapp934_2.zipftp://ftp.xilinx.com/pub/application= s/xapp/xapp934_3.zip > > Kal Hi Karl, Thanks for the help. In the links you have access to the Centos virtual machine as provided by Xilinx. I already downloaded this files and installed managed to load the Cenvironement on a VMWARE server. Unfortunatly i can't login because i don't have any login or password. Xilinx wrote the login and password for a user and a root account on their XAPP934 PDF article, but they removed it from their web site and i can't find it any more on the web. So i need the XAPP934 PDF file or at least the root login and password. Hope it's clear now:) BenArticle: 134641
Just wondering if anyone out there has had experience with or comments on either Dini or ProDesign ChipIt Virtex 5 evaluation boards... Any feedback is appreciated... AdamArticle: 134642
On 21 Aug, 19:09, sky46...@trline4.org wrote: > I stumbled onto this when looking for fpga/sdram combo: > > Apple II on FPGA: > http://www1.cs.columbia.edu/~sedwards/apple2fpga/ > http://www1.cs.columbia.edu/~sedwards/apple2fpga/apple2fpga-0.1.tar.gz Cool!Article: 134643
On Fri, 22 Aug 2008 11:39:19 -0700 (PDT), hotben@hotmail.fr wrote: >On 22 août, 14:09, Muzaffer Kal <k...@dspia.com> wrote: >> On Fri, 22 Aug 2008 11:03:47 -0700 (PDT), hot...@hotmail.fr wrote: >> >Hi, >> >I'm looking for the Xilinx application note XAPP934. They removed it >> >from their web site and thus i can't get the login and password for >> >the root account on the Centos VMWARE virtual machine they provide for >> >Uclinux. >> >Can any body provide the article or at least the root login and >> >password? >> >Thanks >> >ben >> >> Try the following: >> >> ftp://ftp.xilinx.com/pub/applications/xapp/xapp934_1.zipftp://ftp.xilinx.com/pub/applications/xapp/xapp934_2.zipftp://ftp.xilinx.com/pub/applications/xapp/xapp934_3.zip >> >> Kal > >Hi Karl, >Thanks for the help. In the links you have access to the Centos >virtual machine as provided by Xilinx. I already downloaded this files >and installed managed to load the Cenvironement on a VMWARE server. >Unfortunatly i can't login because i don't have any login or password. >Xilinx wrote the login and password for a user and a root account on >their XAPP934 PDF article, but they removed it from their web site and >i can't find it any more on the web. >So i need the XAPP934 PDF file or at least the root login and >password. >Hope it's clear now:) >Ben Benr, You did try root, root; right?Article: 134644
http://web.archive.org/web/20071122112547/http://www.xilinx.com/support/documentation/application_notes/xapp934.pdf 3.Login to Linux VM as user "devel" with password, "devuser". The root password for this VM is "uclinux". You can login as root if you want to configure or change system settings in the VM.Article: 134645
I'm using playxsvf in my system and works very well. However, it's very annoying to have to go into Impact, generate a prom file (.mcs), then go through the program prom sequence into the xsvf file. Is there a way to script this so that my .bit file can be converted direct to xsvf from a command line/batch file? My settings and operations are always the same. Thanks, ClarkArticle: 134646
On 23 aug, 18:04, Clark Pope <cep...@nc.rr.com> wrote: > I'm using playxsvf in my system and works very well. However, it's > very annoying to have to go into Impact, generate a prom file (.mcs), > then go through the program prom sequence into the xsvf file. > > Is there a way to script this so that my .bit file can be converted > direct to xsvf from a command line/batch file? My settings and > operations are always the same. > > Thanks, > Clark OF COURSE! just do it:) impact -batch genxsvf.cmd genxsvf.cmd setMode -bs setCable -port xsvf -file "clkout.xsvf" addDevice -p 1 -file "top.jed" Program -p 1 -e -defaultVersion 0 quit something like that you figure out AnttiArticle: 134647
On Aug 23, 8:57 am, Antti <Antti.Luk...@googlemail.com> wrote: > On 23 aug, 18:04, Clark Pope <cep...@nc.rr.com> wrote: > > > I'm using playxsvf in my system and works very well. However, it's > > very annoying to have to go into Impact, generate a prom file (.mcs), > > then go through the program prom sequence into the xsvf file. > > > Is there a way to script this so that my .bit file can be converted > > direct to xsvf from a command line/batch file? My settings and > > operations are always the same. > > > Thanks, > > Clark > > OF COURSE! > just do it:) > > impact -batch genxsvf.cmd > > genxsvf.cmd > > setMode -bs > setCable -port xsvf -file "clkout.xsvf" > addDevice -p 1 -file "top.jed" > Program -p 1 -e -defaultVersion 0 > quit > > something like that you figure out > Antti It's even easier than that. Impact creates the text file c:\Xilinx\_impact.cmd (assuming c:\Xilinx\ is where you installed the tools) So just run impact with the UI, copy the file and run impact -batch _impact.cmd Alan NishiokaArticle: 134648
I would like to know if anyone here has already done a VHDL code to communicate/give commands to the LTC2624 Digital to Analog Converter that has the Spartan-3A starterkit board. I am not asking for the code specifically, but I would like your feedback regarding to this problem: I've a code, which in simulation seems to be all ok, all the timings are met according to the timing specifications in the LTC2624 data sheet (http://www.linear.com/pc/downloadDocument.do? navId=H0,C1,C1155,C1005,C1156,P2048,D2170) . The FPGA is configuring from one of the kit's SPI Flash PROM. When I take the board to the oscilloscope and try to measure the voltage, it is not working as expected. 0 voltage is read. The rest features of the program, for example, communication with the LCDisplay and LEDs, are all functioning. The UCF constraints are ok. I don't have any more clue that could help me to solve this. If you have worked with that Digital-to-Analog converter model in the Xilinx Spartan-3A or other board having that model, please reply. How did you manage to solve the problem, if all seemed ok with the code, timing specifications, etc, but the resulting output voltage is not working as expected [stays in 0]? Thanks, m mArticle: 134649
m m wrote: > I would like to know if anyone here has already done a VHDL code to > communicate/give commands to the LTC2624 Digital to Analog Converter > that has the Spartan-3A starterkit board. I have implemented a simple test for the Spartan 3E starter kit board, which has the same DAC: http://www.frank-buss.de/SignalGenerator/ -- Frank Buss, fb@frank-buss.de http://www.frank-buss.de, http://www.it4-systems.de
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