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602proINTERNET, automated LAN access to the INTERNET, software allows Local Area Network to connect simultaneously to the Internet through just ONE modem dial-up or dedicated, with Firewall, WWW and E-Mail Clients. http://www.software602.com 602proINTERNET is a communication software package for full connection to the Internet using dial-up or leased line. If you are a small business owner or an IS manager in a small to medium sized company, you have just found the software you need. 602proINTERNET allows a number of computers to access the Internet through one account. The product includes SMTP/MIME e-mail with clients for Windows 3.1x, Windows95 and WEB clients for Windows 3.1x and Windows95. 32-bits Mail602 INTERNET Server provides fast, high-quality delivery of your messages. Firewall SOCKS solves the security of your network. 602proINTERNET offers the possibility of using online access to the Internet for all users in your network simultaneously for the price of connecting a single PC. What can 602proINTERNET do? "SURF" the NET from any workstation on the network! The user of each workstation on the network has access to WWW pages of any WEB site on the Internet. All users on the network can "surf" on the Internet simultaneously. Electronic mail for each network user! 602proINTERNET includes SMTP/MIME e-mail with the option to send and receive attached files for any user on the network, regardless whether he is using Windows 3.1x or Windows95. E-mail has many ways of administrating the users' rights. Every user of your network has his own Internet address (i.e. "user@yourcompany.com"). Security! Our firewall SOCKS solves the security of your network against access byunauthorized personnel. At the same time you may define access to WWW to selected users on your network. Security is solved directly at the IP packet level and this is why it is reliable. Only one IP address is all that you need! You save your money! Your full connection to the Internet using 602proINTERNET requires only one IP address for the whole network. You will connect your whole network to the Internet for the price of connecting a single computer. Available for Dial-up and leased line connections, too! The software package 602proINTERNET is great for Dial-up as well as for leased line connections. No more expensive telephone lines! =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-= Software602, Inc. Justin Morgan 6821 Southpoint Drive, N #113 Director of Jacksonville, Fl 32216 Information Technology tel:(904)296-7700 justin@software602.com fax:(904)296-9392 http://www.software602.com =-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=Article: 5926
In article <3338B6B7.7296@summitmicro.com>,
webmaster <webmaster@summitmicro.com> wrote:
>...however, if you don't have a frame-capable
>browser, you are pointed upon entry to a "synopsis" page with direct
>access to our product literature (data sheets and application notes and
>all the rest of the "goodies") in PDF format. you should still find the
>site useful even if you don't view it using frames.
Which brings us to the next complaint. :-) PDF is a proprietary format
(for all practical purposes), and the fact that Adobe gives away browser
binaries is not a lot of help if your environment isn't one they supply
a binary for. The best web sites supply (possibly compressed) PostScript
as an alternate format.
--
Committees do harm merely by existing. | Henry Spencer
-- Freeman Dyson | henry@zoo.toronto.edu
Article: 5927Andrew Papageorgiou wrote: > > In article <33362D36.474D@nocrc.abb.no>, Johannes Soelhusvik > <jso@nocrc.abb.no> writes > >Tom Burgess wrote: > > ...... > > >First of all, thanks very much for responding to my query. > >I confirm that I just want the integer portion of the division. And your > >suggested solution is nice and simple, but I do not have time to go > >through as many as 255 clock cycles (worst case). What can I do to > >reduce this to say 32 ? I have a new algorithm for division that retires 2-3 bits per iteration, yet is much simpler than Radix-4 SRT because it uses no lookup table. It only needs 2-bit comparisons plus a little simple logic. The article is in the proceedings of ICCD '96. Maybe my algorithm is suitable for FPGA implementation. (I don't see why not.) Let me know if you are interested. Vitit Kantabutra http://www.isu.edu/~kantviti vkantabu@howland.isu.eduArticle: 5928
Has anyone seen Xilinx XC6200 product? I guess that the most we can hope for is the XC6216. Does anyone have a reading on pricing for the parts and the CAD tools? -- Regards Simon BaconArticle: 5929
Peter (z80@dserve.com) wrote: : I was told some time ago that CUPL later withdrew support for the : VIRTUAL device in their base tools, allowing it only in their $2500 : "FPGA" version which also has direct XNF output. The VIRTUAL device exists in all their current generation tools. In the earliest version I used, 1987 vintage, from P-CAD, before Logical Devices bought the product, it was called PLD9000. They have a pla2xnf utility to convert a generic PLA file to XNF, but you have to ask for it. And that may mean being under support. However, if a Xilinx FPGA is selected as a target, CUPL can generate the .xnf directly. Of course you have to have the Total Designer to get the Xilinx FPGA support. 8-). : Clearly their marketing department determined that someone using FPGAs : has a budget several times bigger than someone using ordinary PLDs. : Now, where have we noticed that before?? Yes and no. We bought the CUPL TD because it supports virtually every pld ever made, and has hooks to most CPLD vendor fitters where a reasonable 3rd party interface exists. Is includes fitters for those vendors who allow CUPL to include them in the package. And they gave us a reasonable trade in/upgrade price on our older stuff. I was glad I had it when we inherited some designs using a variety of Altera and Atmel devices, and I had to support them... gerryb -- Gerry Belanger, WA1HOZ wa1hoz@a3bgate.nai.net Newtown, CT g.belanger@ieee.orgArticle: 5930
The frantic pace of development we are currently seeing comes at a huge cost. This cost must be sourced from manufacturer's profit margins, which would be eroded heavily by direct second sources. It's bad enough with indirect competition..... Sure, second sourcing would make us feel better, but would you rather have that 500,000 gate FPGA in 1998 or in 2005? -Andrew Metcalfe Garnet Brace <hakk@cent.com> wrote in article <5go10m$3c4@maggie.ionsys.com>... > I don't know about the rest of you guys but personally, I hate > being confined to a single source for any part. It causes too > much turbulence, upset, stress, disturbance etc. in my life > All of a sudden, the sole source decides to > - raise the price > - discontinue the part > - "improve" the part by supplying only a new, smaller > higher speed version that causes more noise, glitches > ground bounce and all of those other things that > higher speed does > - move to anothe fab that doesn't work any more > All of these things cause my chain to be pulled and I have to drop > whatever I'm doing - that my boss thinks is a good thing - and address > the problem created by these changes. > > These changes are a LOT less severe if there is another supplier that hasn't > done them. > > That's some of the reasons that I, personally HATE being confined to a > single source. > > > Wouldn't you think that with many suppliers now rushing into the > FPGA field, one or two of them that are not yet market dominant > would see the marketing advantage of forming alliances with > others and do more second sourcing? > > Hint Hint > > What do you think? > ... Garnet > > -- > return address is fake to try to reduce junk mail > if you wish to send e-mail to me please send to cgbi@ionsys.com > >Article: 5931
Hi,everybody
i'm looking for a FREE verilog to VHDL tool,does anybody has any clue?
any help will be appreciated!
Article: 5932Hi, anyone know if Xilinx or Atmel or any other FPGA producers have 6809 MPU-core support? Tore -- ####\ Tore H. Larsen #@ * > Scase AS - Bergen - Norway # _" E-mail: thl@internet.no or torela@idt.ntnu.no ##### Vc: +47-55951200Article: 5933
I seek a challenging, full-time position which closely matches
my qualifications and interests. I am particularly excited about
the possibility of working as a Hardware Engineer specializing in
Microprocessor/ASIC design.
Please note from my enclosed resume that I will graduate this
June with a Master of Science degree in Electrical Engineering
from Villanova University. My education is complemented by my
"real world" experiences as a Hardware Engineer and Technical
Assistant with HCL Hewlett-Packard Ltd. and Comcast Cellular
Communications respectively. I am seeking a position in
high-level ASIC design where I can build upon my project
management, problem solving and technical skills.
I am confident that my formal training and research/course work
experiences would prove valuable to your organization. I look
forward to the opportunity of discussing my qualifications with
you in greater detail.
Sincerely,
K S.Venkatraman
--------
Resume
--------
K S Venkatraman
Sugartown Mews Apt.D-101,
377 Avon Road,
Devon, PA19333
Ph:(610) 519-7371 (Work) (610) 902-0528 (Home)
Email: venkat@ee.vill.edu
URL: http://www.ece.vill.edu/~venkat
------------------------------------------------------------
OBJECTIVE
A position in high level IC design oriented towards
CPU/Computer Architecture.
COMPUTER SKILLS
EDA Tools: Mentor Graphics QuickVHDL compiler and simulator
for VHDL models, Design Architect schematic editor,
VHDLwrite netlist extractor, AutoLogic synthesiser.
Programming / Hardware Description Languages:
VHDL, C, UNIX Shell, DLX Assembly, HTML, PASCAL
Operating Systems:
UNIX(Solaris and Sun-OS) on Sun workstations, DOS & Windows.
PROJECTS
RTL design of a complete 32-bit pipelined DLX processor
(datapath and control unit) incorporating features like
hazard detection, forwarding, pipeline stalls, delayed
branches etc. and implementation of this design using
schematics and VHDL behavioral models.
Design of a memory system for the DLX processor including an
Instruction Cache, Data Cache, Cache and DRAM Controller,
and implementation of these in VHDL. Comparison of various
cache configurations (Fully Associative, Direct Mapped) by
using them in the VHDL models.
EDUCATION
M.S., in Electrical Engineering, Villanova Univ., PA
Aug.'95 - present, Expected: June '97, GPA: 3.8/4.0
Curriculum:
Computer Organization and Design
Advanced Computer Architecture
Computer Vision
Computer Networks
Distributed Systems
Operating Systems and Programming (Unix & C)
Communication Electronics
Topics in Digital Signal Processing
B.E., in Electronics and Communication Engineering, Birla
Instt. of Technology, India.
Aug.'90 - Apr.'94, GPA: 3.44/4.00
Curriculum:
General course requirements with emphasis on data
communications, Fiber Optic Communications, satellite and
radio communications and Communication Networks.
EXPERIENCE
Research Assistant, ECE Dept., Villanova University.
Jul.'96 - present
Presently working on an FIR filter implementation in VHDL
which is to be downloaded to an AT&T ORCA FPGA after
appropriate synthesis, placing and routing for my thesis
work.
RF Technical Assistant (Summer Internship),
Comcast Cellular Communications, Wayne, PA.
May'96 - Jul.'96
The job involved addition and maintenance of cell sites
along with controlling flow of cellular phone traffic all
over the tri-state area.
Aug.'95 - May'96
Teaching Assistant, ECE Dept., Villanova University.
Duties included preparing and grading projects, assignments
and teaching an undergraduate course in signal processing.
Jun.'94 - Jul.'94
Hardware Engineer, HCL-Hewlett Packard Ltd., India.
The job mainly involved hardware maintenance and marketing
of PC's, HP workstations including System/Network
Administration. An important project dealt with networking
an entire educational institution on an FDDI/Ethernet
backbone and providing network solutions.
ACTIVITIES
Amateur Radio, swimming, tennis, and chess.
References available on request
Article: 5934In article <01bc392f$62f809c0$9d638bd0@kwonghei>, "kwong lau hei" <lhkwong@netvigator.com> wrote: > I am using a 4013pg223 and 16K X 8 EPROM kwong lau hei sent me e-mail that his configuration is now successful, after he changed to a larger EPROM. ( I hate the title of this thread, so at least you should all know that this simple problem had a happy solution ). Peter Alfke, Xilinx ApplicationsArticle: 5935
They seem to exist. Virtual Computer (VCC) has a PCI board available with an XC6200 on it. Check out: http://www.vcc.com/products/pci6200.html For data sheets, look at: http://www.xilinx.com/products/fpgaspec.htm#XC6200 For pricing, etc., I would recommend contacting the Xilinx sales office in the UK. See: http://www.xilinx.com/company/sales/int_reps.htm#UNITED -- Steven Knapp OptiMagic(tm) Logic Design Solutions E-mail: optmagic@ix.netcom.com Programmable Logic Jump Station: http://www.netcom.com/~optmagic Simon Bacon <SimonBacon@tile.demon.co.uk.nospam> wrote in article <859422081snz@tile.demon.co.uk>... | Has anyone seen Xilinx XC6200 product? I guess that the most we can | hope for is the XC6216. | | Does anyone have a reading on pricing for the parts and the CAD tools? | | -- | Regards | Simon Bacon | |Article: 5936
You might find the following link of interest. It contains a list of the various vendors that support programmable logic. Check out the summary tables for specific offerings from each vendor. See the Software section on the Programmable Logic Jump Station at: http://www.netcom.com/~optmagic/software.html -- Steven Knapp E-mail: optmagic@ix.netcom.com Programmable Logic Jump Station: http://www.netcom.com/~optmagic Anthony Ellis <aelogic@iafrica.com> wrote in article <01bc35ce$1e27ef40$4a4116c4@anthony-e>... | Given that I have $8000 to spend on tools and want to do the following: | | FPGA VHDL development - just the VHDL coding, debugging and simulating. | Independent of FPGA vendor. | Will use customer's back end tools as required. Typical VHDL design | bureau. | | Front end schematic capture tools to interface with Coopers&Cyan as well | as PCAD PCB tools. | | I currently use Workview Office tools and Speedwave. Need tools for my own | business now and would like some alternatives. | Any recommendations? | | Anthony "LogicWorks" |Article: 5937
I think this may be due to the licensing of the Actel product. The copy bought from VIEWlogic is probably unrestricted and should be able to read files originally created by the Actel seats. However, the Actel seats will not be able to read designs initially created on the VIEWlogic seats. It all has to do with the keying saved in the files. -- Steven Knapp E-mail: optmagic@ix.netcom.com Programmable Logic Jump Station: http://www.netcom.com/~optmagic Rich K. <rich.katz@gsfc.nasa.gov> wrote in article <01bc3938$7b4989a0$6e0db780@Rich>... | hi, | | the subject may seem silly but it is not. previously, i had posted a | question about viewoffice <--> viewoffice file compatibility. i have run | some tests and found that for a viewoffice system derived from a pro series | license (bought from actel) and a viewoffice system derived from workview | plus (bought from viewlogic) could not exchange schematic files | representing an actel fpga design. | | i have e-mailed viewlogic a bunch of times on this, sent license files, | asked what restrictions and capabilities there are for each of the | licenses, and the answer i have received to solve this problem is between | the square brackets, two lines below this one: | | [] | | so, do any experienced viewlogic | users/customers/fae's/critics/supporters/abusers/whateverers have any | ideas? i now have 3 viewlogic seats networked together (pc's derived from | workview plus) and two dormant actel-bought/derived viewlogic licenses and | need to activate them as we have 1 or 2 new designers joining. what do i | do? i don't mind paying the required maintenance fees and all but i need | to have each of the designers' systems being compatible with one another. | having all of the seats being viewlogic and the same revision seemed | initially to be a good idea. | | has anyone tried this before? did my pc have a bad hair day? | | any thoughts or advice? | | thanks, | | rk |Article: 5938
There's an Adobe Acrobat application note on building FIFOs in XC4000E at: http://www.xilinx.com/xapp/xapp053.pdf -- Steven Knapp E-mail: optmagic@ix.netcom.com Programmable Logic Jump Station: http://www.netcom.com/~optmagic |Article: 5939
The previously mentioned web site has moved to: http://www.netcom.com/~optmagic/boards.html -- Steven Knapp E-mail: optmagic@ix.netcom.com Programmable Logic Jump Station: http://www.netcom.com/~optmagic Steven K. Knapp <optmagic@ix.netcom.com> wrote in article <01bc3611$8426a3c0$a3bfb8cd@default>... | For those interested, I have a list of various FPGA-based boards at: | | http://www.netcom.com/~optmagic/index.html#Boards | -- | Steven Knapp | E-mail: optmagic@ix.netcom.com | Programmable Logic Jump Station: http://www.netcom.com/~optmagicArticle: 5940
in <E7o796.LGo%spenford@zoo.toronto.edu>, : Henry Spencer (henry@zoo.toronto.edu) wrote: : Which brings us to the next complaint. :-) PDF is a proprietary format : (for all practical purposes), and the fact that Adobe gives away browser : binaries is not a lot of help if your environment isn't one they supply : a binary for. The best web sites supply (possibly compressed) PostScript : as an alternate format. The latest (at least a couple of weeks ago when I downloaded it) version 4.03 of Aladdin Ghostscript seems to deal with .pdf files pretty well. Most everything on the Maxim CD-ROM, and various National and Philips datasheets seem to come through just fine. The only thing I can't seem to process are some Motorola files that it says are encrypted (the 68hc08 reference manual). It can run as a viewer under X windows or on the Linux console directly, but I use it set up as a batch processor to convert the .pdf or postscript to a series of .pcx or .png graphics files in the backgroud and, when it finally finishes, use a regular Linux non-X svgalib viewer program. On MS-DOS, if you add all the software options to run pdf, you'll need a 386 or better with 4 or 8 megabytes. Mark Zenier mzenier@eskimo.com mzenier@netcom.comArticle: 5941
this is correct. however, it's odd that i can't read actel files generated on (viewlogic) viewoffice 7.2 in viewoffice 7.2 on an actel-sold actel development station which is perfectly capable of working with actel designs, and uses IDENTICAL software, and was bought and sold and licensed to work on actel designs. apparently, the implication is that if you have a number of seats, say some 'full' viewlogic seats, which are capable of doing actels, and some actel-only seats, which are capable of doing actels, you can not work on the same actel design together and the cheap sets must be upgraded to have capability to do non-actel stuff (which is not needed) or the expensive seats must be downgraded to be cheap sets (which is not desired since we want to do other things some of the time with a small number of the seats). i am continuing to attempt to resolve this with viewlogic, so far it looks like the viewoffice (actel design) <--> viewoffice (actel design) compatibility problem is solved by sending $; i am attempting now to find out how many digits is required and the value of the leading digit. a previous poster has asked that i post the answer and i will, as soon as i have one, as many of us may run into the same problem. thanks for the help, rk p.s. yes, the viewlogic purchased seat can read stuff from the actel purchased seat; it's going the other way that it's a problem. ------------------------------------------------------------- Steven K. Knapp <optmagic@ix.netcom.com> wrote in article <01bc3acc$e7e03060$b6bfb8cd@default>... > I think this may be due to the licensing of the Actel product. The copy > bought from VIEWlogic is probably unrestricted and should be able to read > files originally created by the Actel seats. However, the Actel seats will > not be able to read designs initially created on the VIEWlogic seats. It > all has to do with the keying saved in the files. > -- > Steven Knapp > E-mail: optmagic@ix.netcom.com > Programmable Logic Jump Station: http://www.netcom.com/~optmagic > > Rich K. <rich.katz@gsfc.nasa.gov> wrote in article > <01bc3938$7b4989a0$6e0db780@Rich>... > | hi, > | > | the subject may seem silly but it is not. previously, i had posted a > | question about viewoffice <--> viewoffice file compatibility. i have run > | some tests and found that for a viewoffice system derived from a pro > series > | license (bought from actel) and a viewoffice system derived from workview > | plus (bought from viewlogic) could not exchange schematic files > | representing an actel fpga design. > | > | i have e-mailed viewlogic a bunch of times on this, sent license files, > | asked what restrictions and capabilities there are for each of the > | licenses, and the answer i have received to solve this problem is between > | the square brackets, two lines below this one: > | > | [] > | > | so, do any experienced viewlogic > | users/customers/fae's/critics/supporters/abusers/whateverers have any > | ideas? i now have 3 viewlogic seats networked together (pc's derived > from > | workview plus) and two dormant actel-bought/derived viewlogic licenses > and > | need to activate them as we have 1 or 2 new designers joining. what do i > | do? i don't mind paying the required maintenance fees and all but i need > | to have each of the designers' systems being compatible with one another. > > | having all of the seats being viewlogic and the same revision seemed > | initially to be a good idea. > | > | has anyone tried this before? did my pc have a bad hair day? > | > | any thoughts or advice? > | > | thanks, > | > | rk > | >Article: 5942
I am interested in using Xilinx 4000E synchronous RAM with the Synopsys Behavioral Compiler - so that the synchronous RAM is directly infered. (We have this all working with other libraries.) Does anyone know if the designware components and synthetic libraries are available for Xilinx memories? -Rich Auletta University of Colorado at DenverArticle: 5943
I've Never done this(posted) before so please forgive any foubars,...
,..plus, i just wanted to say that,..!...can't say
that 'bout much anymore!!
I've been browsin' everywhere i can find/think of, for information on
the basic 'how to' program a peel device,...
I'm a hobbyist (robotics), and would like to try using an
' 18cv8 ' ( ICT ) to lower chip count on a cpu board.
I'd (MUCH!) rather not invest $3-500 ona prom burner and would
like to know if i can 'just' thro some latches around the peel and
'beat' a configuration into it,..?...
I gave ICT a call, but only got some mumbling about
'proprietary' info,...
Sure would appreciate ANY info/guidiance/direction,...
Thanks in advance,...
markn
Article: 5944Steven K. Knapp wrote: > > They seem to exist. Virtual Computer (VCC) has a PCI board available with > an XC6200 on it. Check out: > http://www.vcc.com/products/pci6200.html Ya we have the 6200 boards. We gave two class where everyone walked away with the board. We are giving another class in Geneva April 2. I'm having fun with my board theres webscope by Steve Guccione it lets you download and use the board over the net with Java (Source included), Xact 6000 which is very cool and can export your timing information to excel and desplay all the path info graphically. Then there is Lola, it can synthesize, place and route a 10,000 gate design in under 10 seconds. Then you can take the output of Lola and run it into WebScope to single step your design. The classes were really great because I got to hear Colin Carruthers (the person responsible for the fancy xact 6000 interface) and the always popular Stefan Ludwig give his talk on Oberon and Lola. In Geneva we will have Tom Kean, the inventor of the XC6200, and Stephan Gehring who wrote the CAD interface for Lola and lots of other stuff having to do with Oberon and the Lola Programming System. Steve Casselman, President Virtual Computer CorporationArticle: 5945
>Sure, second sourcing would make us feel better, but would you rather have >that 500,000 gate FPGA in 1998 or in 2005? I would like a XC3030A which costs $2, and have it now. I could then get rid of the 22V10+glue, save a bit of board space, and pack in more functions. Like most (not all) people who use digital logic, I have no use for a 500k gate device now, in 1998, and almost certainly not in 2005 either. Peter. Return address is invalid to help stop junk mail. E-mail replies to z80@digiserve.com.Article: 5946
Johannes Soelhusvik wrote: > > Tom Burgess wrote: > > > > Johannes Soelhusvik wrote: > > > > > > Does anyone have a simple solution to the design of an 8-bit simple > > > divider (A=B/C, A,B and C being 8-bit variables) for a xilinx FPGA > > > (xc4000 series). The circuit must take up as little space as possible > > > (bit serial solution?). > <deleted my "solution"> > > > First of all, thanks very much for responding to my query. > I confirm that I just want the integer portion of the division. And your > suggested solution is nice and simple, but I do not have time to go > through as many as 255 clock cycles (worst case). What can I do to > reduce this to say 32 ? > Sorry for the long delay. My "solution" was just intended to meet the minimum requirements. As far as I know, general division is expensive. You can shift the trial subtractor up and down and adjust the quotient increment but this requires more logic. Could it be that either the divisor or dividend is relatively constant, in which case you could do something like constant coefficient multiplication as described in an app note on the Xilinx web page. If you have constant terms, or if one is only updated infrequently, perhaps you could repost your revised problem and get a more useful answer. If not, you could look at Gerrit Blaauw - Digital System Implementation ISBN 0-13-212241-3 pages 103-133 - unfortunately my copy is missing p. 96-128. Weird. From the last few pages, I get the impression that division is not easy to do cheaply - unless you have special conditions, like constants. regards, tom burgessArticle: 5947
In <5hbkea$f2t@news.scruz.net> rstevew@armory.butfukspam.com writes: >folks and remain/retain alt=Lynx compatibility! Up to half the Net is using >these old pre-NutScrape machines with shell accounts! That's an interesting myth that was once true. At every commercial site that I've been involved with, between 96% and 98% of hits come from a combination of Netscape and Internet Explorer, or compatible browsers. These numbers have been true for the last year, with the IE and Netscape percentages shifting. Choosing a technology platform is an interesting problem. For example, your FTP link on your web page does not work with my old Netcruiser browser... but works fine for NS. I found the Summit site to be very fast loading because pages are small with few additional connections required. Frames make the site easy to navigate, while the information is layed out in a simple format with no distractions. Henry (I have no affiliation with Summit) -- Henry Davis Consulting / New Product Consulting - Lifecycle /Henry Davis Consulting / Specializing in product life / 3 Russell Circle / management for high tech products. Natick, Ma 01760 / Market Segmentation, Product Definition ph:(508)651-9122 / Technology Reviews. Strategic Planning hdavis@ix.netcom.com / Full Service Turnkey Marketing fax:(508)651-2032 URL: http://www.henry-davis.comArticle: 5948
In article <01bc3938$7b4989a0$6e0db780@Rich>, "Rich K." <rich.katz@gsfc.nasa.gov> writes >hi, > >the subject may seem silly but it is not. previously, i had posted a >question about viewoffice <--> viewoffice file compatibility. i have run >some tests and found that for a viewoffice system derived from a pro series >license (bought from actel) and a viewoffice system derived from workview >plus (bought from viewlogic) could not exchange schematic files >representing an actel fpga design. > >i have e-mailed viewlogic a bunch of times on this, sent license files, >asked what restrictions and capabilities there are for each of the >licenses, and the answer i have received to solve this problem is between >the square brackets, two lines below this one: > > [] > >so, do any experienced viewlogic >users/customers/fae's/critics/supporters/abusers/whateverers have any >ideas? i now have 3 viewlogic seats networked together (pc's derived from >workview plus) and two dormant actel-bought/derived viewlogic licenses and >need to activate them as we have 1 or 2 new designers joining. what do i >do? i don't mind paying the required maintenance fees and all but i need >to have each of the designers' systems being compatible with one another. >having all of the seats being viewlogic and the same revision seemed >initially to be a good idea. > >has anyone tried this before? did my pc have a bad hair day? > >any thoughts or advice? > >thanks, > >rk I used Pro series for Xilinx (restricted version) and had to pass files to a user using workview office - I never had to go the other way, but this is what I did... I hope it seems ridiculous because that's what I thought! Please back all files up before trying this and take it slow with a big dsign, as it's easy to corrupt a file. 1. Note the file names of schematics and symbols in the restricted software version. (ie your Actel designs) 2. In the workview office environment, create a project and new (blank) schematics and symbols with the names previously created. 3. Open each of these files in turn with a text editor and note the unique number part of the second line eg. K 365293018100 SHIFT12. 4. Save this number - ie. 365293018100 and paste it over the number on the second line of your Actel generated files. 5. Copy all altered files to the relevant directories in your workview office project, and open as normal. Any blank sheets or empty symbols have not been processed properly. Retry!! Hope this helps - it certainly isn't something you can do often, and it seems outrageous that the various viewlogic systems won't share data. -- Mark WoodsArticle: 5949
In article <5hf2vv$ol@news.bit-net.com>, markn <mark5n@bit-net.com> wrote:
> I'd (MUCH!) rather not invest $3-500 ona prom burner and would
> like to know if i can 'just' thro some latches around the peel and
> 'beat' a configuration into it,..?...
> I gave ICT a call, but only got some mumbling about
> 'proprietary' info,...
You've just run into Excedrin Headache #0 of low-budget work with PLDs:
almost always, the programming specifications are secret, and therefore
you *can't* build your own programmer. Not possible. You have to buy a
commercial programmer.
There have been exceptions, although most of them, unfortunately, are of
purely historical interest. Even when information has been released in
the past, one wonders whether it's still correct for today's chips --
since programming information isn't part of the datasheet, there's no
promise that it will remain stable -- and anyway, in most cases the chips
for which info has been released are long gone.
The one major exception, on the low end, is Lattice's ispGAL22V10, which
is designed for in-circuit programming by the customer. The problem with
most in-circuit-programming parts, including the bigger Lattice ones, is
that while the datasheet tells you how to stuff the bits into the part, it
doesn't tell you the mapping between the circuit and the bits... so you
don't need a programmer but you do need the manufacturer's software, which
is rarely free or even cheap. But the 22V10 is a sufficiently standard
part that the ispGAL22V10 datasheet actually tells all (or did last time I
looked). Unfortunately, it's a very vanilla 22V10, not nearly as good as
the PEEL parts or the now-defunct Exel ERASIC (another part which appeared
to have a reasonably complete datasheet).
The situation's not much better on the high end, since the demise of the
Altera Flashlogic (nee Intel Flexlogic) parts. There is a ray of hope in
the unlikeliest place :-), because the Xilinx XC6200 series is meant for
user-reconfigurable applications and its datasheet necessarily tells all,
but this series is very new and its staying power isn't clear yet. (Also,
these are heavyweight chips that will not be cheap.)
--
Committees do harm merely by existing. | Henry Spencer
-- Freeman Dyson | henry@zoo.toronto.edu
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