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In article <4741af3c$0$507$bed64819@news.gradwell.net>,
Will Dean <will@nospam.demon.co.uk> wrote:
>"austin" <austin@xilinx.com> wrote in message
>news:fhq5o1$1721@cnn.xilinx.com...
>> Thanks for taking the time to let us know how all of the FPGA vendors fare
>> through their distributors. We don't often get that sort of feedback.
>As far as I can tell, the conventional distributors:
>1. Don't hold stock
>2. Don't break volume in any useful way, so you can't buy small quantities
>3. Can't give proper prices without going back to the mfg
>4. Can't offer hard technical advice (i.e. not in the published litterature)
>without going back to the mfg
>What are they for? Why are you still using them?
Here's one thing they do: they sell parts to large companys based on a PO.
In other words they loan money between the time of part delivery and the PO
getting paid. If you pay them late, I bet the interest rate they charge is
much better than credit-card interest rates, and I bet you can frequently
talk them out of charging interest.
So you can directly buy parts from many semiconductor manufactures using
your credit card, even from A and X (although X redirects you to a
distributer). This is my complaint: when you pay them by credit card, you
should get the best possible price plus the 2.5% credit card fee. I mean,
they get paid immediately, so they should be very happy with credit card
orders.
What the manufactures want even more: accurate projections of your future
purchases. Then they don't have to guess how many chips to make. Your
contract manufacture should be able to do a much better job of this than the
distributer.
--
/* jhallen@world.std.com AB1GO */ /* Joseph H. Allen */
int a[1817];main(z,p,q,r){for(p=80;q+p-80;p-=2*a[p])for(z=9;z--;)q=3&(r=time(0)
+r*57)/7,q=q?q-1?q-2?1-p%79?-1:0:p%79-77?1:0:p<1659?79:0:p>158?-79:0,q?!a[p+q*2
]?a[p+=a[p+=q]=q]=q:0:0;for(;q++-1817;)printf(q%79?"%c":"%c\n"," #"[!a[q-1]]);}
Article: 126301Will, I have forwarded your post onto the people who should care. I will keep everyone up to speed on what I find out. AustinArticle: 126302
On Nov 19, 7:46 am, xenix <last...@gmail.com> wrote: > hello all, > I am looking for some books for microblaze and some examples with > assembly for microblaze. since now i havent found anything helpful. > thank you > > regards Hi, A couple of things: Except for crt0.s, there really isn't a need for assembly programming a RISC processor. One needs to have serious skills, or a convoluted application, to be able to improve much on the output of a modern GCC compile. I'm not saying that it can't be done, just that it is not a beginner's task. A Google search turned up several good examples (some were crt0.s examples from others porting OS's) on the 1st page of hits. Learn to use Google; it can be a valuable tool. And there is a search tool on the Xilinx web site; everything anyone would need to know about the MicroBlaze processor can be found there. G.Article: 126303
On Nov 19, 7:55 am, Harald <Har...@yahoo.co.uk> wrote: > > You can download a free version, the ISE WebPack, from the Xilinx > > website. The full version costs around US$2500, I believe. The free > > version is pretty good, though, but it doesn't support some of the > > newer and denser chips. > > Wow thats for free? Cool, well i have a quite old Virtex|| board to I > assume that should be fine. Can this tool compete with the Synopsis and > Cadence Design Compilers? > > Cheers! Yes, WebPack is free. Well, not -exactly- free, you need to give Xilinx a valid email address, and let them try and sell you chips. :) A couple of years ago, I benchmarked XST (Xilinx Synthesis Tool) against FPGA Express (the Synopsys tool they used to sell with ISE) and found that the differences were very small. At the time I found the Synopsys tool was better at inferring chip constructs (like ROM) than XST, but once I core-gen'd a couple of parts, XST made an equivalent chip. G.Article: 126304
hi well yes i'm using model sim: the driver listing from modelsim for the data_in signal is as follows: drivers spi_memory_tb_vhd/data_in # Drivers for /spi_memory_tb_vhd/data_in(31:0): # U : Signal /spi_memory_tb_vhd/data_in(31) # 0 : Driver /spi_memory_tb_vhd/tb # U : Element /spi_memory_tb_vhd/uut/data_in(31) # U : Signal /spi_memory_tb_vhd/data_in(30) # 0 : Driver /spi_memory_tb_vhd/tb # U : Element /spi_memory_tb_vhd/uut/data_in(30) ....... ....... # U : Signal /spi_memory_tb_vhd/data_in(1) # 1 : Driver /spi_memory_tb_vhd/tb # U : Element /spi_memory_tb_vhd/uut/data_in(1) # U : Signal /spi_memory_tb_vhd/data_in(0) # 1 : Driver /spi_memory_tb_vhd/tb # U : Element /spi_memory_tb_vhd/uut/data_in(0) # for all signal in data_in (31 downto 0). so as far as i can tell the signal data_in is only driven by the testbench (or am i wrong?) also the singal data_in is defined as IN. so this should be ok. another thing i tried was that i forced the signal data_in to all '0' in modelsim. when i then did a write to an address i got a valid response on the following read from the same address.... i'm really running out of ideas here.... urbanArticle: 126305
> A couple of years ago, I benchmarked XST (Xilinx Synthesis Tool) > against FPGA Express (the Synopsys tool they used to sell with ISE) > and found that the differences were very small. At the time I found > the Synopsys tool was better at inferring chip constructs (like ROM) > than XST, but once I core-gen'd a couple of parts, XST made an > equivalent chip. Sounds good, I just have here a full version of 7.1 available. So everyone would recommend me to download the 9.2 webpackage version and install that instead of 7.1? Cheers!Article: 126306
On Nov 18, 12:09 pm, Dave Pollum <vze24...@verizon.net> wrote: > On Nov 17, 11:58 pm, radarman <jsham...@gmail.com> wrote: > > > I noticed that the Xilinx webpack version of ISE now runs in Linux. I > > seem to recall in the past that the webpack was a Windows only tool, > > so this seems like a signficant shift. > > > Does anyone know if Altera has any plans to release a Quartus webpack > > for Linux? I still prefer Altera devices for my hobby work even though > > my current employer is 100% Xilinx. However, I'm looking down the > > barrel of Vista on my next system, and while I would prefer to migrate > > to Linux, I can't justify buying a license for Quartus to play at > > home. > > > I suppose the other alternative is to bite the bullet, put my Altera > > dev boards away, and migrate to Xilinx dev boards. > > Just curious, why do you prefer Altera devices for hobby work? > -Dave Pollum Largely because I worked almost exclusively with Altera devices at my previous job, and still have several dev boards with Stratix & Cyclone parts on them. They are reasonably capable, and since I prefer vendor neutral VHDL anyway, it makes little difference (unless the idea I want to try out requires Xilinx specific features) Eventually, these boards will become too obsolete, at which point I'll probably migrate to Xilinx at home as well, but I can't afford to toss out perfectly working hardware.Article: 126307
On Mon, 19 Nov 2007 08:51:12 -0800, austin <austin@xilinx.com> wrote: >I have forwarded your post onto the people who should care. It's encouraging, and perhaps not too surprising, to see you responding thus. However, for small customers in Europe, the poor performance of distis in supporting smaller customers, both technically and in making strategic product choices, is very old news. And it's not just FPGAs; my bleat applies to the whole component distribution business. I don't buy parts from distis any more; I'm not in manufacturing, and on the rare occasions when I need to buy silicon I just take the one-off price hit of going to Digikey or whatever. But in earlier lives I was on both sides of the disti - as a small development-oriented customer, and as a technical FAE in a device manufacturer. In neither of these roles did I feel well-served by the distis. They often made noises about doing a technical sell and needing in-house technical expertise, but their FAEs were always paid peanuts and had to make their living through sales-target bonuses; so, surprise surprise, their focus was always on design-in numbers. Anything with a timeline longer than three months was beyond the next bonus payment and therefore irrelevant. Anything technically difficult could either be punted upwards to the manufacturers' FAEs, or (more likely in the case of small customers) simply ignored because the customer would not cost them very much if they merely went away. There was simply no motivation for the disti FAEs to get real technical expertise. They were usually spread way too thinly across a raft of disparate products from several vendors, so had no chance to gain real depth of knowledge in anything. I had hoped that with the recent consolidation of distribution in Europe, things might have improved. Maybe they have, but the feeling I get from this group is not encouraging. Maybe things are better in the US. Perhaps there are so many design starts there that even a modest distribution organisation can retain useful technical expertise. I simply don't know. It doesn't have to be like this. For example, I know a few of the distributors for various EDA tools here in the UK, and I perceive their technical expertise to be pretty impressive and their customer support responsive and helpful. Component distribution, by contrast, seems to be stuck in a 1970s road-warrior timewarp despite the obvious importance to future sales of effective support of new designs. They're not even very good at being a stockholding supermarket, as others have pointed out. (Sheesh, they are there to *sell* stuff. But the typical experience is to be told that you can't have one unless you want a truckload and you don't mind waiting until three weeks after the next festival of St.Polycarp, or something; and you aren't allowed to know what price it will be until you say how many you want, so you are barred from making your own intelligent decisions about what parts to use.) Thanks for letting me get that off my chest :-) -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK jonathan.bromley@MYCOMPANY.com http://www.MYCOMPANY.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.Article: 126308
Jonathan, If one argues that FPGA technology needs to become more user friendly, and easier to use, in order to make inroads into all possible applications, your experience is merely one example of an opportunity (for Xilinx). Sure, we could say "well, that is life" but who would we be serving? Or, we could strive to improve the situation and potentially walk away with stellar growth, and excellent sales figures? Personally, I will work towards the latter choice. AustinArticle: 126309
Hi, I have two simple questions : - To implement a conversion Paralle to Serial ASI (paralel data TS from Digital Tuner) you must use an FPGA or exist an chip that can make the conversion ? - If do not exist a dedicated chip, from where I can start to develop the FPGA device (Vhdl, Verilog, ecc) ? Someone has already done this ? Thanks for any response. Kappa.Article: 126310
On Mon, 19 Nov 2007 10:00:22 -0800, austin <austin@xilinx.com> wrote: >If one argues that FPGA technology needs to become more user friendly, >and easier to use, in order to make inroads into all possible >applications, your experience is merely one example of an opportunity >(for Xilinx). Please don't forget that the experiences I was reporting (ranting about) are a decade old. To a large extent I think it's an opportunity you've already grasped - webshop, excellent online documentation, free software downloads for smaller customers, good appnotes.... and, dare I say, informal access to top-notch factory expertise via public media such as this group. >Sure, we could say "well, that is life" but who would we be serving? Nah. You wouldn't do that. You need to eat too :-) Like I said: it seems to me that major FPGA vendors have somewhat taken that opportunity already. Almost without exception, they (or at least their FPGA business) started small, with reasonably close relations between factory and even the smaller customers. As they've grown they seem to have remembered that heritage, and the quality of technical information available through FPGA vendors' websites and other resources is pretty good. (Yes, I know people complain all the time. And you put a brave face on it, because you know that there's at least a grain of truth in most complaints, and you want happy customers and happy potential customers. We appreciate it. Really.) I see the result of all this being a sidelining of the traditional distributor role as intermediary between factory and customer. Instead, the successful distributors either act as supermarkets (in which case let us treat them as such, and punish with our lack of custom those who can't keep their shelves full of attractive products at attractive prices) or act as agencies helping large customers collaborate effectively with the factory to ensure a good deal for both parties. The traditional component disti, who tries to erect walls between customer and factory to protect his own revenue monopoly at the customer's expense, is surely a dinosaur whose meteorite is already bright in the sky. Their passing will be mourned by but few. -- Jonathan Bromley, Consultant DOULOS - Developing Design Know-how VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK jonathan.bromley@MYCOMPANY.com http://www.MYCOMPANY.com The contents of this message may contain personal views which are not the views of Doulos Ltd., unless specifically stated.Article: 126311
Didi wrote: > > I got infected with this paranoya ever since Xilinx bought > the coolrunner and hid the .xls file from me - those which > Philips had provided me with for their generation of devices and > which I have successfully used while such devices were to > be found. Which device do you target & what specs do you need. There are other low power CPLDs. The Atmel ATF150xBE's have very low static Icc, but do not come in all Coolrunner sizes. -jgArticle: 126312
Kappa, Have you visited: http://www.xilinx.com/esp/broadcast.htm ? AustinArticle: 126313
Andrew You can get away with quite a lot of component variations. We don't use this regulator on any of our development boards but do use it on some customer designs and it's ok. It does suffer from not having a particularly high switching frequency giving big magnetics and the external mosfets are a bit of pain compared to some the Linear Technology parts we now use in preference. The 2/3A ratings you are unlikely to need for most Spartan-3 based designs unless you have a lot of ancilliary bits and often the inductor current ratings use can as a result be smaller often than the example circuits. John Adair Enterpoint Ltd. On 19 Nov, 16:00, Andrew Greensted <ajg...@ohm.york.ac.uk> wrote: > Dear All, > > The TPS75003 is a triple voltage regulator designed for the Spartan-3 & > Spartan-3E series. It's got some quite specific component requirements. > Unfortunately, the datasheets and appnotes list parts that aren't that > easy to source in the UK. > > I've put together a list of parts available from Farnell (UK) that seem > to work well. > > The list and a PCB design are available here:http://www.bioinspired.com/users/ajg112/circuits/tps75003.shtml > > Hopefully this will save time for anyone else who plans to use the device. > > Andy > > -- > Dr. Andrew Greensted Department of Electronics > Bio-Inspired Engineering University of York, YO10 5DD, UK > > Tel: +44(0)1904 432828 Mailto: ajg...@ohm.york.ac.uk > Fax: +44(0)1904 432335 Web:http://www.bioinspired.com/users/ajg112Article: 126314
Thanks Austin ... > Have you visited: > > http://www.xilinx.com/esp/broadcast.htm Yes i have visited ... but I thought that there was something already ready. I am not very experienced with the FPGA, but we can try ... perhaps with the help of someone who knows more than me. I have a small idea ... You can help me ? Thanks. Kappa.Article: 126315
Hi Jim, > Sorry, should have given you a link:http://www.eetools.com/downloads/ml27h.exe > > > Does not look like a JTAG adaptor to me and there are no Xilinx > > devices on it list of supported parts - how can you read/write a > > coolrunner using this? > > Download that .exe, unpack, and the device list is under Chipmax2 > Their Topmax 2 model also has a back-socket for jtag, but the > ZIF48's also use JTAG. just did all that. Well, not much luck. The only coolrunner device which appears on the list is the xcr3032xl - which is too small and, more importantly, discontinued. So at least this programmer manufacturer has had only quite limited access to the excel jedec->jtag mapping files of xilinx. Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------ On Nov 19, 12:39 pm, Jim Granville <no.s...@designtools.maps.co.nz> wrote: > Didi wrote: > >>I am sure the system is not that clever. It just loads a JED file, and > >>programs the device. > >>You can download the Pgmr file yourself from eetools, and it runs in > >>demo-mode with no pgmr found, so you can move that around as much as you > >>like, and load JED files. > > > Well I did look for that Chipmax programmer of theirs you mentioned > > in your other post and located it at > >http://www.eetools.com/index.cfm?fuseaction=product.display&Product_ID=7 > > Sorry, should have given you a link:http://www.eetools.com/downloads/ml27h.exe > > > Does not look like a JTAG adaptor to me and there are no Xilinx > > devices on it list of supported parts - how can you read/write a > > coolrunner using this? > > Download that .exe, unpack, and the device list is under Chipmax2 > Their Topmax 2 model also has a back-socket for jtag, but the > ZIF48's also use JTAG. > > We have made an adaptor, that takes the ZIF48, and buffers > to a IDC10 header, to match the Atmel CPLD programmer. > So with this, you can ISP pgm, into a cable/pcb. > > Programs ATF1502BE much faster via ChipMAX than via the AtmelISP SW. > (and we can vector test via the ZIF48, prior to PCB fab ) > > Which device did you need ? > > -jgArticle: 126316
On Nov 19, 8:49 pm, Jim Granville <no.s...@designtools.maps.co.nz> wrote: > Didi wrote: > > > I got infected with this paranoya ever since Xilinx bought > > the coolrunner and hid the .xls file from me - those which > > Philips had provided me with for their generation of devices and > > which I have successfully used while such devices were to > > be found. > > Which device do you target & what specs do you need. > There are other low power CPLDs. The Atmel ATF150xBE's have > very low static Icc, but do not come in all Coolrunner sizes. > > -jg I would be happy if I could do 128 to 512 cell devices - I have different projects. I could use both the coolrunner-II and the xpla3 (the latter mostly for the 5V tolerant inputs). Frankly, if the original coolrunner were available I would still use it, although it stopped around 100 MHz or so. I did look at Atmel several times, last time must have been < a year ago, and I found nothing to switch to, I do not remember why. I'll give them a look again anyway. Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------Article: 126317
Dear Group, For anyone starting out designing switched mode power supplies, you could do worse than read Linear Tech's appnote, AN19, by Carl Nelson. Although it's written for the ancient LT1070, it is an excellent introduction to the many types of switching regulator topologies. There's also an inspired section called 'Troubleshooting Hints'. My favourites are numbers 5 and 12. See below. HTH., Syms. 5. Fred's Inductor (Or Transformer) Inductors are not like lawn mowers. If you want to borrow the one out of Fred's drawer, make sure it's the right value for your application. 12. Didn't Read the Data Sheet Then you shall have no pie.Article: 126318
> > Which device do you target & what specs do you need. > > There are other low power CPLDs. The Atmel ATF150xBE's have > > very low static Icc, but do not come in all Coolrunner sizes. > > > -jg > > I would be happy if I could do 128 to 512 cell devices - I have > different projects. I could use both the coolrunner-II and > the xpla3 (the latter mostly for the 5V tolerant inputs). > Frankly, if the original coolrunner were available I would > still use it, although it stopped around 100 MHz or so. > > I did look at Atmel several times, last time must have > been < a year ago, and I found nothing to switch to, I do > not remember why. I'll give them a look again anyway. Just checked that. Well, what they have is ancient stuff - would have been that even 10 years ago. Their 128 cell device, which I would have considered - ATF1508ASV(L), draws tens of milliamps in "standby" mode, has all these pre-coolrunner various low-power modes to switch to etc., nothing I would really use in my designs. Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------ On Nov 19, 10:01 pm, Didi <didi...@gmail.com> wrote: > On Nov 19, 8:49 pm, Jim Granville <no.s...@designtools.maps.co.nz> > wrote: > > > Didi wrote: > > > > I got infected with this paranoya ever since Xilinx bought > > > the coolrunner and hid the .xls file from me - those which > > > Philips had provided me with for their generation of devices and > > > which I have successfully used while such devices were to > > > be found. > > > Which device do you target & what specs do you need. > > There are other low power CPLDs. The Atmel ATF150xBE's have > > very low static Icc, but do not come in all Coolrunner sizes. > > > -jg > > I would be happy if I could do 128 to 512 cell devices - I have > different projects. I could use both the coolrunner-II and > the xpla3 (the latter mostly for the 5V tolerant inputs). > Frankly, if the original coolrunner were available I would > still use it, although it stopped around 100 MHz or so. > > I did look at Atmel several times, last time must have > been < a year ago, and I found nothing to switch to, I do > not remember why. I'll give them a look again anyway. > > Dimiter > > ------------------------------------------------------ > Dimiter Popoff Transgalactic Instruments > > http://www.tgi-sci.com > ------------------------------------------------------Article: 126319
Didi wrote: > On Nov 19, 8:49 pm, Jim Granville <no.s...@designtools.maps.co.nz> > wrote: > >>Didi wrote: >> >> >>>I got infected with this paranoya ever since Xilinx bought >>>the coolrunner and hid the .xls file from me - those which >>>Philips had provided me with for their generation of devices and >>>which I have successfully used while such devices were to >>>be found. >> >>Which device do you target & what specs do you need. >>There are other low power CPLDs. The Atmel ATF150xBE's have >>very low static Icc, but do not come in all Coolrunner sizes. >> >>-jg > > > I would be happy if I could do 128 to 512 cell devices - I have > different projects. I could use both the coolrunner-II and > the xpla3 (the latter mostly for the 5V tolerant inputs). The Atmel devices top out at 128 macrocells, but you can pack a little more into a Atmel macrocell. The new BE family, are uA static devices, in 32/64 MC (released) and 128MC (soon) The Lattice ispMACH4000 family go to 256MC in Zero power, and 512 in non-zero power. (IIRC) In the larger 128/512 macrocell area, CPLDs struggle a little, and the FPGA Fabric CPLDs are taking over (Altere MAX II, lattice MachXO, and the Actel Igloo devices are examples. Igloo are relatively new, but I saw a press release claiming $1.50[volume] for ~192 macrocell equiv device. > Frankly, if the original coolrunner were available I would > still use it, although it stopped around 100 MHz or so. > > I did look at Atmel several times, last time must have > been < a year ago, and I found nothing to switch to, I do > not remember why. I'll give them a look again anyway. Yes, 5V compliance is something the CPLD industry is slow to grasp. CPLDs are general purpose devices that SHOULD be wide-supply complaint, like Microcontrollers. Power MOSFETS are a common load, and they are not lowering the drive voltage on those :) The uC sector 'gets this', and the new shrink process uC commonly DO have 5V tolerance, and the better ones, even allow 5V VccIO for drive to 5V, and 5V ADC's Many also include on-chip uA regulators (where power budgets allow) Lattice do have a 'sort-of' 5V spec: they say 5.5V max, but add this strange qualifier : "5. Maximum of 64 I/Os per device with VIN > 3.6V is allowed." [How does one IO, know, or care, what the voltage is on another IO ?] -jgArticle: 126320
> The Atmel devices top out at 128 macrocells, but you can pack > a little more into a Atmel macrocell. > The new BE family, are uA static devices, in 32/64 MC (released) > and 128MC (soon) Well the fact of the matter is that there is no CPLD on the market to compete with all the coolrunner parameters at the same time - and I do use them. Philips could have taken over the sector with that device easily, we'll never know what happened behind the scenes so they sold it to xilinx - who immediately killed the original Philips line which was great but had leaked out programming information (no other plausible reason for killing such a good device I can think of). And now we stand with xilinx having monopoly over the only up-to-date CPLD on the market, and they will not let you write to it without revealing your written code to them (oh yeah, they'll swear to god their software only translates one map to another and I am just paranoid because I think it is the spyware it actually is - but ask them _why_ do they keep that jedec -> jtag mapping data secret and feel free to wait for another century for a plausible answer). Dimiter ------------------------------------------------------ Dimiter Popoff Transgalactic Instruments http://www.tgi-sci.com ------------------------------------------------------ On Nov 19, 11:00 pm, Jim Granville <no.s...@designtools.maps.co.nz> wrote: > Didi wrote: > > On Nov 19, 8:49 pm, Jim Granville <no.s...@designtools.maps.co.nz> > > wrote: > > >>Didi wrote: > > >>>I got infected with this paranoya ever since Xilinx bought > >>>the coolrunner and hid the .xls file from me - those which > >>>Philips had provided me with for their generation of devices and > >>>which I have successfully used while such devices were to > >>>be found. > > >>Which device do you target & what specs do you need. > >>There are other low power CPLDs. The Atmel ATF150xBE's have > >>very low static Icc, but do not come in all Coolrunner sizes. > > >>-jg > > > I would be happy if I could do 128 to 512 cell devices - I have > > different projects. I could use both the coolrunner-II and > > the xpla3 (the latter mostly for the 5V tolerant inputs). > > The Atmel devices top out at 128 macrocells, but you can pack > a little more into a Atmel macrocell. > The new BE family, are uA static devices, in 32/64 MC (released) > and 128MC (soon) > > The Lattice ispMACH4000 family go to 256MC in Zero power, and > 512 in non-zero power. (IIRC) > > In the larger 128/512 macrocell area, CPLDs struggle a little, > and the FPGA Fabric CPLDs are taking over (Altere MAX II, > lattice MachXO, and the Actel Igloo devices are examples. > Igloo are relatively new, but I saw a press release claiming > $1.50[volume] for ~192 macrocell equiv device. > > > Frankly, if the original coolrunner were available I would > > still use it, although it stopped around 100 MHz or so. > > > I did look at Atmel several times, last time must have > > been < a year ago, and I found nothing to switch to, I do > > not remember why. I'll give them a look again anyway. > > Yes, 5V compliance is something the CPLD industry is slow to grasp. > CPLDs are general purpose devices that SHOULD be wide-supply complaint, > like Microcontrollers. Power MOSFETS are a common load, and > they are not lowering the drive voltage on those :) > > The uC sector 'gets this', and the new shrink process uC > commonly DO have 5V tolerance, and the better ones, even > allow 5V VccIO for drive to 5V, and 5V ADC's > Many also include on-chip uA regulators (where power budgets allow) > > Lattice do have a 'sort-of' 5V spec: they say 5.5V max, but > add this strange qualifier : > "5. Maximum of 64 I/Os per device with VIN > 3.6V is allowed." > [How does one IO, know, or care, what the voltage is on another IO ?] > > -jgArticle: 126321
Didi wrote: >>>Which device do you target & what specs do you need. >>>There are other low power CPLDs. The Atmel ATF150xBE's have >>>very low static Icc, but do not come in all Coolrunner sizes. >> >>>-jg >> >>I would be happy if I could do 128 to 512 cell devices - I have >>different projects. I could use both the coolrunner-II and >>the xpla3 (the latter mostly for the 5V tolerant inputs). >> Frankly, if the original coolrunner were available I would >>still use it, although it stopped around 100 MHz or so. >> >> I did look at Atmel several times, last time must have >>been < a year ago, and I found nothing to switch to, I do >>not remember why. I'll give them a look again anyway. > > > Just checked that. Well, what they have is ancient stuff - would > have been that even 10 years ago. Their 128 cell device, > which I would have considered - ATF1508ASV(L), draws tens > of milliamps in "standby" mode, has all these pre-coolrunner > various low-power modes to switch to etc., nothing I would > really use in my designs. For lowest power/new designs, you would choose ATF1508BE - not sure on the exact uA spec of that, I think ATF1508BE-7AU100 is now sampling. See http://www.embeddedstar.com/weblog/2007/01/03/atmel-atf15xxbe-cpld/ -jgArticle: 126322
Il 18/11/2007 0.12, Didi ha scritto: > A few hours of digging later I found out that the JTAG > sequences needed to write to a XPLA3 and Coolrunner-II > are publically available. > However, the JEDEC -> JTAGgable fuse address translation > map is not (I do have that for the Philips Coolrunner, > the bit locations in the JTAG sequence descriptions have > nothing to do with the bit locations in the JEDEC file). Dimitri, I'm not sure I understood what your problem is; do you need to write your own JTAG programmer routines ? In last project I did I had to program (or re-program) a CoolrunnerII (XC2C256) by JTAG with a microcontroller. Xilinx provides all the info you need in their app notes. It was not so difficult; in fact, it works so well I'm using that also on production. Just a second to program a XC2C256, reasonably filled. 1) Tweak the XAPP058 code for your platform; easy, that code is meant to be "easily" ported. 2) suppose I have my foo.jed file to program (made for XC2C256) 3) use Impact (free download) to translate the jedec in a XSVF binary file. You can do on GUI by hand, or by makefile as I prefer; syntax is: impact -batch impact_make_xsvf.cmd where "impact_make_xsvf.cmd" contains: setMode -bs setCable -port xsvf -file "foo.xsvf" addDevice -p 1 -file "foo.jed" Program -p 1 -e -v -defaultVersion 0 quit 4) write (or google..) a little utility (BIN2C) to convert your binary XSVF image file in a C const array in source form, or include it directly with assembly directives, if any, or whatever you think. 5) the "player" in XAPP058 will erase, blank check, program and verify your device. In fact, they did all the hard work for you, and provide also the source of the jtag "player". You don't need to pay anyone to do the translation, just use the free Impact tool. And yes, it works even without network connection (no spyware, I think!).Article: 126323
On Nov 19, 4:27 pm, Didi <didi...@gmail.com> wrote: > > The Atmel devices top out at 128 macrocells, but you can pack > > a little more into a Atmel macrocell. > > The new BE family, are uA static devices, in 32/64 MC (released) > > and 128MC (soon) > > Well the fact of the matter is that there is no CPLD on the market > to compete with all the coolrunner parameters at the same time - and > I do use them. I feel your pain. It is often that I need devices with 5 volt tolerance. But that makes it difficult to migrate to the finer processes which lower the cost of devices. Adding extra processing to retain 5 volt tolerance drives the price back up. I can't say which of the two is more significant, but it is interesting that many MCU vendors seem able to produce 5 volt tolerant devices in the newer processes at *VERY low* prices. I looked at exactly this issue a bit over a year ago and came up with the XPLA family and the Lattice parts. Xilinx won't compete on price with the XPLA line because it is not one of the new lines they are pushing. I think they literally don't care a hoot about design wins with older logic. At least the sales people are always pushing the new stuff even after I have told them why it is not suited (or they have not been able to tell me how I will be able to get these new parts in preproduction). Clearly there is a lot of incentive to salesmen for design wins with the new parts over the old. > Philips could have taken over the sector with that device easily, > we'll never know what happened behind the scenes so they sold it to > xilinx - who immediately killed the original Philips line which was > great but had leaked out programming information (no other plausible > reason for killing such a good device I can think of). Philips and Xilinx have different processes. Xilinx adjusted the design to suit their manufacturing and to improve it in some ways. They may not be willing to share detailed info, but I don't think they would go to the expense of redesigning a chip line just to prevent users from having "programming information". > And now we stand with xilinx having monopoly over the only up-to-date > CPLD on the market, and they will not let you write to it without > revealing your written code to them (oh yeah, they'll swear to god > their software only translates one map to another and I am just > paranoid because I think it is the spyware it actually is - but > ask them _why_ do they keep that jedec -> jtag mapping data secret > and feel free to wait for another century for a plausible answer). You're only paranoid because everyone is out to get you! You don't have to literally give them your design. You just have to process it with their software, right? If all else fails, you can do that on a machine that is not connected anywhere and wipe the disk once you have taken your data with you. That should make even the CIA happy... well maybe not the CIA. They would want to reverse engineer the code and destroy the hard drive along with any non-volatile memory. Jim, > > The Atmel devices top out at 128 macrocells, but you can pack > > a little more into a Atmel macrocell. > > The new BE family, are uA static devices, in 32/64 MC (released) > > and 128MC (soon) I guess these are new devices that weren't out when I looked. Are they planning anything larger than 128 macrocells? Personally I like the Lattice parts. They also have some interesting flash FPGA like devices, but of course they are not zero power. > > The Lattice ispMACH4000 family go to 256MC in Zero power, and > > 512 in non-zero power. (IIRC) > > > In the larger 128/512 macrocell area, CPLDs struggle a little, > > and the FPGA Fabric CPLDs are taking over (Altere MAX II, > > lattice MachXO, and the Actel Igloo devices are examples. > > Igloo are relatively new, but I saw a press release claiming > > $1.50[volume] for ~192 macrocell equiv device. I'm not sure why you say CPLDs are "taking over". 512 macrocell devices have been around for quite some time. Actually, I think the Lattice XO flash based FPGA parts are doing a good job of pushing down, along with the MAX II parts which are FPGA like. Just because they have flash, does not make them CPLDs in my opinion. These lines are LUT based and route like FPGAs. I think that makes them much more usable for the high end of CPLDs, not to mention cheaper! > > Lattice do have a 'sort-of' 5V spec: they say 5.5V max, but > > add this strange qualifier : > > "5. Maximum of 64 I/Os per device with VIN > 3.6V is allowed." > > [How does one IO, know, or care, what the voltage is on another IO ?] I asked about this once and they told me it has to do with the leakage current. You can drive the I/Os above Vdd, but it will draw more current. Too many at one time and the device can blow. Not totally unlike multiple I/Os driving LEDs and such. But you can ask your FAE.Article: 126324
Didi wrote: >>The Atmel devices top out at 128 macrocells, but you can pack >>a little more into a Atmel macrocell. >>The new BE family, are uA static devices, in 32/64 MC (released) >>and 128MC (soon) > > > Well the fact of the matter is that there is no CPLD on the market > to compete with all the coolrunner parameters at the same time - and > I do use them. Across the size range, you may be right. But at the highest volume end Atmel and Lattice have good low power offerings. Actel may start to impact > 128MC CPLDs > Philips could have taken over the sector with that device easily, > we'll never know what happened behind the scenes so they sold it to > xilinx - who immediately killed the original Philips line which was > great but had leaked out programming information (no other plausible > reason for killing such a good device I can think of). My understanding there is the parts were not externally foundry fab'd and when the plug was pulled on the fab line, that then killed the product line. (similar problem happened with some Lattice.AMD parts) Not good for the end customers. - but certainly not a conspiracy, instead a by-product of some decoupled bean-counter's decisons, and we have all seen that before ! :) > And now we stand with xilinx having monopoly over the only up-to-date > CPLD on the market, and they will not let you write to it without > revealing your written code to them (oh yeah, they'll swear to god > their software only translates one map to another and I am just > paranoid because I think it is the spyware it actually is - but > ask them _why_ do they keep that jedec -> jtag mapping data secret > and feel free to wait for another century for a plausible answer). That is a good question. Comments Austin ? ( or Jesse? ) -jg
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