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"rickman" <gnuarm@gmail.com> schrieb im Newsbeitrag news:1155852323.739435.194990@75g2000cwc.googlegroups.com... > Antti wrote: >> rickman schrieb: >> >> > Antti wrote: >> > > bm schrieb: >> > > >> > > > Interesting ...Any pointer ? >> > > >> > > you really learn how to goofle ! :) >> > > >> > > just enter "usb fpga ukp" as search term and there you, first hit! >> > >> > Was this a typo? I get a bunch of links to sites giving pricing in >> > Brittish pounds. >> > >> > Maybe you were referring to this... >> > >> > http://www.opencores.org/projects.cgi/web/usb_phy/overview >> NO. >> and NO typo. >> >> google search web search from my PC with keywords "usb fpga ukp" >> returns as first hit the following URL (I just rechecked!) >> >> http://www.geocities.jp/kwhr0/hard/pc8001.html > > Well I guess you are just special then. I get > http://lists.distributed.net/pipermail/hardware/1998-October/000325.html > and I would have no idea why you would use "ukp" as part of the search. > Care to explain or do you prefer to remail mysterious about it? > > BTW, the address you posted gives me a web page in an Asian language, > possibly Japanese. I am not able to read any of it. > I had lost the web pointer, so I found it again by googling. I remembered that the 1bit processor had some name ukx something and was lucky to have the search to return the page. I understand from japanese as much as you do, eg nil. but verilog is verilog, also from japanese website. just take the last archive from that page it is the latest source code I think Antti BTW google can translate this page to englishArticle: 106726
"rickman" <gnuarm@gmail.com> wrote in message news:1155852323.739435.194990@75g2000cwc.googlegroups.com... > > BTW, the address you posted gives me a web page in an Asian language, > possibly Japanese. I am not able to read any of it. > Did you see the bit on the Google search result page where it says 'translate this page'? Press that, and then you get stuff you can read, but not understand. Along the lines of 'My hovercraft is full of eels. For great justice.'. HTH, Syms. :-) p.s. The abbreviation for pounds sterling is properly GBP as those pesky Ukrainians wanted UK too.Article: 106727
"fpganovice" <alecwei@gmail.com> wrote in message news:1155836380.092010.183830@m73g2000cwd.googlegroups.com... > Hi Mikhail, > > Thanks for your reply. The VGA core does use a Wishbone bus, and it > has built-in Wishbone master and slave interfaces. It seems like I > just need to set some registers through the slave and get access to > external memory through the master. Therefore I was thinking those > interfaces could connect with my FPGA hardware directly, or do I still > need something to talk to the core? > Depending on what you mean under "directly". The MIG memory controller is not aware of Wishbone... So, you will need to do a Wishbone interface for it, however simple. The same is true for the other direction... /MikhailArticle: 106728
Symon wrote: > "rickman" <gnuarm@gmail.com> wrote in message > news:1155852323.739435.194990@75g2000cwc.googlegroups.com... > > > > BTW, the address you posted gives me a web page in an Asian language, > > possibly Japanese. I am not able to read any of it. > > > Did you see the bit on the Google search result page where it says > 'translate this page'? Press that, and then you get stuff you can read, but > not understand. Along the lines of 'My hovercraft is full of eels. For great > justice.'. I think you replied to the wrong post. I did not find that page through Google. My search came up with other unrelated pages...Article: 106729
hi i am new whit FPGA i just buy the spartan-3e starter kit, i am looking a tcp/ip stack to use whit the kit ( a free one) if any one have some info it will we great thanks DavidArticle: 106730
Mark McDougall wrote: > Martin Schoeberl wrote: > > > And for the SOPC builder all information > > is in the .ptf. > > Ah yes, indeed! However, we'll strategically overlook mentioning NIOS > IDE projects and the !@#*@&^#%$% workspace... ;) Although the Nios IDE is Eclipse under its makeup, and Eclipse supports Subversion very well via the Subclipse plugin: http://subclipse.tigris.org - has anyone tried installing this? > > Regards, > > -- > Mark McDougall, Engineer > Virtual Logic Pty Ltd, <http://www.vl.com.au> > 21-25 King St, Rockdale, 2216 > Ph: +612-9599-3255 Fax: +612-9599-3266Article: 106731
rickman wrote: > Antti wrote: > > rickman schrieb: > > > > > Antti wrote: > > > > bm schrieb: > > > > > > > > > Interesting ...Any pointer ? > > > > > > > > you really learn how to goofle ! :) > > > > > > > > just enter "usb fpga ukp" as search term and there you, first hit! > > > > > > Was this a typo? I get a bunch of links to sites giving pricing in > > > Brittish pounds. > > > > > > Maybe you were referring to this... > > > > > > http://www.opencores.org/projects.cgi/web/usb_phy/overview > > NO. > > and NO typo. > > > > google search web search from my PC with keywords "usb fpga ukp" > > returns as first hit the following URL (I just rechecked!) > > > > http://www.geocities.jp/kwhr0/hard/pc8001.html > > Well I guess you are just special then. I get > http://lists.distributed.net/pipermail/hardware/1998-October/000325.html > and I would have no idea why you would use "ukp" as part of the search. > Care to explain or do you prefer to remail mysterious about it? > > BTW, the address you posted gives me a web page in an Asian language, > possibly Japanese. I am not able to read any of it. Maybe you have your google search preferences set to return "English pages only" PatArticle: 106732
check out http://www.itee.uq.edu.au/~peters/xsvboard/stack/stack.htm David wrote: > hi > i am new whit FPGA i just buy the spartan-3e starter kit, > i am looking a tcp/ip stack to use whit the kit ( a free one) > if any one have some info it will we great > thanks > DavidArticle: 106733
pmaupin@gmail.com wrote: > rickman wrote: > > Antti wrote: > > > rickman schrieb: > > > > > > > Antti wrote: > > > > > bm schrieb: > > > > > > > > > > > Interesting ...Any pointer ? > > > > > > > > > > you really learn how to goofle ! :) > > > > > > > > > > just enter "usb fpga ukp" as search term and there you, first hit! > > > > > > > > Was this a typo? I get a bunch of links to sites giving pricing in > > > > Brittish pounds. > > > > > > > > Maybe you were referring to this... > > > > > > > > http://www.opencores.org/projects.cgi/web/usb_phy/overview > > > NO. > > > and NO typo. > > > > > > google search web search from my PC with keywords "usb fpga ukp" > > > returns as first hit the following URL (I just rechecked!) > > > > > > http://www.geocities.jp/kwhr0/hard/pc8001.html > > > > Well I guess you are just special then. I get > > http://lists.distributed.net/pipermail/hardware/1998-October/000325.html > > and I would have no idea why you would use "ukp" as part of the search. > > Care to explain or do you prefer to remail mysterious about it? > > > > BTW, the address you posted gives me a web page in an Asian language, > > possibly Japanese. I am not able to read any of it. > > Maybe you have your google search preferences set to return "English > pages only" Isn't that rather irrelevant? Even if the search had turned up a Japanese page, how would I have any clue as to what it was about? Antti seems to think that this was somehow an obviously useful page and should have been found by the OP. Bah!Article: 106734
Thanks Antti ! Put the tranlsated page here : http://osainto.free.fr/USBHOST/UKP/Version%20traduite%20de%20la%20page%20ht= tp--www_geocities_jp-kwhr0-hard-pc8001.htm Not sure it does contain what i'm looking for (direct connection from I/O pins to USB) but interesting anyway ..... Antti a =E9crit : > rickman schrieb: > > > Antti wrote: > > > bm schrieb: > > > > > > > Interesting ...Any pointer ? > > > > > > you really learn how to goofle ! :) > > > > > > just enter "usb fpga ukp" as search term and there you, first hit! > > > > Was this a typo? I get a bunch of links to sites giving pricing in > > Brittish pounds. > > > > Maybe you were referring to this... > > > > http://www.opencores.org/projects.cgi/web/usb_phy/overview > NO. > and NO typo. > > google search web search from my PC with keywords "usb fpga ukp" > returns as first hit the following URL (I just rechecked!) >=20 > http://www.geocities.jp/kwhr0/hard/pc8001.html >=20 > AnttiArticle: 106735
Did translate another page from the original link : http://osainto.free.fr/USBHOST/UKP/Version%20traduite%20de%20la%20page%20ht= tp--www_asahi-net_or_jp-~qx5k-iskw-robot-usbhost.htm This one does contain actual material for HW connection aspects Great ! BM a =E9crit : > Thanks Antti ! > Put the tranlsated page here : > http://osainto.free.fr/USBHOST/UKP/Version%20traduite%20de%20la%20page%20= http--www_geocities_jp-kwhr0-hard-pc8001.htm > > Not sure it does contain what i'm looking for (direct connection from > I/O pins to USB) but interesting anyway ..... > > > > Antti a =E9crit : > > > rickman schrieb: > > > > > Antti wrote: > > > > bm schrieb: > > > > > > > > > Interesting ...Any pointer ? > > > > > > > > you really learn how to goofle ! :) > > > > > > > > just enter "usb fpga ukp" as search term and there you, first hit! > > > > > > Was this a typo? I get a bunch of links to sites giving pricing in > > > Brittish pounds. > > > > > > Maybe you were referring to this... > > > > > > http://www.opencores.org/projects.cgi/web/usb_phy/overview > > NO. > > and NO typo. > > > > google search web search from my PC with keywords "usb fpga ukp" > > returns as first hit the following URL (I just rechecked!) > >=20 > > http://www.geocities.jp/kwhr0/hard/pc8001.html > >=20 > > AnttiArticle: 106736
"rickman" <gnuarm@gmail.com> schrieb im Newsbeitrag news:1155874157.627847.11130@i3g2000cwc.googlegroups.com... > pmaupin@gmail.com wrote: >> rickman wrote: >> > Antti wrote: >> > > rickman schrieb: >> > > >> > > > Antti wrote: >> > > > > bm schrieb: >> > > > > >> > > > > > Interesting ...Any pointer ? >> > > > > >> > > > > you really learn how to goofle ! :) >> > > > > >> > > > > just enter "usb fpga ukp" as search term and there you, first >> > > > > hit! >> > > > >> > > > Was this a typo? I get a bunch of links to sites giving pricing in >> > > > Brittish pounds. >> > > > >> > > > Maybe you were referring to this... >> > > > >> > > > http://www.opencores.org/projects.cgi/web/usb_phy/overview >> > > NO. >> > > and NO typo. >> > > >> > > google search web search from my PC with keywords "usb fpga ukp" >> > > returns as first hit the following URL (I just rechecked!) >> > > >> > > http://www.geocities.jp/kwhr0/hard/pc8001.html >> > >> > Well I guess you are just special then. I get >> > http://lists.distributed.net/pipermail/hardware/1998-October/000325.html >> > and I would have no idea why you would use "ukp" as part of the search. >> > Care to explain or do you prefer to remail mysterious about it? >> > >> > BTW, the address you posted gives me a web page in an Asian language, >> > possibly Japanese. I am not able to read any of it. >> >> Maybe you have your google search preferences set to return "English >> pages only" > > Isn't that rather irrelevant? Even if the search had turned up a > Japanese page, how would I have any clue as to what it was about? > > Antti seems to think that this was somehow an obviously useful page and > should have been found by the OP. Bah! > LOL no I am just having my fun. sorry rick. no this google search wasnt obvious. but the page it should have landed can be found by other means too - I found it from some cross links that talked about PC8001 retrocomputer and those links pointed to that japanese site where I found the UKP (USB Keyboard Processor) there are some more pages from that japanese guy I think I looked at his 'one bit processor' and found it interesting. but I forgot the link, and how I initially find it. So I tried if I can find the site again with google and found. I added USB FPGA to google search and I rememebered the name of special processor being short and have UK in the name, I tried a few combinations until google itself suggested to change the search term to UKP, and after that the page link appeared ! sorry again - rick - I am under extreme stress and I just cant help of having the comments, eh they way I do. cheers, AnttiArticle: 106737
I think I've come up with a "better" way to do it. This one uses the
data input strobe as the clock for the flip flops. Much cleaner. The
only thing I can't quite figure out how to do is make the SPLD power up
with sequence S3. This really isn't a BIG deal since the
microprocessor has to go through a reset sequence at power-up, but its
annoying to think about...
I'd like the SPLD to power up with STSDSB high and data.oe=0 (count =
S3).
Grant
$define S0 'b'00
$define S1 'b'01
$define S2 'b'10
$define S3 'b'11
STSDSB = count:S3; /* Disable Status outputs if count is < S3 */
data.oe = !STSDSB; /* Enable data bus if count is < S3 */
data = 'h'C3 & count:S0 # /* First byte is the C3 jump instruction */
'h'00 & count:S1 # /* Second is the low address location */
jmpadr & count:S2; /* Third is the high address location */
count.ck = !pDBIN;
count.sp = 'b'0;
count.ar = !pRESET;
SEQUENCE count {
PRESENT S0 next S1;
PRESENT S1 next S2;
PRESENT S2 next S3;
PRESENT S3 next S3;
}
Article: 106738Siva Velusamy wrote: > > Can anybody tell me what causes this difference in speed? > > Any hints on how to increase the speed would also be very welcome. > > > > Currently I am considering using the serial port to transfer data back > > to the PC, since it would get a higher throughput. > > The ethernet port would also be an option, but since I have no license > > for the Ethernet core from Xilinx it is kinda hard to get it working. > > > > I'd suggest you try using a download TCL script from within XMD. > Basically write a TCL script which reads N bytes from X location, source > it within XMD and then execute it. This will avoid the socket > communication and remote protocol overhead between XMD and GDB. > > However, I *think* you are mainly limited by the speed of the jtag > protocol between the powerpc and XMD. In which case using Ethernet or > RS232 might be the better option. > > /Siva Thanks, I tried that too, but it did not seem to improve the speed very much. So, I think you are right about the JTAG protocol being the bottleneck. I have the RS232 port working now and am using the xmodem protocol to transfer data. Theoretically the USB interface with the board should be a lot faster, but I can manage like this too.Article: 106739
Symon wrote: > Did you see the bit on the Google search result page where it says > 'translate this page'? Press that, and then you get stuff you can read, but > not understand. Along the lines of 'My hovercraft is full of eels. For great > justice.'. The KPU description was understandable for me: http://tinyurl.com/lzauk And the 1 bit processor looks interesting and it comes with full Verilog source code (commented in english). But why Antti called it 1 bit? It uses 8 bit registers and a 10 bit program counter. -- Frank Buss, fb@frank-buss.de http://www.frank-buss.de, http://www.it4-systems.deArticle: 106740
Mark McDougall <markm@vl.com.au> writes: > Martin Schoeberl wrote: > > > And for the SOPC builder all information > > is in the .ptf. > > Ah yes, indeed! However, we'll strategically overlook mentioning NIOS > IDE projects and the !@#*@&^#%$% workspace... ;) As for NIOS I've made a makefile to build everything from the ptf file. In the NIOS case compile.tcl, mysystem.ptf and makefile are the only files checked in besides hdl and c source files. The makefile is probably not portable across different versions of the sopc builder. There are lots of variables which have to be set (SOPC_PERL, sopc_kit_nios, etc.) Petter -- A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing on usenet and in e-mail?Article: 106741
logjam wrote: > I think I've come up with a "better" way to do it. This one uses the > data input strobe as the clock for the flip flops. Much cleaner. The > only thing I can't quite figure out how to do is make the SPLD power up > with sequence S3. This really isn't a BIG deal since the > microprocessor has to go through a reset sequence at power-up, but its > annoying to think about... > > I'd like the SPLD to power up with STSDSB high and data.oe=0 (count = > S3). > > Grant > > $define S0 'b'00 > $define S1 'b'01 > $define S2 'b'10 > $define S3 'b'11 I'm not going to try and decode the full state details, but here are some tips : In any state engine, the states are abitrary, so you can shuffle S0..S3 to amy mapping, if POR gives 'b'00 and you want S3 @ POR, then define S3 as 'b'00. If you also want it to stall later at S3, then you need to add an alias state, ( brings this to 5, one of which is an entry state ), which will cost one more bit. -jgArticle: 106742
Peter Alfke wrote: > How do your two clock domains, 35 MHz and 50 MHz communicate with each > other? > I hope you are aware of their asynchronous relationship, and the many > problems that poses... > Peter Alfke, Xilinx Peter, thanks a lot for the hint... Modifying some interrelations between the two clock domains and using DCM now I obtain: Timing Summary: --------------- Speed Grade: -4 Minimum period: 18.284ns (Maximum Frequency: 54.694MHz) Minimum input arrival time before clock: 14.734ns Maximum output required time after clock: 12.789ns Maximum combinational path delay: No path found I'm not sure the changes I done are "semantically" wath I want but now I "know" that I can (?must?) improve something in the design. Regards SandroArticle: 106743
>> Here are some performance numbers of this JOP/SRAM >> interface on an embedded benchmark. It measures iterations/s >> and therefore higher numbers are better. All versions are clocked >> at 100 MHz, 4 KB instruction cache and 512 Byte stack cache. >> FPGA is Cyclone EP1C6-6, Memory is 32-bit SRAM 15ns. The only >> difference is the memory interface. >> >> SimpCon: 16,633 >> Avalon (PTF version): 14,015 >> Avalon (VHDL version): 13,920 >> > some additional numbers from the Altera DE2 board with > Cyclone II at 100 MHz with SDRAM and using on-chip > memory (the EP2C35 is big enough to run the benchmark > in on-chip memory). > > Avalon SDRAM: 7,288 > Avalon on-chip memory: 15,769 > and some more: JOP at 100MHz on the Altera DE2 using the 16-bit SRAM: Avalon: 11,322 SimpCon: 14,760 So for the SRAM interface SimpCon is a clear winner ;-) The 16-bit SRAM SimpCon solution is even faster than the 32-bit SRAM Avalon solution. BTW: the embedded benchmark is a control application which is does not need a high memory bandwith. For a different benchmark (a UDP/IP application with IP processing - lot of buffer access) the difference is larger. With the 16-bit SRAM: Avalon: 4,302 Simpcon: 5,716 again - higher number is better MartinArticle: 106744
Frank Buss wrote: > Symon wrote: > > >>Did you see the bit on the Google search result page where it says >>'translate this page'? Press that, and then you get stuff you can read, but >>not understand. Along the lines of 'My hovercraft is full of eels. For great >>justice.'. > > > The KPU description was understandable for me: > > http://tinyurl.com/lzauk > > And the 1 bit processor looks interesting and it comes with full Verilog > source code (commented in english). But why Antti called it 1 bit? It uses > 8 bit registers and a 10 bit program counter. Not quite. Looks an interesting tiny core, similar to the old MC14500. That also is one bit data, and nibble sized opcodes, gives just 16 opcodes. If I've followed the janglish, the W register is Serial IO collection and the operands work on IN and OUTx ( the D+/D- lines ), so it is manipulating one-bit PIN data serially. Some questions for Antti, who may have made more sense of this I think this manipulates the Kbd USB lines directly, but not in USB mode, but in the psuedo PS/2 mode, that most USB KBDs seem to contain ? How large is the CODE image to make the tiny core do this ? -jgArticle: 106745
Jim Granville schrieb: > Frank Buss wrote: > > Symon wrote: > > > > > >>Did you see the bit on the Google search result page where it says > >>'translate this page'? Press that, and then you get stuff you can read, but > >>not understand. Along the lines of 'My hovercraft is full of eels. For great > >>justice.'. > > > > > > The KPU description was understandable for me: > > > > http://tinyurl.com/lzauk > > > > And the 1 bit processor looks interesting and it comes with full Verilog > > source code (commented in english). But why Antti called it 1 bit? It uses > > 8 bit registers and a 10 bit program counter. > > Not quite. > Looks an interesting tiny core, similar to the old MC14500. > That also is one bit data, and nibble sized opcodes, gives > just 16 opcodes. > > > If I've followed the janglish, the W register is Serial IO collection > and the operands work on IN and OUTx ( the D+/D- lines > ), so it is manipulating one-bit PIN data serially. > > Some questions for Antti, who may have made more sense of this > > I think this manipulates the Kbd USB lines directly, but not in USB > mode, but in the psuedo PS/2 mode, that most USB KBDs seem to contain ? > > How large is the CODE image to make the tiny core do this ? > > -jg no, the USB keyboard is in USB mode! just look at the ukp.s that is the source code, you see the USB enumeration commands being present! AnttiArticle: 106746
Hi fpganovice, Forget about MicroBlaze, you will never get the desired speed. Image processing should be done in logic ONLY. Try to figure out how you can serialize your processing algorithm to work pixel-to-pixel. This way you probably won't even need a DDR. There is also a Xilinx thing called Multi Port Memory Controller 2 which has a fast interface to DDR, PowePC and GigaLAN. PLB_LCD (native LCD) controller is also included in the project cores. The only drawback is that it consumes a lot of logic, which you can use for image processing. Cheers, Guru fpganovice wrote: > Hi all, > > I'm working on an FPGA implementation of an image processing algorithm. > I'll be using the ML401 to do the job which has DDR memory and a VGA > port to output the image directly on screen. Should I go with a > microblaze solution? EDK comes with DDR and VGA controllers for this > board, however I'm not at all familiar with it regarding the buses and > stuff. If I use ISE only, I'll probably use MIG 1.5 to generate the > memory controller and I've also found a VGA/LCD display module on > opencores.org. So both solutions seem viable to me (or do they not?), > which path should I choose? Please comment. Thanks!Article: 106747
Evan Lavelle wrote: > Does anyone know of any open-source software which will program an > XCF04S (Xilinx serial PROM) on JTAG? It also needs to issue a CONFIG > command to start configuration. xc3sprog can program a Spartan 3 and a XCFxxS http://sourceforge.net/projects/xc3sprog I am looking at porting the programming algorithm to OpenOCD but I haven't actually started yet.. JDrive is a nice idea but the code is not portable and full of some pretty dubious constructs (try compiling it under gcc with -Wall). I believe you can get the programming algorithm from the appropriate .bsd file, and/or the datasheet. -- Daniel O'Connor software and network engineer for Genesis Software - http://www.gsoft.com.au "The nice thing about standards is that there are so many of them to choose from." -- Andrew Tanenbaum GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8CArticle: 106748
Oh yes, I forgot one more thing: FPGA->VGA OPB bus driver was included in the Spartan3 starter kit Xpong project - opb_color_video_ctrl_v1_00_a. Cheers, Guru fpganovice wrote: > Hi all, > > I'm working on an FPGA implementation of an image processing algorithm. > I'll be using the ML401 to do the job which has DDR memory and a VGA > port to output the image directly on screen. Should I go with a > microblaze solution? EDK comes with DDR and VGA controllers for this > board, however I'm not at all familiar with it regarding the buses and > stuff. If I use ISE only, I'll probably use MIG 1.5 to generate the > memory controller and I've also found a VGA/LCD display module on > opencores.org. So both solutions seem viable to me (or do they not?), > which path should I choose? Please comment. Thanks!Article: 106749
Daniel O'Connor schrieb: > Evan Lavelle wrote: > > > Does anyone know of any open-source software which will program an > > XCF04S (Xilinx serial PROM) on JTAG? It also needs to issue a CONFIG > > command to start configuration. > > xc3sprog can program a Spartan 3 and a XCFxxS > http://sourceforge.net/projects/xc3sprog > > I am looking at porting the programming algorithm to OpenOCD but I haven't > actually started yet.. > > JDrive is a nice idea but the code is not portable and full of some pretty > dubious constructs (try compiling it under gcc with -Wall). > > I believe you can get the programming algorithm from the appropriate .bsd > file, and/or the datasheet. yes the algo can be 'reversed' from BSDL and SVF files, but the XCF datasheet does not include and programming info Antti
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