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Messages from 132550

Article: 132550
Subject: Re: (won't even attempt to try again .. .. ..)
From: Ray Andraka <ray@andraka.com>
Date: Fri, 30 May 2008 20:12:48 -0400
Links: << >>  << T >>  << A >>
MikeWhy wrote:
> "Ray Andraka" <ray@andraka.com> wrote in message 
> news:3RG%j.77$pa2.9@newsfe21.lga...
> 
>> MikeWhy wrote:
>>
>>> "austin" <austin@xilinx.com> wrote in message 
>>> news:futloc$6jf3@cnn.xsj.xilinx.com...
>>>
>>>> Keyboard?  Computer?  Morse?
>>>>
>>>> Yup, hams have made it to the 21st century.  Most hams use an ascii
>>>> keyboard to Morse code generator, so I can type as I am typing now, and
>>>> send the code (without mistakes).
>>>
>>>
>>>
>>> ....
>>>
>>> And to bring it back on topic, FPGA use in ham specific software 
>>> defined radio (SDR) is gaining ground and momentum. There's already 
>>> evidence of that here on this group.
>>>
>>> Mike.
>>> N9XI
>>>
>>
>> Well, does this http://www.andraka.com/shortwave.htm demo project 
>> count? I did it as a demo back in early 2003.  It worked surprisingly 
>> well considering there is no analog front end.
> 
> 
> Whoa. What's really impressive is there looks to be room left on that 
> -100 device for a HT and PSK decoder. Or is that block RAM showing in 
> the FloorPlanner?
> 
> 

Thanks. There are 6 of the Block Rams unused, and a few slices scattered 
around.   With some thought and a little more optimization work I'm 
pretty sure I could get a PSK decoder in there.  If I take out the 
programmable filters, I could do FM demodulation too (which doesn't need 
the programmable filters).  It was a fun project.  We had a good time 
with it at FCCM that year too, tuning broadcasts from Asia with a 
long-wire antenna strung out over the courtyard.

Article: 132551
Subject: Re: (won't even attempt to try again .. .. ..)
From: Ray Andraka <ray@andraka.com>
Date: Fri, 30 May 2008 20:22:33 -0400
Links: << >>  << T >>  << A >>
Brian Davis wrote:

> Ray wrote:
> 
>>Well, does this http://www.andraka.com/shortwave.htmdemo project count?
>>  I did it as a demo back in early 2003.  It worked surprisingly well
>>considering there is no analog front end.
>>
> 
> 
>  FYI, TI now makes a nifty eval board for their ADS554x family
> that includes a 3S250E on board, about $300 USD, that makes for
> a great low budget 'SDR' platform:
> 
> http://focus.ti.com/docs/toolsw/folders/print/ads5547evm.html
> 
> 14-bit, 210 MSPS ADC
> XC3S250E with config flash
> expansion connectors for spare FPGA I/O
> 
> Brian


Cool!  That would have been nice to have back then.  I spent about $400 
between the burr brown eval and insight spartanII boards. Having the 
whole thing on one board would have been nice.

I did that design in about 3 weeks right before FCCM so that I'd have it 
for the demo night.  Had I had more time, I was planning to optimize the 
design some more so that I could get a frequency display on the LCD on 
the board and some sort of interface (I was thinking a computer mouse) 
to tune it so that I could do without the laptop.  I never got that far 
though.


Article: 132552
Subject: Re: Xilinx Clock Doubler
From: "Symon" <symon_brewer@hotmail.com>
Date: Sat, 31 May 2008 01:45:54 +0100
Links: << >>  << T >>  << A >>

"mk" <kal*@dspia.*comdelete> wrote in message 
news:ppp044h31mfnk52ge8dopsj135jh21od2r@4ax.com...
> On Fri, 30 May 2008 01:31:51 +0100, "Symon" <symon_brewer@hotmail.com>
> wrote:
>
>>"Grant Stockly" <grant@stockly.com> wrote in message
>>> http://www.pldworld.com/_xilinx/html/tip/sixeasypieces.htm
>>>
>>No pictures for me. :-(
>>
>
> This seems to be problem with firefox. Internet explorer manages to
> view site correctly with the embedded images.

OK, got it! thanks guys. 



Article: 132553
Subject: Re: Can I make ISE 9.2 ngdbuild stop generating new PERIOD specs on PLL outputs?
From: "jtw" <wrightjt @hotmail.invalid>
Date: Fri, 30 May 2008 22:36:09 -0700
Links: << >>  << T >>  << A >>
Are they really totally asynchronous (for treatment)?  I have found that 
sometimes I care, but just not to the extent that the tools would 
automatically force it.  So, instead of a TIG, I might create a multi-cycle 
constraint.  This relieves the pressure on the routing tool, but may still 
keep the tool from doing really stupid things, such as placing the interface 
logic parts far apart on the die.

JTW

"Barry" <barry374@gmail.com> wrote in message 
news:36949c5d-23f2-400e-bc96-eaec566585e9@j22g2000hsf.googlegroups.com...
On May 30, 11:37 am, Kevin Neilson
<kevin_neil...@removethiscomcast.net> wrote:

>
> NET "*fifo/wclk" TNM="write_stuff";
> NET "*fifo/rclk" TNM="read_stuff";
> TIMESPEC "TS_false_path7"=FROM "write_stuff" TO "read_stuff" TIG;
> TIMESPEC "TS_false_path8"=FROM "read_stuff" TO "write_stuff" TIG;
>
> -Kevin

Thanks, Kevin.  After some research, I came up with something
similar.  It appears to work, and relieves me of having to keep track
of every asynchronous register.
Barry

NET "pci_clk"    TNM = FFS pci_clk_grp;
NET "ddr2_clk0"  TNM = FFS ddr2_clk0_grp;
NET "ilb_clk"    TNM = FFS ilb_clk_grp;
TIMESPEC TS_false_path1 = FROM pci_clk_grp    TO  ddr2_clk0_grp  TIG;
TIMESPEC TS_false_path2 = FROM pci_clk_grp    TO  ilb_clk_grp    TIG;
TIMESPEC TS_false_path3 = FROM ddr2_clk0_grp  TO  pci_clk_grp    TIG;
TIMESPEC TS_false_path4 = FROM ddr2_clk0_grp  TO  ilb_clk_grp    TIG;
TIMESPEC TS_false_path5 = FROM ilb_clk_grp    TO  pci_clk_grp    TIG;
TIMESPEC TS_false_path6 = FROM ilb_clk_grp    TO  ddr2_clk0_grp  TIG;






Article: 132554
Subject: cutoff frequency
From: fazulu deen <fazulu.vlsi@gmail.com>
Date: Sat, 31 May 2008 00:57:36 -0700 (PDT)
Links: << >>  << T >>  << A >>
Hai,

What is the cutoff frequency range setted for communication and
multimedia application??And which is the optimal FIR filter design
method suited for that??

regards,
faz

Article: 132555
Subject: Re: New Xilinx device package options for S3E & S3A
From: Antti <Antti.Lukats@googlemail.com>
Date: Sat, 31 May 2008 01:38:44 -0700 (PDT)
Links: << >>  << T >>  << A >>
On May 25, 8:59 pm, rickman <gnu...@gmail.com> wrote:
> This almost ticks me off!  I have been bugging Xilinx for years to
> support lower pin count packages on larger parts and I have always
> gotten that argument that they just can't sell enough to justify it,
> especially in the Spartan line.  I guess there are some larger fish
> asking for that now.  I wonder if they will go to the 100 pin package
> with the 3AN parts?
>
> Rick
:(

i heard the s3a vq100 option, and assumed the same goes for s3an
too bad it is not so

but even so the new package options are nice !

Antti



Article: 132556
Subject: Re: cutoff frequency
From: "Icky Thwacket" <it@it.it>
Date: Sat, 31 May 2008 09:48:17 +0100
Links: << >>  << T >>  << A >>

"fazulu deen" <fazulu.vlsi@gmail.com> wrote in message 
news:04f3b99d-e815-4d7e-b9ea-9cc1a2fc6795@l28g2000prd.googlegroups.com...
> Hai,
>
> What is the cutoff frequency range setted for communication and
> multimedia application??

Between 0.00001 Hz or less and 100GHz or greater depending on the 
application

>And which is the optimal FIR filter design
> method suited for that??
>

Variable ratio multitap with adaptive confocal formalized feedback 



Article: 132557
Subject: Re: cutoff frequency
From: Jonathan Bromley <jonathan.bromley@MYCOMPANY.com>
Date: Sat, 31 May 2008 11:05:20 +0100
Links: << >>  << T >>  << A >>
On Sat, 31 May 2008 09:48:17 +0100, "Icky Thwacket" wrote:

>>And which is the optimal FIR filter design
>> method suited for that??
>
>Variable ratio multitap with adaptive confocal formalized feedback 

Really?  In fairness to the OP we ought to mention the
possibility of polyglobular phase-incontrovertible 
Tchebyshev locus diagrams.  I find them invaluable for
completing my sub-fusc harmonic variance charts for
phase-denibulized channels.
-- 
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which 
are not the views of Doulos Ltd., unless specifically stated.

Article: 132558
Subject: Re: cutoff frequency
From: fazulu deen <fazulu.vlsi@gmail.com>
Date: Sat, 31 May 2008 03:24:26 -0700 (PDT)
Links: << >>  << T >>  << A >>
Hai,


Between 0.00001 Hz or less and 100GHz or greater depending on the
application

Can i say the cutoff frequency range can fall anywhere inbetween
0.0001hz to 100Ghz for communication and multimedia application..??

Variable ratio multitap with adaptive confocal formalized feedback

can u suggest among the following which is the optimal filter design
method for the above applications..
1.equiripple
2.window
3.constant least squares
4.complex equiripple
5.interpolated FIR

regards,
faz





On May 31, 3:05=A0pm, Jonathan Bromley <jonathan.brom...@MYCOMPANY.com>
wrote:
> On Sat, 31 May 2008 09:48:17 +0100, "Icky Thwacket" wrote:
> >>And which is the optimal FIR filter design
> >> method suited for that??
>
> >Variable ratio multitap with adaptive confocal formalized feedback
>
> Really? =A0In fairness to the OP we ought to mention the
> possibility of polyglobular phase-incontrovertible
> Tchebyshev locus diagrams. =A0I find them invaluable for
> completing my sub-fusc harmonic variance charts for
> phase-denibulized channels.
> --
> Jonathan Bromley, Consultant
>
> DOULOS - Developing Design Know-how
> VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services
>
> Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
> jonathan.brom...@MYCOMPANY.comhttp://www.MYCOMPANY.com
>
> The contents of this message may contain personal views which
> are not the views of Doulos Ltd., unless specifically stated.


Article: 132559
Subject: Re: cutoff frequency
From: "Icky Thwacket" <it@it.it>
Date: Sat, 31 May 2008 13:14:16 +0100
Links: << >>  << T >>  << A >>

"fazulu deen" <fazulu.vlsi@gmail.com> wrote in message 
news:8a769af7-bae0-4b22-b2fa-5eab42bc1a26@w34g2000prm.googlegroups.com...
Hai,


>Between 0.00001 Hz or less and 100GHz or greater depending on the
>application

>Can i say the cutoff frequency range can fall anywhere inbetween
>0.0001hz to 100Ghz for communication and multimedia application..??

Yes probably

>Variable ratio multitap with adaptive confocal formalized feedback

>can u suggest among the following which is the optimal filter design
>method for the above applications..
>1.equiripple
>2.window
>3.constant least squares
>4.complex equiripple
>5.interpolated FIR

Over the frequency range in question, probably a generalized mix of all of 
them.







Article: 132560
Subject: Re: cutoff frequency
From: "Icky Thwacket" <it@it.it>
Date: Sat, 31 May 2008 13:20:53 +0100
Links: << >>  << T >>  << A >>

"Jonathan Bromley" <jonathan.bromley@MYCOMPANY.com> wrote in message 
news:ra8244hivnivfr1cas3spthtolgnts05v2@4ax.com...
> On Sat, 31 May 2008 09:48:17 +0100, "Icky Thwacket" wrote:
>
>>>And which is the optimal FIR filter design
>>> method suited for that??
>>
>>Variable ratio multitap with adaptive confocal formalized feedback
>
> Really?  In fairness to the OP we ought to mention the
> possibility of polyglobular phase-incontrovertible
> Tchebyshev locus diagrams.  I find them invaluable for
> completing my sub-fusc harmonic variance charts for
> phase-denibulized channels.
> -- 

Yes you are right - forgot about that one - thanks for reminding me.  --  
although I don't think they are quite as accurate in the sub Hz range due to 
non convergence of the cyclohelical semidisquashed hydronoid reciprocity 
function. 



Article: 132561
Subject: Re: cutoff frequency
From: Frank Buss <fb@frank-buss.de>
Date: Sat, 31 May 2008 15:04:25 +0200
Links: << >>  << T >>  << A >>
Icky Thwacket wrote:

>>Can i say the cutoff frequency range can fall anywhere inbetween
>>0.0001hz to 100Ghz for communication and multimedia application..??
> 
> Yes probably

But a 100GHz cutoff frequency is required only to avoid quantum matter
aliasing with high resolution graviton lenses and holoemitters.

-- 
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

Article: 132562
Subject: Re: cutoff frequency
From: fazulu deen <fazulu.vlsi@gmail.com>
Date: Sat, 31 May 2008 07:02:19 -0700 (PDT)
Links: << >>  << T >>  << A >>
Hai,

Can i say the cutoff frequency range can fall anywhere inbetween
0.0001hz to 100Ghz for communication and multimedia application..??
 Yes probably

Do u mean to say that for communication and multimedia application i
can design a FIR low pass or High pass or band pass or band reject
filter with cutoff frequency fall anywhere inbetween 0.0001hz to
100Ghz?which means can i select cutoff frequencies of FIR LP.HP,BP,BR
filters in this range??

regards,
faz


On May 31, 6:04=A0pm, Frank Buss <f...@frank-buss.de> wrote:
> Icky Thwacket wrote:
> >>Can i say the cutoff frequency range can fall anywhere inbetween
> >>0.0001hz to 100Ghz for communication and multimedia application..??
>
> > Yes probably
>
> But a 100GHz cutoff frequency is required only to avoid quantum matter
> aliasing with high resolution graviton lenses and holoemitters.
>
> --
> Frank Buss, f...@frank-buss.dehttp://www.frank-buss.de,http://www.it4-syst=
ems.de


Article: 132563
Subject: Re: cutoff frequency
From: Frank Buss <fb@frank-buss.de>
Date: Sat, 31 May 2008 16:16:09 +0200
Links: << >>  << T >>  << A >>
fazulu deen wrote:

> Do u mean to say that for communication and multimedia application i
> can design a FIR low pass or High pass or band pass or band reject
> filter with cutoff frequency fall anywhere inbetween 0.0001hz to
> 100Ghz?which means can i select cutoff frequencies of FIR LP.HP,BP,BR
> filters in this range??

As Icky Thwacket wrote, probably yes.

Ok, at the risk of spoil the party: Of course, before writing this as an
answer for your homework exercise, you should think a bit (or trying Google
and Wikipedia) about the frequencies of audio and video, the usage for
filters and what are the reproducer limits, like speakers.

-- 
Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de

Article: 132564
Subject: xilinx and jtag
From: <discussions@fpga.usenet>
Date: Sat, 31 May 2008 15:16:30 +0100
Links: << >>  << T >>  << A >>
I have a jtag programmer with a 20pin idc connector.
Are these in general suitable for cplds/fpgas?

Also, I have the following test program. The program
is supposed to switch on  a led when the input is hi.
Is this program ok?

module modled(a1, b1);
input wire a1;
output wire b1;

assign b1=a1;

endmodule



Article: 132565
Subject: Re: cutoff frequency
From: "KJ" <kkjennings@sbcglobal.net>
Date: Sat, 31 May 2008 11:33:16 -0400
Links: << >>  << T >>  << A >>

"fazulu deen" <fazulu.vlsi@gmail.com> wrote in message 
news:795cb9ce-b5b6-4659-9c8e-dc4cb1b27b1b@v26g2000prm.googlegroups.com...
Hai,

> Do u mean to say that for communication and multimedia application i
> can design a FIR low pass or High pass or band pass or band reject
> filter with cutoff frequency fall anywhere inbetween 0.0001hz to
> 100Ghz?

I highly doubt it.

KJ 



Article: 132566
Subject: Re: Can I make ISE 9.2 ngdbuild stop generating new PERIOD specs on
From: Barry <barry374@gmail.com>
Date: Sat, 31 May 2008 09:24:47 -0700 (PDT)
Links: << >>  << T >>  << A >>
On May 30, 10:36 pm, "jtw" <wrightjt @hotmail.invalid> wrote:
> Are they really totally asynchronous (for treatment)?  I have found that
> sometimes I care, but just not to the extent that the tools would
> automatically force it.  So, instead of a TIG, I might create a multi-cycle
> constraint.  This relieves the pressure on the routing tool, but may still
> keep the tool from doing really stupid things, such as placing the interface
> logic parts far apart on the die.
>
> JTW

Thanks, that is probably a good idea.
Barry

Article: 132567
Subject: Re: cutoff frequency
From: Mike Treseler <mtreseler@gmail.com>
Date: Sat, 31 May 2008 09:25:26 -0700
Links: << >>  << T >>  << A >>
fazulu deen wrote:

> What is the cutoff frequency range setted for communication and
> multimedia application??And which is the optimal FIR filter design
> method suited for that??

Fazulu, I would drop that class
and find something more focused.

  -- Mike Treseler

Article: 132568
Subject: Re: cutoff frequency
From: John_H <newsgroup@johnhandwork.com>
Date: Sat, 31 May 2008 09:45:00 -0700
Links: << >>  << T >>  << A >>
fazulu deen wrote:
> Hai,
> 
> What is the cutoff frequency range setted for communication and
> multimedia application??And which is the optimal FIR filter design
> method suited for that??
> 
> regards,
> faz

An equivalent question might be:

"How much flour should I use for baking?"

"And what kind of flour is the best to use?"

Do you have ANY clue what you want to bake?

Article: 132569
Subject: Re: cutoff frequency
From: "MikeWhy" <boat042-nospam@yahoo.com>
Date: Sat, 31 May 2008 12:20:35 -0500
Links: << >>  << T >>  << A >>

"fazulu deen" <fazulu.vlsi@gmail.com> wrote in message 
news:8a769af7-bae0-4b22-b2fa-5eab42bc1a26@w34g2000prm.googlegroups.com...
Hai,


Between 0.00001 Hz or less and 100GHz or greater depending on the
application

Can i say the cutoff frequency range can fall anywhere inbetween
0.0001hz to 100Ghz for communication and multimedia application..??

Variable ratio multitap with adaptive confocal formalized feedback

can u suggest among the following which is the optimal filter design
method for the above applications..
1.equiripple
2.window
3.constant least squares
4.complex equiripple
5.interpolated FIR
===============

To quote someone else: search the web. You'll find more words written on 
that topic than you're likely to read in a lifetime. One site has for free 
download the entire contents of a current, published, highly regarded 
textbook.



Article: 132570
Subject: Re: Need comparison table about Xilinx ISE WebPack 10.1i vs ISE Foundation 10.1i
From: "Roger" <rogerwilson@hotmail.com>
Date: Sat, 31 May 2008 18:39:20 +0100
Links: << >>  << T >>  << A >>
WebPack doesn't run on a 64 bit Windows machine either if that's important 
(just in case you had Vista 64).

Rog.

"John Adair" <g1@enterpoint.co.uk> wrote in message 
news:f8f95154-fc07-4f33-b0ba-ce698adb6e7e@k13g2000hse.googlegroups.com...
> Main difference is devices supported. Details of wahat Webpack
> supports http://www.xilinx.com/ise/products/webpack_config.htm.
>
> John Adair
> Enterpoint Ltd.
>
> On May 28, 2:09 am, Eka <aan.wo...@gmail.com> wrote:
>> Does anyone have comparison table about Xilinx ISE WebPack 10.1i vs
>> ISE Foundation 10.1i ? Because I was confused by their license and
>> available features. Thank you.
> 

Article: 132571
Subject: Re: error when 'generating simulation hdl files' in xilinx xps
From: "fatfpga@googlemail.com" <fatfpga@googlemail.com>
Date: Sat, 31 May 2008 11:59:10 -0700 (PDT)
Links: << >>  << T >>  << A >>
On 29 Mai, 13:48, Brian Drummond <brian_drumm...@btconnect.com> wrote:
> On Wed, 28 May 2008 04:44:40 -0700 (PDT), "fatf...@googlemail.com"
>
> <fatf...@googlemail.com> wrote:
> >hi,
>
> >does anyone know how to solve this error when selecting 'generate
> >simulation hdl files' in xps (xilinx edk 9.1):
> >Running Data2Mem with the following command:
>
> data2mem -bm system_sim.bmm  -bd
> /pl/hardware/user-platforms/MySystemV5/fs-boot/executable.elf tag
> microblaze_0 -u  -o u tmpucf.ucf
>
> >ERROR:MDT - Ucf2Vhdl Conversion Generated Errors.
>
> What does this command do on its own? (from a shell)
> Find out why that isn't working, fix it and try again.
>
> - Brian

when paste it into a terminal and run it on its own, there is no
output so i think i does it's job correctly.
but out of the xps-tool it doesn't work...

Article: 132572
Subject: Re: cutoff frequency
From: fazulu deen <fazulu.vlsi@gmail.com>
Date: Sun, 1 Jun 2008 04:32:59 -0700 (PDT)
Links: << >>  << T >>  << A >>
Hai,

Basically i am little bit confused with FIR filter cutoff frequency
and sampling frequency relation....Both the terms are very much
familier to me separately but i dont know how to relate each other??

Few standard sampling frequencies for audio applications are
8,44.1,48,96,192Khz...For this sampling frequencies wat should be the
minimum cutoff frequency for LP,HP,BP,BR FIR filter....

example fs=3D8khz...fc=3D???

regards,
faz


On May 31, 10:20=A0pm, "MikeWhy" <boat042-nos...@yahoo.com> wrote:
> "fazulu deen" <fazulu.v...@gmail.com> wrote in message
>
> news:8a769af7-bae0-4b22-b2fa-5eab42bc1a26@w34g2000prm.googlegroups.com...
> Hai,
>
> Between 0.00001 Hz or less and 100GHz or greater depending on the
> application
>
> Can i say the cutoff frequency range can fall anywhere inbetween
> 0.0001hz to 100Ghz for communication and multimedia application..??
>
> Variable ratio multitap with adaptive confocal formalized feedback
>
> can u suggest among the following which is the optimal filter design
> method for the above applications..
> 1.equiripple
> 2.window
> 3.constant least squares
> 4.complex equiripple
> 5.interpolated FIR
> =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
>
> To quote someone else: search the web. You'll find more words written on
> that topic than you're likely to read in a lifetime. One site has for free=

> download the entire contents of a current, published, highly regarded
> textbook.


Article: 132573
Subject: Re: HWICAP initialization
From: Atukem <atukem@googlemail.com>
Date: Sun, 1 Jun 2008 04:59:58 -0700 (PDT)
Links: << >>  << T >>  << A >>
On May 27, 1:55=A0pm, fmostafa <fatma.abouele...@ugent.be> wrote:
> hi all,
>
> I am trying to use HWICAP to configure =A0certain LUTs , I guess that
> starting with the examples from XILINX will be a good start, the
> problem that after many trials and of course nothing working, I
> noticed that the DONE bit which in =A0the status reg in the HWICAP is
> low all the time so nothing is working, but before calling =A0the
> function XHwIcap_Initialize the Done bit is high , I don't know if
> what I noticed is really a problem as I guess or not, I am using EDK
> 9.1 and XUP board for XC2VP30 under Linux, I don't may be the problem
> in Linux or some thing else.
>
> thanks
>
> fatma

Could you give a little bit more detail about you system, when it
stops working, does it actually complete the initialisation process, I
guess you might be using microblaze ....

Article: 132574
Subject: Re: cutoff frequency
From: "MikeWhy" <boat042-nospam@yahoo.com>
Date: Sun, 1 Jun 2008 13:27:30 -0500
Links: << >>  << T >>  << A >>
"fazulu deen" <fazulu.vlsi@gmail.com> wrote in message 
news:f44fdc44-a4ea-474a-9ff6-c6b48d797993@q27g2000prf.googlegroups.com...
Hai,

Basically i am little bit confused with FIR filter cutoff frequency
and sampling frequency relation....Both the terms are very much
familier to me separately but i dont know how to relate each other??

Few standard sampling frequencies for audio applications are
8,44.1,48,96,192Khz...For this sampling frequencies wat should be the
minimum cutoff frequency for LP,HP,BP,BR FIR filter....

example fs=8khz...fc=???

=========
It depends. Do you want a lot of FIR? Or just a little? Do you want it to 
tap a lot? Or just a little? To get you started, try Fc = 3 kHz. Try 
selecting minimum order, -124 dB at 4 kHz stop band. That will sharply 
de-fir 24 bit audio. Work with the chart to see how much FIR is sneaking 
through. Play with it a few days. Implement the filters, and listen to the 
effect. Adjust it from there to your liking. I'm sure it will all make sense 
very soon. If it taps more than you like, try a windowing function in the 
frequency domain instead.

In general, read the help files. Also, search the web for filter design. 
Wikipedia has good, broad coverage on many topics. You might find it a 
suitable starting point.





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