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Hi, Is anyone writing any cryptographic algorithms or block ciphers on an FPGA. I'm interested as to what sort of throughput to aim for on my Xilinx Virtex1000 -4. thanks AndrewArticle: 26876
hello: when i am doing timing simulator(using the reference design xapp205.zip :fifoctlr_ccmw1.v/fifoctlr_ccmw2.v) for a project,the follwoing message occures: "P1/U1/U11/BU0/INTERNAL_BLOCKRAM--READ Violation.Attempt to read from cell that is also being written to." the capacity of the dual block ram i mentioned is 16x1024--64x256,that is,when read_enable is active,write_enable must inactive.But when i replace it with 16x2048---64x512,it is right,and the phenomena of the warning is not . why?Article: 26877
Atlas wrote: And I snipped it. Why don't you pay a few dollars and post it on www.monster.com? Oh, Peter, good call on the grammer hack job. With that said I hope my grammer is accetable (:>) regards JerryArticle: 26878
Hello, The XCV300 needs 2.5V and 3.3V. The supply on the PCB is 5V. Will a voltage regulator do the job or do I need a DC/DC convertor? I have never designed with a DC/DC. Which should I use (if this is the way to go) ? DanArticle: 26879
Hi You can use a LM317 voltage rerulator (1.5A). The LM317 have a output voltage range from 1.2V to 37V (1% voltage tolerance).. Gunnar Dan wrote: > Hello, > > The XCV300 needs 2.5V and 3.3V. > > The supply on the PCB is 5V. > > Will a voltage regulator do the job or do I need a DC/DC convertor? > > I have never designed with a DC/DC. Which should I use (if this is the way > to go) ? > > DanArticle: 26880
Is there any GNU or like open source system for conversion of C to VHDL? Or for that matter any other higher level language. I'm a programmer interested in learning a bit about FPGAs and was thinking this might be a good way to get my feet wet. I don't need, nor could I afford a commercial product, unless its real affordable. As a starter project I am interested in creating a simple graphic LCD controller for quarter VGA devices. Nothing fancy, just handle screen refresh from a SRAM, simple dot, line drawing, and bit blit algorithms to SRAM, and a microcontroller interface. Initially monochrome, but room to grow to color. Likely I'll be using a "student" version for the FPGA tools. I have not as yet chosen a chip vendor of choice. Any constructive suggestions (I already know I'm a snot nosed programmer walking among the hardware gods) to either the converter, project, or appropriate chips are welcome. -- Peter Dennett Email: pdennett@padsoft.com 61 Harbor Lane Web: www.padsoft.com Kemah, TX 77565 Web: www.boatbrains.com Voice: 281 334 3800 Cell: 713 899 6100 Fax: 281 521 1032Article: 26881
A few months ago Xilinx had a survey up on their website for their software users, and they said that if you filled it out, you would get a free t-shirt. I filled out that survey but never got the shirt. Did anybody else? I enjoy using Xilinx's products and would love to get a t-shirt.Article: 26882
"James S." wrote: > > A few months ago Xilinx had a survey up on their website for their software > users, and they said that if you filled it out, you would get a free > t-shirt. I filled out that survey but never got the shirt. Did anybody > else? I enjoy using Xilinx's products and would love to get a t-shirt. I didn't get one, and we actually pay for the software. IDT never sent me the coffee mug (or was that a t-shirt?) they promised to send if I filled out a form. Hey, Xilinx, why don'tcha look at your registered paid-in-full users list and send us all a nice early Hanukkah present? I wear large t-shirts, drink black coffee and stout (tho' not at the same time) and have no use for planners, note-pads or posters. ModelTech should do the same. Address is below. Keep the CD-ROMs, I have enough. For the amount of money these vendors charge, swag oughta be included. That will save me the hassle of going to trade shows. I did, however, get a very nice Analog Devices ball-cap at the AES show. The Shure cap is nice, too. The best bit of swag was a Fairchild 660 limiter refrigerator magnet from the Bomb Factory, who do ProTools plug-ins. -- a ---------------------------- Andy Peters Sr. Electrical Engineer National Optical Astronomy Observatory 950 N Cherry Ave Tucson, AZ 85719 apeters (at) n o a o [dot] e d u "It is better to be silent and thought a fool, than to send an e-mail to the entire company and remove all doubt."Article: 26883
In article <3a0192f8$0$32688$45beb828@newscene.com>, "James S." <ads@begone.com> writes: |> A few months ago Xilinx had a survey up on their website for their software |> users, and they said that if you filled it out, you would get a free |> t-shirt. I filled out that survey but never got the shirt. Did anybody |> else? I enjoy using Xilinx's products and would love to get a t-shirt. I received one... Regards, Rainer -- Rainer Buchty, LRR, Munich University of Technology, Germany Phone: +49 89 289-25770, Fax +49 89 289-28232, Room S3240Article: 26884
Hello,
You should be seeing a warning everytime you try to read from, and write to, the same memory location at the same time. If you are not seeing this warning , i would suggest contacting Xilinx technical support.
Regards,
Mujtaba
Xilinx Applications
chsw wrote:
> hello: when i am doing timing simulator(using the reference design xapp205.zip :fifoctlr_ccmw1.v/fifoctlr_ccmw2.v) for a project,the follwoing message occures: "P1/U1/U11/BU0/INTERNAL_BLOCKRAM--READ Violation.Attempt to read from cell that is also being written to." the capacity of the dual block ram i mentioned is 16x1024--64x256,that is,when read_enable is active,write_enable must inactive.But when i replace it with 16x2048---64x512,it is right,and the phenomena of the warning is not . why?
Article: 26885I want to generate a given frequency 40HZ to 5KHZ with counters and output this to a speaker mounted on a PCB. LowQuality is accepatble. Power enough to be heard by human from 10 feet. Please recommend a speaker and interface for FPGA. Thanks DanArticle: 26886
In article <3a016161@news2lo.highwayone.net>, ajd <dullrabbit@hotmail.com> wrote: >Hi, > >Is anyone writing any cryptographic algorithms or block ciphers on an FPGA. >I'm interested as to what sort of throughput to aim for on my Xilinx >Virtex1000 -4. Which mode of operation? Often, the mode of operation is the big limiter on throughput. IF you are careful about it, use counter mode as it parallelizes arbitrarily well. And which algorithm? IT varies alot. And there is a huge tradeoff space between area and performance which can be exploited. Are you doing subkey generation in hardware? How much of the virtex do you actually want to use? In terms of algorithms to implement, I'd look at Rijndael (the AES winner) and 3DES. Both are solid, high quality algorithms, which can be efficiently implemented. -- Nicholas C. Weaver nweaver@cs.berkeley.eduArticle: 26887
You're hooked matey, they don't need to butter you up. Me also. DaveArticle: 26888
Hi all I am trying to implement a 4x clock multiplier using two DLLs in a Spartan2. I need to clock a part of the chip 4x faster than the rest. My problem is that the placer complains because it cannot place the DLLs and the BUFGs on the same edge of the chip (I need 3 BUFGs). I tried to constrain the placement but it doesn't work. What's wrong with my constraints? INST dll LOC = DLL2; INST dll2 LOC = DLL0; -- Nicolas MATRINGE IPricot European Headquarters Conception electronique 16 rue du Moulin des Bruyeres Tel +33 1 46 67 51 11 F-92400 COURBEVOIE - FRANCE Fax +33 1 46 67 51 01 http://www.IPricot.com/Article: 26889
Nicolas Matringe wrote: > > Hi all > I am trying to implement a 4x clock multiplier using two DLLs in a > Spartan2. I need to clock a part of the chip 4x faster than the rest. > My problem is that the placer complains because it cannot place the DLLs > and the BUFGs on the same edge of the chip (I need 3 BUFGs). > I tried to constrain the placement but it doesn't work. What's wrong > with my constraints? > > INST dll LOC = DLL2; > INST dll2 LOC = DLL0; If you're using M2.1, there is a bug in the mapper regarding the DLL placement contraints, this problem is (accoridng the xilinx website) adressed in M3.1. otherwis a workaround is provided in "Xilinx answer #6624" at support.xilinx.com (use keyword +dll +virtex +map) Steven > > -- > Nicolas MATRINGE IPricot European Headquarters > Conception electronique 16 rue du Moulin des Bruyeres > Tel +33 1 46 67 51 11 F-92400 COURBEVOIE - FRANCE > Fax +33 1 46 67 51 01 http://www.IPricot.com/Article: 26890
In article <3a0192f8$0$32688$45beb828@newscene.com>, "James S." <ads@begone.com> wrote: (snip) > I filled out that survey but never got the shirt. (snip) That's what happens when you click on the "Spartan" check box... -- Greg Neff VP Engineering *Microsym* Computers Inc. greg@guesswhichwordgoeshere.com Sent via Deja.com http://www.deja.com/ Before you buy.Article: 26891
Steven Derrien a écrit : > > If you're using M2.1, there is a bug in the mapper regarding the DLL > placement contraints, this problem is (accoridng the xilinx website) > adressed in M3.1. > otherwis a workaround is provided in "Xilinx answer #6624" at > support.xilinx.com (use keyword +dll +virtex +map) Great! I'm precisely using M2.1i I'll try right away. Thanks a lot -- Nicolas MATRINGE IPricot European Headquarters Conception electronique 16 rue du Moulin des Bruyeres Tel +33 1 46 67 51 11 F-92400 COURBEVOIE - FRANCE Fax +33 1 46 67 51 01 http://www.IPricot.com/Article: 26892
Steven Derrien a écrit : > If you're using M2.1, there is a bug in the mapper regarding the DLL > placement contraints, this problem is (accoridng the xilinx website) > adressed in M3.1. > otherwis a workaround is provided in "Xilinx answer #6624" at > support.xilinx.com (use keyword +dll +virtex +map) That's not the right answer: my problems comes from the placer, not the mapper. I found the correct answer (searching +dll +virtex +par) there: Xilinx Answer #6984: 2.1i Virtex PAR - PAR is failing to allow 2 DLL design with 3 BUFGs to complete. -- Nicolas MATRINGE IPricot European Headquarters Conception electronique 16 rue du Moulin des Bruyeres Tel +33 1 46 67 51 11 F-92400 COURBEVOIE - FRANCE Fax +33 1 46 67 51 01 http://www.IPricot.com/Article: 26893
The output voltage ( 3.3 V?) may be rather low, so I would drive the speaker in push-pull from two outputs that are in counter-phase. Peter Alfke Dan wrote: > I want to generate a given frequency 40HZ to 5KHZ with counters and output > this to a speaker mounted on a PCB. > > LowQuality is accepatble. > Power enough to be heard by human from 10 feet. > > Please recommend a speaker and interface for FPGA. > > Thanks > DanArticle: 26894
Danger! Don't use an LM317, as it is not a low-dropout regulator. It will not work with a 5V input! I recommend the Linear Technology LT1117 for a good general-purpose 1 Amp or so 5V -> 3.3V or ->2.5V linear regulator. It will need a heat sink (at least some copper PC board real estate) if you need an amp or more of current. If you need less current than an amp, there are smaller parts from Linear Tech, Maxim, National, Micrel, etc. that will do the job. These companies also make DC-DC switching controllers, some with built-in switches and some without. They are generally very easy to use these days! In article <3A018114.5518EEAB@idi.ntnu.no>, Gunnar Tufte <gunnart@idi.ntnu.no> wrote: > Hi > > You can use a LM317 voltage rerulator (1.5A). The LM317 have a output > voltage > range from 1.2V to 37V (1% voltage tolerance).. > > Gunnar > > Dan wrote: > > > Hello, > > > > The XCV300 needs 2.5V and 3.3V. > > > > The supply on the PCB is 5V. > > > > Will a voltage regulator do the job or do I need a DC/DC convertor? > > > > I have never designed with a DC/DC. Which should I use (if this is the > > way > > to go) ? > > > > Dan > --David Forbes Tucson AZ Change spamnet to starnet before replying.Article: 26895
On 2 Nov 2000 10:17:10 -0600, "James S." <ads@begone.com> wrote: >A few months ago Xilinx had a survey up on their website for their software >users, and they said that if you filled it out, you would get a free >t-shirt. I filled out that survey but never got the shirt. Did anybody >else? I enjoy using Xilinx's products and would love to get a t-shirt. A few months ago, a US cable company broadcast a high-profile boxing match. During one of the breaks, they ran a commercial offering a free T-shirt for the viewers. However, the cable company deliberately rigged it so that the signal was scrambled during the ad, so even the pay-per-view subscribers couldn't see it. Why? Answer tomorrow if no-one gets it... EvanArticle: 26896
eml@riverside-machines.com.NOSPAM writes: > A few months ago, a US cable company broadcast a high-profile boxing > match. During one of the breaks, they ran a commercial offering a free > T-shirt for the viewers. However, the cable company deliberately > rigged it so that the signal was scrambled during the ad, so even the > pay-per-view subscribers couldn't see it. > > Why? Answer tomorrow if no-one gets it... Clever of them, but it doesn't explain why Xilinx didn't send the promised T-shirts.Article: 26897
Yeah, now I think I remember filling out that form. Never did get that T-shirt, and I use Lucents Orca devices. Did get a t-shirt from Chip Express after filling out a survey form. "James S." wrote: > A few months ago Xilinx had a survey up on their website for their software > users, and they said that if you filled it out, you would get a free > t-shirt. I filled out that survey but never got the shirt. Did anybody > else? I enjoy using Xilinx's products and would love to get a t-shirt.Article: 26898
This is a multi-part message in MIME format. --------------53A37488ED713025FC344172 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit Gentlemen, Due to some difficulties, the shirts were held up in manufacturing! We have them in stock now and we will start shipping. Best regards, Richard Chidester "James S." wrote: > A few months ago Xilinx had a survey up on their website for their software > users, and they said that if you filled it out, you would get a free > t-shirt. I filled out that survey but never got the shirt. Did anybody > else? I enjoy using Xilinx's products and would love to get a t-shirt. --------------53A37488ED713025FC344172 Content-Type: text/x-vcard; charset=us-ascii; name="richardc.vcf" Content-Transfer-Encoding: 7bit Content-Description: Card for Richard Chidester Content-Disposition: attachment; filename="richardc.vcf" begin:vcard n:Chidester;Richard tel;fax:303-442-9124 tel;work:303-544-5558 x-mozilla-html:TRUE org:CPLD Software Group;Xilinx, Inc. <br><img SRC="http://www.xilinx.com/sxpresso/images/webpack_ise_logo.jpg" height=70 width=104><font size=-1><a href=""></a> "The empires of the future are the empires of the mind." <BR><CENTER><I> ... Winston Churchill</I></font></CENTER> adr:;;2300 55th Street;Boulder;Colorado;80301;USA version:2.1 email;internet:richardc@xilinx.com title:Sr. Technical Marketing Engineer note;quoted-printable:<br><img SRC=3D"http://webster/images/button.gif" height=3D74 width=3D184><font size=3D-1><a href=3D""></a>" Yeah. Free my mind. Right. No problem.=0D=0A " <BR><CENTER><I> ... (Neo - in The Matrix)</I>=0D=0A</font></CENTER> fn:Richard Chidester end:vcard --------------53A37488ED713025FC344172--Article: 26899
James, could it be that it was determined in the survey that you are a software and silicon user, not just a software user? If you are just a software user, then you are in the minority. -Simon Ramire, Consultant Synchronous Design, Inc. "James S." <ads@begone.com> wrote in message news:3a0192f8$0$32688$45beb828@newscene.com... > A few months ago Xilinx had a survey up on their website for their software > users, and they said that if you filled it out, you would get a free > t-shirt. I filled out that survey but never got the shirt. Did anybody > else? I enjoy using Xilinx's products and would love to get a t-shirt. > > >
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Compare FPGA features and resources
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