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Andrew Rogers wrote: > > I wonder how much Microsoft are paying Xilinx! After all Xilinx don't > release ISE WebPACK for Linux. Has anyone heard a REAL reason for Xilinx > not releasing WebPACK for Linux? Well, annoying though it is, I don't think it's a conspiracy :-) It's probably a combination of: o Most Linux WebPack users will never contribute sufficient funds back to Xilinx to make it worth their while. o They pay a per-seat licence for their officially-supported foundation package on Linux to the GUI-library owners. They therefore can't offer it as a download for WebPack. What it would probably take would be a large customer saying "we're going to move to Altera/whoever unless you do the port before XXX", with XXX being a realistic target in the future. At that point, there's a commercial pressure to do the port, and Xilinx can take a view on whether it's worth it. Even then, their view might be 'see that lake, run and jump' :-) Another route for Xilinx to get their finger out would be if Altera/whoever did it first - Xilinx wouldn't be far behind then, I'd imagine, bragging rights and image are nowhere near as important as commercial pressures, but they still count :-) Simon.Article: 71426
Simon wrote: > Andrew Rogers wrote: > >> >> I wonder how much Microsoft are paying Xilinx! After all Xilinx don't >> release ISE WebPACK for Linux. Has anyone heard a REAL reason for >> Xilinx not releasing WebPACK for Linux? > > > Well, annoying though it is, I don't think it's a conspiracy :-) It's > probably a combination of: > > o Most Linux WebPack users will never contribute sufficient funds back > to Xilinx to make it worth their while. Equally applicable to Windows WebPACK users in my opinion. I'll buy FPGAs if the software is free, I'll buy nothing if the software isn't free. > > o They pay a per-seat licence for their officially-supported foundation > package on Linux to the GUI-library owners. They therefore can't offer > it as a download for WebPack. How about the command line tools; xst, map, par, bitgen, etc? > > What it would probably take would be a large customer saying "we're > going to move to Altera/whoever unless you do the port before XXX", with > XXX being a realistic target in the future. At that point, there's a > commercial pressure to do the port, and Xilinx can take a view on > whether it's worth it. Even then, their view might be 'see that lake, > run and jump' :-) At 110Kg I'm a large customer! Xilinx, I'm moving to Altera if you don't release the Linux WebPACK that you have hidden somewhere and are keeping quiet about! > > Another route for Xilinx to get their finger out would be if > Altera/whoever did it first - Xilinx wouldn't be far behind then, I'd > imagine, bragging rights and image are nowhere near as important as > commercial pressures, but they still count :-) Xilinx should retain their world leader status and should get in there first! Andrew.Article: 71427
You can get from www.devboards.de a PHY daughter card with a National 10/100/1000 PHY that fits on all Altera evaluation boards. Best Regards, Marc Anup Raghavan <anupr@ieee.org> wrote in message news:<40FA01E6.B7F56D88@ieee.org>... > Thanks y'all for your directions. > > Anup > > > Anup Raghavan wrote: > > > Hello, I am looking for a FPGA development/prototyping board that has a > > RJ45 connector and on board PHY chip. Can I get recommendations? > > > > ThanksArticle: 71428
John Adair wrote: > Have a look at our product Broadown2. We can definately support 32 bit > memory. Details are here > http://www.enterpoint.co.uk/moelbryn/broaddown2.html . Our pricing is > roughly comparable to Avnet. If you are a student/academic within the area > covered by our UAP program there may be discounts available. > I'd seen your boards, and indeed they look pretty good - they look more like 'professional' kits than hobbyist ones though, which is both good and bad ... I like the security of having a led or switch onboard that I can use for debugging (though it would be relatively easy to use all the headers you provide to do the same, granted :-) and using standard memory interfaces is definitely a step forward :-) The reason why I didn't include your board is that there's no price available and it *looks* expensive. In my limited experience, the combination of the two means it normally *is* expensive [grin]. It also looks as though it's for professional use and, from what I understand of the summary on the page, it can only be controlled via PCI and to do anything useful (ie: custom) with it, I'd need to licence a PCI core from someone (you, Xilinx, whoever), yes ? Does the opencores PCI core work with the board ? If the board can be used (with my design, not just as an io board) without paying for a PCI core (I'm a hobbyist, as you can probably tell :-), then by all means send me a quote. If you prefer, I'll not divulge the price either :-) If your pricing is comparable, perhaps you'd want to think about putting it online - that's the main reason I ignored your board in the first place... Simon.Article: 71429
Yes, if you have ChipScope 6.2 is possible, search VIO into ChipScope docs. Walter. "Vivek Joshi" <vjoshi@harris.com> a écrit dans le message de news:ee8793f.-1@webx.sUN8CHnE... Is it possible to use ChipScope Pro to stimulate signals? I'm trying to figure out if i can use ChipScope Pro to drive some signals in my FPGA.Article: 71430
"andrew<AT>rogerstech<DOT>co<DOT>uk" <"andrew<AT>rogerstech<DOT>co <DOT>uk"> wrote: : I have 5.1 ISE WebPACK running under wine but just discivered it doesn't : support Spartan3. From the archives I read about some difficulties : regarding 6.2 ISE running on wine, have these been solved? : http://www.fpga-faq.com/archives/70825.html In "70825" nothing about wine is said. In "70836" I tell about the success I have, your milage may vary. : I urgently need to know if 6.2 ISE works under wine as I have just : ordered the $99 Spartan-3 Starter Kit. If not I shall need to cancel my : order. : For those who haven't seen the Spartan 3 Kit: : http://www.xilinx.com/products/spartan3/s3boards.htm : Looks like a superb bit of kit, I will be buying a number of these for : my University module. Having the RAM on board is great. The applications : I have already thought about - add an ADC and you have a digital storage : scope, Turbo decoder, LDPC codes and so on. We'll need to get the ISE : 6.2 WebPACK running on Linux and write our own programmer software. Watch for MITOUJTAG (http://www.nahitech.com/jtag-en/). I ran it with wine to program XC95288XL and to test the pins and connections of a XC2V500-456. : ... -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------Article: 71431
Simon wrote: > So, I have a 32-bit processor design which I'd like to move to the > implementation stage, and I was wondering which of the > currently-available boards have 32-bit wide memory... I don't really > fancy designing my own because I've never ventured near 4-layer boards, > and if I was making my own, I'd want one of the FG456 packages, and > presumably you'd have to get that professionally soldered anyway... > > As far as I can tell: > > Xilinx starter kit > ------------------ > > Pros: 32-bit wide RAM > LCD/Leds for debugging > PS2/VGA outputs > Price: $99 :-) > > Cons: > Only 1 MByte of RAM > Uses the '200 part not the '400 > No ethernet PHY > Fixed oscillator freq. (the CPU goes faster :-) > Not many user-IO's available > > > AVnet Spartan-3 evaluation kit > ------------------------------ > > Pros: '400 part used :-) > Two oscillators, socketed > Lots of IO's available > Ethernet, VGA, PS2, RS232, Leds etc. > Could potentially be a PCI card > > Cons: Only 1 MByte RAM > Not clear if the memory is 32-bit wide > Price is $399 > > > Memec DS-KIT-3SLC400-PAC > ------------------------ > > Cons: Has no memory on-board, enough said. > > > Nu Horizons Spartan3 board > -------------------------- > > Pros: Uses the '400 part, but only in the '208 package > Has D2A and A2D onboard > Has Flash RAM > Has LCD (4x24) as well as leds,buttons etc. > Has spare oscillator socket for > 20MHz operation > Price - $164 :-) > > Cons: SDRAM appears to be 16-bit wide > Only has ~20 user io due to '208 package > > > > So, nothing is perfect [grin], The AVNet one may be the best of the > bunch, despite being the most expensive, so long as it has 32-bit wide > RAM. I'd really appreciate it if someone who already has the board could > tell me :-) > > > > For the record (in case any board companies are listening :-) my ideal > board would be something like: > > - FG456 Spartan 3 '400 part > - Lots of user-IO, some with pin headers not obscure connectors > - 32+ bit wide RAM, either SRAM or SDRAM. How about a DIMM :-) > - Ethernet PHY > - Leds / buttons / LED (or LCD) display > - VGA and PS2 connectors > - PCI edge connector would be nice but not essential > > If Xilinx can do theirs for $99, I think the above could be do-able for > $200 (or $199 in marketing speak). I'd bite your hand off :-) > > Simon Don't forgot to check : - the cost of postage/delivery - if design examples are available I'm in UK and Xilinx charge US$29.2 for shipping, while Nu Horizons charge US$75.0 (and no design examples), so I ordered the Xilinx board. 1Mb RAM is quite a lot usless you use it for video/audio processing. Regarding bus width issue, you can develope a simple bus bridge / RAM controller to convert 32-bit accesses to 16-bits (provided you have wait state input on your CPU core). A few more things add to the wish list: - RS232 (already available om some boards you mentioned) - PS/2 interface x 2 (one for mouse, one for keyboard as the same time) - Audio (I2S) - SDRAM, or - SDRAM module connector ( for PC100/133 modules - you can plug one in if you wanted to use SDRAM, or if you don't need SD-RAM you can have the pins for user I/O.) - LCD module connector - and yes, Xilinx, will you guys make a starter kit with XC3S-400 pleassssssssssse 8-) - Also it would be nice if vendors can develop I/O boards for the Xilinx's kit (am I getting too demanding here? :-) JoeArticle: 71432
Price for the standard board is £250 / 399 Euro / $399 plus shipping and any applying taxes in your country. The price is buried in a pdf flyer that is linked on the website, look here http://www.enterpoint.co.uk/moelbryn/Broaddown2_Flyer.pdf . The phy/RJ45 plug-in price is not set but should be less than £20. I'm glad to have our product thought of as "quality" and I certainly wouldn't want to produce anything less. The next batch of un-sold boards will be with us in approximately 6-8 weeks. If anyone else thinks we should have further info on website etc let me know what you think is missing and I will have the website improved to cover any gaps. The board is aimed at professional users and students but we don't mind selling to hobby engineers. The DIL headers will take stripboard as well as manufactured boards and that was deliberate feature in the board concept. Twin digit LED is available on plug-in supplied with board. You don't need a PCI license. The PCI connector can be used as an I/O connector. We have a test board that we might make into a product that already does this. We also have a free standard build on the way that will allow the board to be used as an I/O board without doing anything except programming the Broaddown2 Platform Flash device. I haven't used opencores PCI but I can't think of any reason that it should not work. -- John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board. http://www.enterpoint.co.uk "Simon" <news@gornall.net> wrote in message news:jZtKc.780$b11.202@newsfe4-gui.ntli.net... > John Adair wrote: > > > Have a look at our product Broadown2. We can definately support 32 bit > > memory. Details are here > > http://www.enterpoint.co.uk/moelbryn/broaddown2.html . Our pricing is > > roughly comparable to Avnet. If you are a student/academic within the area > > covered by our UAP program there may be discounts available. > > > > I'd seen your boards, and indeed they look pretty good - they look more > like 'professional' kits than hobbyist ones though, which is both good > and bad ... > > I like the security of having a led or switch onboard that I can use for > debugging (though it would be relatively easy to use all the headers you > provide to do the same, granted :-) and using standard memory interfaces > is definitely a step forward :-) > > The reason why I didn't include your board is that there's no price > available and it *looks* expensive. In my limited experience, the > combination of the two means it normally *is* expensive [grin]. > > It also looks as though it's for professional use and, from what I > understand of the summary on the page, it can only be controlled via PCI > and to do anything useful (ie: custom) with it, I'd need to licence a > PCI core from someone (you, Xilinx, whoever), yes ? Does the opencores > PCI core work with the board ? > > If the board can be used (with my design, not just as an io board) > without paying for a PCI core (I'm a hobbyist, as you can probably tell > :-), then by all means send me a quote. If you prefer, I'll not divulge > the price either :-) > > If your pricing is comparable, perhaps you'd want to think about putting > it online - that's the main reason I ignored your board in the first > place... > > Simon.Article: 71433
Get us a little time and we will satisfy most of these demands by plug-ins. We are UK based so shipping to the UK should be around the £10 mark or less. Our SODIMM socket will support I/O functions. We have such a board already on the way for our own purposes. One of our standard builds (free) will support this. -- John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board. http://www.enterpoint.co.uk "Joe" <joe_y@invalid_address.nospam.com> wrote in message news:cde1j4$ckh$1$8302bc10@news.demon.co.uk... > Simon wrote: > > So, I have a 32-bit processor design which I'd like to move to the > > implementation stage, and I was wondering which of the > > currently-available boards have 32-bit wide memory... I don't really > > fancy designing my own because I've never ventured near 4-layer boards, > > and if I was making my own, I'd want one of the FG456 packages, and > > presumably you'd have to get that professionally soldered anyway... > > > > As far as I can tell: > > > > Xilinx starter kit > > ------------------ > > > > Pros: 32-bit wide RAM > > LCD/Leds for debugging > > PS2/VGA outputs > > Price: $99 :-) > > > > Cons: > > Only 1 MByte of RAM > > Uses the '200 part not the '400 > > No ethernet PHY > > Fixed oscillator freq. (the CPU goes faster :-) > > Not many user-IO's available > > > > > > AVnet Spartan-3 evaluation kit > > ------------------------------ > > > > Pros: '400 part used :-) > > Two oscillators, socketed > > Lots of IO's available > > Ethernet, VGA, PS2, RS232, Leds etc. > > Could potentially be a PCI card > > > > Cons: Only 1 MByte RAM > > Not clear if the memory is 32-bit wide > > Price is $399 > > > > > > Memec DS-KIT-3SLC400-PAC > > ------------------------ > > > > Cons: Has no memory on-board, enough said. > > > > > > Nu Horizons Spartan3 board > > -------------------------- > > > > Pros: Uses the '400 part, but only in the '208 package > > Has D2A and A2D onboard > > Has Flash RAM > > Has LCD (4x24) as well as leds,buttons etc. > > Has spare oscillator socket for > 20MHz operation > > Price - $164 :-) > > > > Cons: SDRAM appears to be 16-bit wide > > Only has ~20 user io due to '208 package > > > > > > > > So, nothing is perfect [grin], The AVNet one may be the best of the > > bunch, despite being the most expensive, so long as it has 32-bit wide > > RAM. I'd really appreciate it if someone who already has the board could > > tell me :-) > > > > > > > > For the record (in case any board companies are listening :-) my ideal > > board would be something like: > > > > - FG456 Spartan 3 '400 part > > - Lots of user-IO, some with pin headers not obscure connectors > > - 32+ bit wide RAM, either SRAM or SDRAM. How about a DIMM :-) > > - Ethernet PHY > > - Leds / buttons / LED (or LCD) display > > - VGA and PS2 connectors > > - PCI edge connector would be nice but not essential > > > > If Xilinx can do theirs for $99, I think the above could be do-able for > > $200 (or $199 in marketing speak). I'd bite your hand off :-) > > > > Simon > > Don't forgot to check : > - the cost of postage/delivery > - if design examples are available > > I'm in UK and Xilinx charge US$29.2 for shipping, > while Nu Horizons charge US$75.0 (and no design > examples), so I ordered the Xilinx board. > > 1Mb RAM is quite a lot usless you use it for video/audio processing. > Regarding bus width issue, you can develope a simple bus bridge / > RAM controller to convert 32-bit accesses to 16-bits (provided you > have wait state input on your CPU core). > > A few more things add to the wish list: > - RS232 (already available om some boards you mentioned) > - PS/2 interface x 2 (one for mouse, one for keyboard as the same time) > - Audio (I2S) > - SDRAM, or > - SDRAM module connector ( for PC100/133 modules - you can plug one > in if you wanted to use SDRAM, or if you don't need SD-RAM you > can have the pins for user I/O.) > - LCD module connector > - and yes, Xilinx, will you guys make a starter kit with XC3S-400 > pleassssssssssse 8-) > > - Also it would be nice if vendors can develop I/O boards for the > Xilinx's kit (am I getting too demanding here? :-) > > JoeArticle: 71434
John Adair wrote: > Get us a little time and we will satisfy most of these demands by plug-ins. > We are UK based so shipping to the UK should be around the £10 mark or less. > > Our SODIMM socket will support I/O functions. We have such a board already > on the way for our own purposes. One of our standard builds (free) will > support this. > Hi John, I saw your board, but using DDR-RAM is a bit overkill for most projects, especailly for hobbyists and students. So I assumed your board is for professionals (and therefore expensive? 8-) Also DDR-SDRAM controller design is more complex that I am not sure if I can cope with that. Possibly the DDR-SDRAM controller design already take 25% of the FPGA :-) I like the idea of having three versions XC3S400, 1000 and 1500. Having PCI connector is nice too, but I don't need that at this moment. I only want to do some experiments on designing CPU cores, that's why RS232, PS2, VGA and SRAM interface are useful for me. I don't have access to PCB manufacturing facilities so can't do my own add-on boards. I have been thinking about getting the B5-X300 from www.Burched.com, but the total cost (FPGA board + ad-on boards) is still a bit expensive. So the Xilinx's kit fit the bill. If your company will do a board like the Xilinx starter kit, but with XC3S400 part, I will certainly be very interested (if it is not too expensive) :-) JoeArticle: 71435
It is very hard to hit the mark with everyone. Broaddown2 was never intended for the very cheap end. It is a fairly complex board and has manufacturing costs that go with that complexity. The main leaning to hobby electronics is that the XC3S400 is supported by Webpack and which anything bigger isn't supported. We are looking at a range of option boards for the DDR2 socket including other memory types. Watch this space. There may be some things coming out late 2004 that may be suitable for hobby electronics. Watch for product announcements or join our email list if you are interested. -- John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board. http://www.enterpoint.co.uk "Joe" <joe_y@invalid_address.nospam.com> wrote in message news:cde6ht$s7i$1$830fa7a5@news.demon.co.uk... > John Adair wrote: > > Get us a little time and we will satisfy most of these demands by plug-ins. > > We are UK based so shipping to the UK should be around the £10 mark or less. > > > > Our SODIMM socket will support I/O functions. We have such a board already > > on the way for our own purposes. One of our standard builds (free) will > > support this. > > > > Hi John, > > I saw your board, but using DDR-RAM is a bit overkill for most projects, > especailly for hobbyists and students. So I assumed your board is for > professionals (and therefore expensive? 8-) > > Also DDR-SDRAM controller design is more complex that I am not sure if I > can cope with that. Possibly the DDR-SDRAM controller design already > take 25% of the FPGA :-) > > I like the idea of having three versions XC3S400, 1000 and 1500. Having > PCI connector is nice too, but I don't need that at this moment. I only > want to do some experiments on designing CPU cores, that's why RS232, > PS2, VGA and SRAM interface are useful for me. I don't have access to > PCB manufacturing facilities so can't do my own add-on boards. > > I have been thinking about getting the B5-X300 from www.Burched.com, but > the total cost (FPGA board + ad-on boards) is still a bit expensive. So > the Xilinx's kit fit the bill. > > If your company will do a board like the Xilinx starter kit, but with > XC3S400 part, I will certainly be very interested (if it is not too > expensive) :-) > > JoeArticle: 71436
Joe, According to http://www.xilinx.com/bvdocs/userguides/ug130.pdf, the Xilinx Spartan-3 Starter Kit board uses the Digilent expansion header. A number of peripheral boards are available at: https://digilent.us/Sales/boards.cfm#Peripheral Paul Joe wrote: > <snip> > > - Also it would be nice if vendors can develop I/O boards for the > Xilinx's kit (am I getting too demanding here? :-) > > JoeArticle: 71437
Simon, There will be an Ethernet Peripheral Board available for the Xilinx Spartan-3 Starter Kit board from Digilent: https://digilent.us/Sales/Product.cfm?Prod=NET1 I physically have one of these boards right now but do not know when they will be generally available. Paul Simon wrote: > > So, I have a 32-bit processor design which I'd like to move to the > implementation stage, and I was wondering which of the > currently-available boards have 32-bit wide memory... I don't really > fancy designing my own because I've never ventured near 4-layer boards, > and if I was making my own, I'd want one of the FG456 packages, and > presumably you'd have to get that professionally soldered anyway... > > As far as I can tell: > > Xilinx starter kit > ------------------ > > Pros: 32-bit wide RAM > LCD/Leds for debugging > PS2/VGA outputs > Price: $99 :-) > > Cons: > Only 1 MByte of RAM > Uses the '200 part not the '400 > No ethernet PHY > Fixed oscillator freq. (the CPU goes faster :-) > Not many user-IO's available >Article: 71438
John Adair wrote: > Price for the standard board is £250 / 399 Euro / $399 plus shipping and any > applying taxes in your country. The price is buried in a pdf flyer that is > linked on the website, look here > http://www.enterpoint.co.uk/moelbryn/Broaddown2_Flyer.pdf . The phy/RJ45 > plug-in price is not set but should be less than £20. I'm glad to have our > product thought of as "quality" and I certainly wouldn't want to produce > anything less. Sorry, I wasn't impugning the quality of yours or any other board, what I meant was the 'look' of the board was more professional, in that it didn't have the leds, rs232, lcd/led display etc. that a 'starter kit' typically has. It looks like a 'workhorse' solution rather than the 'prancing pony' with all the extras ... hmm. Not sure about my analogy :-) > The next batch of un-sold boards will be with us in approximately 6-8 weeks. Well, it looks good to me :-) > If anyone else thinks we should have further info on website etc let me know > what you think is missing and I will have the website improved to cover any > gaps. > > The board is aimed at professional users and students but we don't mind > selling to hobby engineers. The DIL headers will take stripboard as well as > manufactured boards and that was deliberate feature in the board concept. > > Twin digit LED is available on plug-in supplied with board. Ah yes, I see that now - I missed it before. I had found the second of the PDF's on your site, but missed the one with the price on it. > You don't need a PCI license. The PCI connector can be used as an I/O > connector. We have a test board that we might make into a product that > already does this. We also have a free standard build on the way that will > allow the board to be used as an I/O board without doing anything except > programming the Broaddown2 Platform Flash device. I haven't used opencores > PCI but I can't think of any reason that it should not work. When you were referring to 'standard build for an i/o board', I had thought you meant a board configured using the PCI slot, with a fixed download configuration, to be used for testing rather than development. I now think you mean that the board doesn't need to be in a computer, and that the i/o you're talking about is the configuration of the Spartan-3 with a custom (ie: mine :-) configuration via the pci edge connector, even though not using the PCI protocols. Is this what you mean ? To be clear, before I cough up £250: is there a direct way of programming the board from within WebPack, or would I need to design a host interface to sit between the PCI edge connector and the download cable ? Simon.Article: 71439
Simon, With regard to the Oscillator frequency, have you seen the following in the User Guide (http://www.xilinx.com/bvdocs/userguides/ug130.pdf)? "The Spartan-3 Starter Kit board has a dedicated 50 MHz Epson SG-8002JF series clock oscillator source and an optional socket for another clock oscillator source. Figure A-5 provides a detailed schematic for the clock sources. The 50 MHz clock oscillator is mounted on the bottom side of the board, indicated as in Figure A-5. Use the 50 MHz clock frequency as is or derive other frequencies using the FPGAs Digital Clock Managers (DCMs). Using Digital Clock Managers (DCMs) in Spartan-3 FPGAs http://www.xilinx.com/bvdocs/appnotes/xapp462.pdf The oscillator socket, indicated as in Figure 1-2, accepts oscillators in an 8-pin DIP footprint." Paul Simon wrote: > > Xilinx starter kit > ------------------ > > Pros: 32-bit wide RAM > LCD/Leds for debugging > PS2/VGA outputs > Price: $99 :-) > > Cons: > Only 1 MByte of RAM > Uses the '200 part not the '400 > No ethernet PHY > Fixed oscillator freq. (the CPU goes faster :-) > Not many user-IO's available >Article: 71440
Gregg C Levine wrote: > > Hello from Gregg C Levine > Just for the sake of arguement, where did you find the Linux version of the > tool? Every time I visit their webpages, all it talks about is the Windows > version of the tool. And I've tried searching the site, its search engine does > not properly return anything. Sorry, but I paid for the "full" ISE, which is the only way to get the Linux version (the full ISE includes a couple of additional tools and supports more parts). Hopefully Webpack will eventually be made available in the Linux version. Possibly Xilinx, like many vendors, wants to use there paying customers for beta testing. I think that they realize the paying customers are probably a bit more experienced at debugging the vendor tools ;) -- My real email is akamail.com@dclark (or something like that).Article: 71441
Simon wrote: > > You should also be aware that it doesn't appear to work well if you have > an Athlon64 processor. I've had Wine working fine under non-64 bit > processors, but can't get it to compile on 64-bit linux for the AMD64. > I had thought the application needs to be compiled for 64-bit operation, otherwise there will be little benefit to running it on a 64 bit processor. Are you seeing better performance running 32 bit apps on a 64 bit processor? -- My real email is akamail.com@dclark (or something like that).Article: 71442
Joe wrote: > > 1Mb RAM is quite a lot usless you use it for video/audio processing. > Regarding bus width issue, you can develope a simple bus bridge / > RAM controller to convert 32-bit accesses to 16-bits (provided you > have wait state input on your CPU core). Well, I want to do a few things with the board when I get it. I used to use a unix workstation that ran a 32-bit CPU at 33 MHz and life was good. Now my cpu may not be a MIPS 3000, but at 70MHz (estimated, it's doing 65 now with minimal effort on floorplanning), I'd hope it could be compared. Or perhaps I'm dreaming - at any rate I'd like to find out :-) The core does have wait states for memory (and on-chip peripherals), but one of the things I'd like to do ultimately is fill a line of i/d-cache at a time from the (currently non-existant :-) memory controller using burst mode, which means that I'll want that controller<->RAM interface to run as fast as possible. I also want to try and get it encoding/decoding video <--> mpeg2 if I can. Having seen the complexity of the s/w written to do that, I think that's a pretty big challenge (at least for me :-) but I think others have done it for student projects etc. Having the CPU might make it possible to do some of it in s/w and just have the heavy-lifting in h/w. I'm not sure how much space it'll take to do an MPEG core though - perhaps too much for the '400 device. Anyway, that's why I'd like lots of memory :-) 256MBytes on an SO-Dimm seems like a good idea to me :-) > A few more things add to the wish list: > - RS232 (already available om some boards you mentioned) > - PS/2 interface x 2 (one for mouse, one for keyboard as the same time) > - Audio (I2S) > - SDRAM, or > - SDRAM module connector ( for PC100/133 modules - you can plug one > in if you wanted to use SDRAM, or if you don't need SD-RAM you > can have the pins for user I/O.) > - LCD module connector > - and yes, Xilinx, will you guys make a starter kit with XC3S-400 > pleassssssssssse 8-) I think the crucial thing is i/o pins. It's not too hard to fire up Eagle and make your own add-on daughterboard as long as the i/o is available. Without, it's impossible... One of the things I like about the Broaddown2 (odd name for a board) is that a *lot* of i/o is available and not in some high-density connector, but with easy-to-use pinouts :-) SimonArticle: 71443
Actually, just to follow that up, John, how much is a '1500 part on the
board ? I realise I'd have to fork out for BaseX ('cos there ain't no
way I'm paying for Foundation!) but that would have the side-effect of
letting me work on Linux :-)
Simon
Article: 71444Paul Hartke wrote: > Joe, > > According to http://www.xilinx.com/bvdocs/userguides/ug130.pdf, > the Xilinx Spartan-3 Starter Kit board uses the Digilent expansion > header. A number of peripheral boards are available at: > https://digilent.us/Sales/boards.cfm#Peripheral > > Paul > > Joe wrote: > > <snip> > >>- Also it would be nice if vendors can develop I/O boards for the >>Xilinx's kit (am I getting too demanding here? :-) >> >>Joe Thanks Paul. I didn't realize they are the same connector :-) JoeArticle: 71445
Paul Hartke wrote: > Simon, > > With regard to the Oscillator frequency, have you seen the following in > the User Guide (http://www.xilinx.com/bvdocs/userguides/ug130.pdf)? > > "The Spartan-3 Starter Kit board has a dedicated 50 MHz Epson SG-8002JF > series clock oscillator source and an optional socket for another clock > oscillator source. Figure A-5 provides a detailed schematic for the > clock > sources. [grin] You're getting there, Paul :-) If you can do something about the 1 MByte of RAM and the '200 part, I'll have found my ideal board :-) Anyway, as you rightly point out, scratch the bottom 3 'cons' for the starter kit - it really is good value, isn't it ? >> Xilinx starter kit >> ------------------ >> >> Pros: 32-bit wide RAM >> LCD/Leds for debugging >> PS2/VGA outputs >> Price: $99 :-) >> >> Cons: >> Only 1 MByte of RAM >> Uses the '200 part not the '400 >> (x) No ethernet PHY >> (x) Fixed oscillator freq. (the CPU goes faster :-) >> (x) Not many user-IO's available >> SimonArticle: 71446
Duane Clark wrote: > Simon wrote: > >> >> You should also be aware that it doesn't appear to work well if you >> have an Athlon64 processor. I've had Wine working fine under non-64 >> bit processors, but can't get it to compile on 64-bit linux for the >> AMD64. >> > > I had thought the application needs to be compiled for 64-bit operation, > otherwise there will be little benefit to running it on a 64 bit > processor. Are you seeing better performance running 32 bit apps on a 64 > bit processor? Well, I was initially hoping to compile Wine in 64-bit mode, figuring that because it "wasn't an emulator", then when the Windows calls finally made it through to the lower levels of Wine, it would be running at 64-bits, although of course the windows code itself would only be 32-bit. The thing being that in 64-bit mode you get a swathe of new registers etc, that (irrespective of the bit-ness) allow far more flxibility to the compiler... Anyway, my hopes were dashed. Wine wouldn't work, even in 32-bit mode :-( SimonArticle: 71447
Antti Lukats wrote: > "Ray Andraka" <ray@andraka.com> wrote in message > news:40F5B093.70E01445@andraka.com... > >>I'm coming a little late to this conversation, but perhaps this has not > > been > >>considered. I sincerely doubt it is a configuration problem. Much more > > likely, you are not > >>coming out of reset at the end of configuration cleanly. The global reset > > must be > > Hi Ray, > > didnt notice some more replies to my post, thanks! > > well let me again explain the situation: > > its Virtex2, it has Microblaze with 32k BRAM, I am using both impact and > Chipscope > to download the bitstreams. The bitstream is known good, but in some cases > after download one hard coded register is read by microblaze like giving > wrong > readback. The readback is constant for given configuration attempt. And the > wrong read value persists after any number of hardware reset. Only goes away > after new reconfiguration. The wrong read value comes from an verilog wire > (that has an assigned constant value). I still do not see how the clocking > or reset problem could do that. If the bitstream is loaded again the problem > disappears. If the same bitstream is loaded from configuration memory there > is never a problem. > > BRAMs are initialized, flip flops are initialized ok, or they are not > relevant > in the current problem. If the FPGA is not able to start with errors during > actual configuration download, I would say this problem should never > have occoured. > > Ray - if you notice my plea to give information about Xilinx Auto-CRC > has been left un-responded. Virtex 2 bitstream does not include normal > CRC as it used be in spartan II/E. Its replaced with AutoCRC. But there > is no information how it is calculated anywhere in any public documents! > > Xilinx says that the old CRC was not good enough and did not catch all > errors during configuration !! But I bet the new one is not much better! > > Antti If I read this right, you are saying that read-back does show the error, and that error persists on many read-backs until re-config ? That does sound like a config-write-error. Have you tried multiple devices (ideally with differing datecodes ?) If this persists across device/date code boundaries, I would say it shows a serious blind spot. In general, any device program includes a verify step, and on an FPGA devices skipping verify has probably become the norm, because of 'saving time' reasons. If the CRC is not sufficently reliable, then that would make config something of a lottery. [just maybe they do not CRC the whole bitstream ?] Perhaps someone from Xilinx could clarify more what AutoCRC is, and does ? -jgArticle: 71448
On Mon, 19 Jul 2004 10:00:43 +1200, Jim Granville <no.spam@designtools.co.nz> wrote: >Antti Lukats wrote: >> "Ray Andraka" <ray@andraka.com> wrote in message >> news:40F5B093.70E01445@andraka.com... >> >>>I'm coming a little late to this conversation, but perhaps this has not >> >> been >> >>>considered. I sincerely doubt it is a configuration problem. Much more >> >> likely, you are not >> >>>coming out of reset at the end of configuration cleanly. The global reset >> >> must be >> >> Hi Ray, >> >> didnt notice some more replies to my post, thanks! >> >> well let me again explain the situation: >> >> its Virtex2, it has Microblaze with 32k BRAM, I am using both impact and >> Chipscope >> to download the bitstreams. The bitstream is known good, but in some cases >> after download one hard coded register is read by microblaze like giving >> wrong >> readback. The readback is constant for given configuration attempt. And the >> wrong read value persists after any number of hardware reset. Only goes away >> after new reconfiguration. The wrong read value comes from an verilog wire >> (that has an assigned constant value). I still do not see how the clocking >> or reset problem could do that. If the bitstream is loaded again the problem >> disappears. If the same bitstream is loaded from configuration memory there >> is never a problem. >> >> BRAMs are initialized, flip flops are initialized ok, or they are not >> relevant >> in the current problem. If the FPGA is not able to start with errors during >> actual configuration download, I would say this problem should never >> have occoured. >> >> Ray - if you notice my plea to give information about Xilinx Auto-CRC >> has been left un-responded. Virtex 2 bitstream does not include normal >> CRC as it used be in spartan II/E. Its replaced with AutoCRC. But there >> is no information how it is calculated anywhere in any public documents! >> >> Xilinx says that the old CRC was not good enough and did not catch all >> errors during configuration !! But I bet the new one is not much better! >> >> Antti > > If I read this right, you are saying that read-back does show the >error, and that error persists on many read-backs until re-config ? Good question. Antti, when you say that "readback" is consistent, are you referring to the MicroBlaze's readback of that one register, or are you saying that you are seeing an error when you perform a bitstream readback? Bob Perlman Cambrian Design WorksArticle: 71449
kempaj@yahoo.com (Jesse Kempa) wrote in message news:<95776079.0407150807.5ca1b217@posting.google.com>... > > > > Jesse/Ken, > > > > Thanks for your responses. In fact I was debating whether or not > > I needed one, but both your responses definitely eliminate my thought > > of not having to implement one. I agree that this is required and > > will definitely help me with any board skew as well. I haven't > > implemented, but will look into the example and try to use some of the > > results from that for the board. Do you know what the trace-lengths > > (layout) is on the board to configure the proper phase delay > > parameters for the PLL for the 1s10 NIOS eval.board? Is there a > > recommended number I should use? > > > > Regards, > > Pino > > Look at the "standard" or "standard_32" design in Quartus and > double-click the PLL block to edit it. The wizard has several pages of > settings for the PLL. The one you are concerned with is the "Clock e0" > page, which lets you set a multiplier/divisor for the external clock > going to the PLL (the clock "c0" page lets you setup the clock that is > fed, in the example design, to SOPC Builder/Nios). > > These settings let you set a phase shift in degrees or seconds; we > measured the delay between clock generation & signals arriving at > external SDRAM using an oscilloscope for our dev boards and that delay > is where the figure you see comes from. I'm looking at an example for > a 1s40 dev board now and its -3.5ns of shift. I recommend setting > shift in nanoseconds versus degrees of phase, because this way the > shift is constant even if you later tweak the clock speed of your > design. > > Also, this PLL wizard is what you would use to change the clock speed > going to your SOPC Builder design (or other user logic). > > - Jesse Setting the PLL to the correct phase delay helped. I now have a 100 MHz clock feeding my SDRAM module. I had started to implement the PLL, but was not sure if this was exactly the right approach for advancing the clock frequency. All your comments are very appreciated!
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