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Messages from 87725

Article: 87725
Subject: Re: Best Practices to Manage Complexity in Hardward/Software Design?
From: scottf3095@aol.com
Date: 29 Jul 2005 09:03:17 -0700
Links: << >>  << T >>  << A >>
> 4. Design from the top down. That is, begin the design decomposition
> at the top level and then iteratively break the higher level blocks
> into lower level blocks. AKA hierarchical design.

...

> 5. Implement from the bottom up.

Why implement from the bottom up?

-scott frye


Article: 87726
Subject: Re: simple SRAM memory controller on the Altera Nios Dev Kit (Cyclone
From: Duane Clark <dclark@junkmail.com>
Date: Fri, 29 Jul 2005 16:23:15 GMT
Links: << >>  << T >>  << A >>
Tommy Thorn wrote:
> 
> I think I'm starting to understand it.  While I'm still using it in a 
> pipelined manner (latching the previous data while presenting a new 
> address), I see now that I need to allow for additional timing margin. 
> Is it correctly understood though, that if I _didn't_ use it this way, 
> but instead held the address stable while I latched the data, I wouldn't 
> be able to achieve the same memory bandwidth?

That would be using asynchronous design techniques. Actually, 
asynchronous design techniques allow for much faster designs. In a 
synchronous design, every stage takes exactly one clock period, even 
though the signals take less than one clock period to go through the 
intervening logic and propagate.

In an asynchronous design, each stage can be run at whatever the speed 
of the slowest signal is.

The reason very few people use asynchronous designs is because they can 
be a royal pain to get the timing right. And in a FPGA almost 
impossible. In part because the FPGA tools were developed assuming a 
synchronous design.

> 
> So I wonder what Altera means when they write zero-wait-states?  In 
> other words, what kind of bandwidth does Nios sees when using this 10ns 
> async sram?

I can't really speak for either Altera or Nios, but pesumably zero wait 
states would require a clock of somewhat less than 100MHz.

Article: 87727
Subject: Re: ChipScope Pro : how to set up trigger
From: "pasacco" <pasacco@gmail.com>
Date: 29 Jul 2005 10:42:44 -0700
Links: << >>  << T >>  << A >>
When I change the code below as shown below,
(i.e., rst_tmp = 0),
anyway it seems okay, though there are some warning messages.
I need to play with this more  :)

-------------------------------------
rst_tmp <= async_out(0);
             ==>
rst_tmp <= async_out(0);
async_out(0) <= '0';
-------------------------------------

Thanks a lot for the comments and nice template too. Regards


Article: 87728
Subject: Re: VHDL 200x? when?
From: "Andy Peters" <Bassman59a@yahoo.com>
Date: 29 Jul 2005 12:51:18 -0700
Links: << >>  << T >>  << A >>
Michael wrote:
> When should we see VDHL 200x incorporated in our EDA tools?

Considering how long it took synthesis vendors to put VHDL-93 features
into their tools, I'll guess: 2011.  In the summer.

-a


Article: 87729
Subject: Re: GLCKs on Spartan3
From: "jimwu88NOOOSPAM@yahoo.com" <jimwu88NOOOSPAM@yahoo.com>
Date: 29 Jul 2005 12:59:36 -0700
Links: << >>  << T >>  << A >>
Glad it worked out for you. In case you run out of BUFGs in the future,
you may want to use local clocks if some of the clocks only drive a
small amount of logic.

Jim


Article: 87730
Subject: Spartan3 Done is not going high
From: "Brad Smallridge" <bradsmallridge@dslextreme.com>
Date: Fri, 29 Jul 2005 13:07:12 -0700
Links: << >>  << T >>  << A >>
Hello group,

I am getting an error from Impact saying that
the DONE pin is not going high, Program Terminated,
or something like that. These are new boards so I
suspect hardware issues. The JTAG seems to see
the chain OK, three Spartans and three platform PROMs.

What should I look for first?

Brad Smallridge
b r a d @ a i v i s i o n . c o m 



Article: 87731
Subject: Re: VHDL 200x? when?
From: "Joel Kolstad" <JKolstad71HatesSpam@yahoo.com>
Date: Fri, 29 Jul 2005 13:35:07 -0700
Links: << >>  << T >>  << A >>
"Andy Peters" <Bassman59a@yahoo.com> wrote in message
news:1122666678.883896.78960@g47g2000cwa.googlegroups.com...
> Michael wrote:
> > When should we see VDHL 200x incorporated in our EDA tools?
>
> Considering how long it took synthesis vendors to put VHDL-93 features
> into their tools, I'll guess: 2011.  In the summer.

I'll agree with you.  Originally VHDL was supposed to be updated every 5
years.  Hence, VHDL-93 was a year late (not too bad for something done by
committee), and tt was already clear by the late '90s that VHDL-98 was a pipe
dream.  Paul Mencini was on some 3-4 years ago asking for suggestions on what
people wanted to see in VHDL-200x, and at that time people pointed out that
the need for another version of VHDL was questionable when so many vendors
still weren't particularly VHDL-93 compliant!



Article: 87732
Subject: Re: Spartan3 Done is not going high
From: "skherich" <skherich@gmail.com>
Date: 29 Jul 2005 13:53:35 -0700
Links: << >>  << T >>  << A >>

Brad Smallridge wrote:
> Hello group,
>
> I am getting an error from Impact saying that
> the DONE pin is not going high, Program Terminated,
> or something like that. These are new boards so I
> suspect hardware issues. The JTAG seems to see
> the chain OK, three Spartans and three platform PROMs.
>
> What should I look for first?
>
> Brad Smallridge
> b r a d @ a i v i s i o n . c o m

Brad,
Are you getting any CRC errors?
Make sure your INIT & PROG Pins stay asserted as per spec.
Xilinx support has a good list of things to try in case of programming
errors. You might want to give that a shot. These are typically quite
frustrating although very subtle errors.

good luck
samir


Article: 87733
Subject: Re: Virtex4 local clock timing
From: "johnp" <johnp3+nospam@probo.com>
Date: 29 Jul 2005 14:21:34 -0700
Links: << >>  << T >>  << A >>
Marc -

Thanks for the thoughts.  I'm hoping a Xilinx person will  chime in and
explain if
there's anything interesting about the local clock input pins near the
OSERDES
blocks.

John P


Article: 87734
Subject: Re: ChipScope Pro : how to set up trigger
From: "Nenad" <n_uzunovic@yahoo.com>
Date: 29 Jul 2005 14:36:26 -0700
Links: << >>  << T >>  << A >>

in my example all the things connected to async out are within the
process which is sensitive to async_out.

try this:

process(async_out)
begin
rst_tmp <= async_out(0);
end process;

other things seem to be fine


Article: 87735
Subject: Re: Spartan3 Done is not going high
From: "Brad Smallridge" <bradsmallridge@dslextreme.com>
Date: Fri, 29 Jul 2005 15:09:08 -0700
Links: << >>  << T >>  << A >>
> Brad,
> Are you getting any CRC errors?

No, no CRC errors.  This is what iMPACT says:

PROGRESS_START - Starting Operation.
Validating chain...
Boundary-scan chain validated successfully.
'4':Programming device...
done.
INFO:iMPACT:579 - '4': Completed downloading bit file to device.
INFO:iMPACT:580 - '4':Checking done pin ....done.
'4': Programming terminated, Done did not go high.
PROGRESS_END - End Operation.
Elapsed time = 1 sec.

I have toggled the Drive Done Pin High in the Startup Options,
the Configuration Pin Done is set at PullUp, and I have added
a 3.3K external pullup to 2.5V.

No results ):

Brad


 



Article: 87736
Subject: Re: Best Practices to Manage Complexity in Hardward/Software Design?
From: "steve" <bungalow_steve@yahoo.com>
Date: 29 Jul 2005 17:40:35 -0700
Links: << >>  << T >>  << A >>
The document has some good infomation, many of my mature customers tell
me exactly what documentation I need to produce so I really have no
choice in the matter!

One comment I thought strange in the document was

"I have worked for Parker Hannifin, an aerospace company where mistakes
result in people being killed. I have worked for Mattel, where the only
factors that matter are how soon you can get the toy into mass
production and how far down you can get the per-toy costs. "

I am sure Mattel has killed more people then any aerospace company due
to its engineering mistakes. (small parts choking kids, electrical toys
starting fires, sharp parts cutting, wires choking, lead poisoning etc
etc).


Article: 87737
Subject: Re: Best Practices to Manage Complexity in Hardward/Software Design?
From: "Peter K." <p.kootsookos@iolfree.ie>
Date: 29 Jul 2005 17:47:24 -0700
Links: << >>  << T >>  << A >>

Randy Yates wrote:

>
> If you still think I work for Sony Ericsson, you'd be wrong.
>

Ah.  That could mean a change, then!  So what is it? Jet engines?
Elevators? Air conditioners? Helicopters? Electronic security? Space
suits? Fuel cells?

> http://home.earthlink.net/~yatescr

You haven't updated this! :0)

Ciao,

Peter K.


Article: 87738
Subject: Re: Spartan3 Done is not going high
From: "Brad Smallridge" <bradsmallridge@dslextreme.com>
Date: Fri, 29 Jul 2005 17:48:20 -0700
Links: << >>  << T >>  << A >>
> Make sure your INIT & PROG Pins stay asserted as per spec.

That's it. PROG stuck low. Thanks.



Article: 87739
Subject: Re: Best Practices to Manage Complexity in Hardward/Software
From: Randy Yates <yates@ieee.org>
Date: Sat, 30 Jul 2005 02:07:13 GMT
Links: << >>  << T >>  << A >>
scottf3095@aol.com writes:

>> 4. Design from the top down. That is, begin the design decomposition
>> at the top level and then iteratively break the higher level blocks
>> into lower level blocks. AKA hierarchical design.
>
> ...
>
>> 5. Implement from the bottom up.
>
> Why implement from the bottom up?

Because part of the implementation usually includes "unit" testing, or
testing of the pieces, and you must begin such testing with the
smallest pieces possible. Then, when the "foundation" is implemented,
you can begin assembling the foundational pieces into small
subsystems, test those, then piece those together, test those, etc.,
until you have the entire system.
-- 
%  Randy Yates                  % "She's sweet on Wagner-I think she'd die for Beethoven.
%% Fuquay-Varina, NC            %  She love the way Puccini lays down a tune, and
%%% 919-577-9882                %  Verdi's always creepin' from her room." 
%%%% <yates@ieee.org>           % "Rockaria", *A New World Record*, ELO   
http://home.earthlink.net/~yatescr

Article: 87740
Subject: question about use SRAM on annapolis wildstarII board
From: "fpga" <hy34@njit.edu>
Date: 29 Jul 2005 19:37:44 -0700
Links: << >>  << T >>  << A >>
Hello, Is anybody here uses annapolis wildstarII board which has two
xilinx xc2v6000 chips and around each chip there are 6 samsung 512*36
DDRII srams? I tried the examples "sram_ex" given by annapolis, but the
result is always failed. And I can't succeed to re-generate the .x86
file because the constaint file contains some nonexist groups. If I
remove the constraint, I can get the .x86 file but the result is not
right. Their support man sent me another example to write SRAM from the
host computer, but I doubt that they miexed different versions and I
can't get through it. Any recommendation on it? 

Thanks a lot.


Article: 87741
Subject: Xilinx ISE WebPACK-7.1i on NetBSD
From: Chet Stemen <newsposting1@crel.us>
Date: Fri, 29 Jul 2005 21:53:56 -0500
Links: << >>  << T >>  << A >>

Here are some tips and two small patches for running ISE WebPACK-7.1i
on NetBSD using Linux emulation.  Xilinx is now supporting their free
ISE WebPACK-7.1i on Linux, however they are only supporting it on
Redhat Enterprise.  This information is for those who do not wish to
shell out a huge amount of money and sign restrictive contracts with
Redhat in order to use it.

These instructions are for NetBSD-2.x but a lot of the information
applies to Suse Linux as well since NetBSD currently uses a Suse-9.1
Linux base for their emulation environment.

----------------------------------------------------------------
 Xilinx ISE WebPACK 7.1i on NetBSD tips
----------------------------------------------------------------

NetBSD LINUX packages needed

suse-freetype2-9.1
suse-x11-9.1nb2
suse_base-9.1nb5
suse_expat-9.1nb1
suse_fontconfig-9.1
suse_openmotif-9.1nb1


Redhat or Suse LINUX packages needed      http://rpmfind.net 

libcurl3-7.14.0-2mdk.i586.rpm
libidn-0.3.7-62.i586.rpm
openssl-0.9.7b-74.i586.rpm
db41-4.1.25-72.i586.rpm

----------------------------------------------------------------

And you may need to create some sym-links
>> ln -s libcurl.so.3  /emul/linux/usr/lib/libcurl.so.2

Webpack uses netscape and acroread by default.  You can optionally
make the following sym-links to use konqueror and xpdf in their place.
>> ln -s /usr/pkg/bin/konqueror  /emul/linux/usr/bin/netscape
>> ln -s /usr/pkg/bin/xpdf  /emul/linux/usr/bin/acroread

unpack first shar like archive in your current directory
>> sh WebPACK_71i_installer.sh --keep

Copy the Linux libraries into place
>> cp ./wpdl_all_lin.build/platform/lin/bin/lin/* /emul/linux/usr/lib

>> cd ./wpdl_all_lin.build/platform/lin
and execute the attached setup.patch file to apply the patch to setup.

or you can manually edit ./wpdl_all_lin.build/platform/lin/setup  and
add the following:

    elif [ "$platform" = "NetBSD" ]
    then
            if [ -d "$setuploc/bin/lin" ]
            then
                    dir=$setuploc/bin/lin
            fi
    fi


Now run setup
>> ./wpdl_all_lin.build/platform/lin/setup

You will get this error message.  I don't know why yet but it seems to
work anyway, but with a long delay.

  Cannot register service: RPC: Authentication error; why = Client credential too weak
  unable to register (registryProg, registryVers, tcp)

Now you should see the Xilinx GUI install after a nasty delay.

For this example to work, be sure to accept the default installation
path of "/root/Xilinx" when prompted in the GUI.

After the GUI finishes installing, it will give an error that it could
not run the post install script, but it does not seem to be a show
stopper.

----------------------------------------------------------------

At this point the ISE environment should all be installed in
/emul/linux/root/Xilinx.

>> cd /emul/linux/root/Xilinx
and execute the attached settings.sh.patch file to apply the patch to
settings.sh.  This adds the Xilinx commmand path to settings.sh.

Setup your environment for Xilinx.
>> . /emul/linux/root/Xilinx/settings.sh

now change to your favorite project directory and run ise.
>> ise

You will get the following errors and a nasty delay, but it will come up.

  Cannot register service: RPC: Authentication error; why = Client credential too weak
  unable to register (registryProg, registryVers, tcp)
  Wind/U Error (248): Failed to connect to the registry on server netbsd.hightek.org
  Cannot register service: RPC: Authentication error; why = Client credential too weak
  OLE API Function OleInitialize is not currently implemented.  Further warnings will be suppressed

Have lotsa fun.  Don't forget to RTFM.  You will need it!! :-)

----------------------------------------------------------------



----------------------------------------------------------------
Other Issues
----------------------------------------------------------------

----------------------------------------------------------------
Files that need to be ported to NetBSD

shell script   /emul/linux/root/Xilinx/bin/lin/wdreg
shell script   /emul/linux/root/Xilinx/bin/lin/windu_client
shell script   /emul/linux/root/Xilinx/bin/lin/windu_registry

shell script   /emul/linux/root/Xilinx/bin/lin/update_drv
shell script   /emul/linux/root/Xilinx/bin/lin/wdreg windrvr6
shell script   /emul/linux/root/Xilinx/bin/lin/install_drv
shell script   /emul/linux/root/Xilinx/bin/lin/setup_pcusb

A lot of stuff, like CPLD, still stil works even though,

----------------------------------------------------------------
BUGS

  Cannot register service: RPC: Authentication error; why = Client credential too weak
  unable to register (registryProg, registryVers, tcp)
  Wind/U Error (248): Failed to connect to the registry on server netbsd.hightek.org
  Cannot register service: RPC: Authentication error; why = Client credential too weak
  OLE API Function OleInitialize is not currently implemented.  Further warnings will be suppressed

(has long delay but it runs anyway)


BUG HINTS    Seems to have something to do with

/tmp/windu/windu_registryd50
windu_registryd5
windu_clientd50

See the Wind/U manual for more details on the ".WindU" file and the "WINDU"

----------------------------------------------------------------
LINUX LIBS needed by WebPACK_71i

    libXp.so.6            suse_x11-9.1nb2.pkg
    libXt.so.6            suse_x11-9.1nb2.pkg
    libXmu.so.6           suse_x11-9.1nb2.pkg
    libX11.so.6           suse_x11-9.1nb2.pkg
    libXm.so.3            suse_openmotif-9.1nb1.pkg

    libcurl.so.2          libcurl3-7.14.0-2mdk.i586.rpm
    libssl.so.0.9.7       openssl-0.9.7b-74.i586.rpm
    libcrypto.so.0.9.7    openssl-0.9.7b-74.i586.rpm
    libidn.so.11          libidn-0.3.7-62.i586.rpm
    libdb-4.1.so          db41-4.1.25-72.i586.rpm

----------------------------------------------------------------


--
Chet Stemen
http://www.hightek.org



Article: 87742
Subject: Farrow filter VHDL implementation?
From: "Andrew Lohbihler" <andrewl@rogers.com>
Date: Fri, 29 Jul 2005 23:41:26 -0400
Links: << >>  << T >>  << A >>
Hi Group,

Does anyone know how to implement a Farrow FIR filter usng existing FIR 
cores, or whatever is available? The filter is similar to a standard FIR but 
includes a polynomial expansion with an offset parameter "d" raised to 
integer exponents like:

y(x+d) = a0 + a1*d + a2*d^2 + a3*d^3 + a4*d^4 + ...   alternatively 
expressed as:

y(x+d) = a0 + d*(a1 + d*(a2 + d*(a3 + d*(a4 + ...))))

I only need an expansion to fourth order but I need at least four channels 
of FIR processing using this filter. It would be nice to use a generic FIR 
filter core for this but I cannot find a way to include the geometric "d" 
parameter to get the desired output. I would think that this is easy to do, 
but the Xilinx references about Farrow filters don;t provide enough details 
to illustrate the implementation.

If anyone has more detail on this issue I would love to know.

Thanks
Andrew 



Article: 87743
Subject: Re: Xilinx ISE WebPACK-7.1i on NetBSD
From: Chet Stemen <newsposting1@crel.us>
Date: Sat, 30 Jul 2005 02:34:22 -0500
Links: << >>  << T >>  << A >>

Chet Stemen wrote:
>
> unpack first shar like archive in your current directory
>>> sh WebPACK_71i_installer.sh --keep

Correction:

This should be

unpack first shar like archive in your current directory
>> sh WebPACK_71_fcfull_i.sh --keep

That is the whole package.

WebPACK_71i_installer.sh is the installer only.

 
--
Chet Stemen
http://www.hightek.org


Article: 87744
Subject: Xilinx ISE WebPACK-7.1i on NetBSD
From: Chet Stemen <newsposting1@crel.us>
Date: Sat, 30 Jul 2005 03:25:37 -0500
Links: << >>  << T >>  << A >>

Here are some tips and two small patches for running ISE WebPACK-7.1i
on NetBSD using Linux emulation.  Xilinx is now supporting their free
ISE WebPACK-7.1i on Linux, however they are only supporting it on
Redhat Enterprise.  This information is for those who do not wish to
shell out a huge amount of money and sign restrictive contracts with
Redhat in order to use it.

These instructions are for NetBSD-2.x but a lot of the information
applies to Suse Linux as well since NetBSD currently uses a Suse-9.1
Linux base for their emulation environment.

----------------------------------------------------------------
 Xilinx ISE WebPACK 7.1i on NetBSD tips
----------------------------------------------------------------

NetBSD LINUX emulation packages needed

suse-freetype2-9.1.tgz
suse-x11-9.1nb2.tgz
suse_base-9.1nb5.tgz
suse_expat-9.1nb1.tgz
suse_fontconfig-9.1.tgz
suse_openmotif-9.1nb1.tgz


Redhat or Suse LINUX packages needed      http://rpmfind.net 

libcurl3-7.14.0-2mdk.i586.rpm
libidn-0.3.7-62.i586.rpm
openssl-0.9.7b-74.i586.rpm
db41-4.1.25-72.i586.rpm

----------------------------------------------------------------

And you may need to create some sym-links
>> ln -s libcurl.so.3  /emul/linux/usr/lib/libcurl.so.2

Webpack uses netscape and acroread by default.  You can optionally
make the following sym-links to use konqueror and xpdf in their place.
>> ln -s /usr/pkg/bin/konqueror  /emul/linux/usr/bin/netscape
>> ln -s /usr/pkg/bin/xpdf  /emul/linux/usr/bin/acroread

unpack first shar like archive in your current directory
>> sh WebPACK_71_fcfull_i.sh --keep    (this is the whole sys)

Copy the Linux libraries into place
>> cp ./wpdl_all_lin.build/platform/lin/bin/lin/* /emul/linux/usr/lib

>> cd ./wpdl_all_lin.build/platform/lin
and execute the attached setup.patch file to apply the patch to setup.

or you can manually edit ./wpdl_all_lin.build/platform/lin/setup  and
add the following:

    elif [ "$platform" = "NetBSD" ]
    then
            if [ -d "$setuploc/bin/lin" ]
            then
                    dir=$setuploc/bin/lin
            fi
    fi


Now run setup
>> ./wpdl_all_lin.build/platform/lin/setup

You will get this error message.  I don't know why yet but it seems to
work anyway, but with a long delay.

  Cannot register service: RPC: Authentication error; why = Client credential too weak
  unable to register (registryProg, registryVers, tcp)

Now you should see the Xilinx GUI install after a nasty delay.

For this example to work, be sure to accept the default installation
path of "/root/Xilinx" when prompted in the GUI.

After the GUI finishes installing, it will give an error that it could
not run the post install script, but it does not seem to be a show
stopper.

----------------------------------------------------------------

At this point the ISE environment should all be installed in
/emul/linux/root/Xilinx.

>> cd /emul/linux/root/Xilinx
and execute the attached settings.sh.patch file to apply the patch to
settings.sh.  This adds the Xilinx commmand path to settings.sh.

Setup your environment for Xilinx.
>> . /emul/linux/root/Xilinx/settings.sh

now change to your favorite project directory and run ise.
>> ise

You will get the following errors and a nasty delay, but it will come up.

  Cannot register service: RPC: Authentication error; why = Client credential too weak
  unable to register (registryProg, registryVers, tcp)
  Wind/U Error (248): Failed to connect to the registry on server netbsd.hightek.org
  Cannot register service: RPC: Authentication error; why = Client credential too weak
  OLE API Function OleInitialize is not currently implemented.  Further warnings will be suppressed

Have lotsa fun.  Don't forget to RTFM.  You will need it!! :-)

----------------------------------------------------------------



----------------------------------------------------------------
Other Issues
----------------------------------------------------------------

----------------------------------------------------------------
Files that need to be ported to NetBSD

shell script   /emul/linux/root/Xilinx/bin/lin/wdreg
shell script   /emul/linux/root/Xilinx/bin/lin/windu_client
shell script   /emul/linux/root/Xilinx/bin/lin/windu_registry

shell script   /emul/linux/root/Xilinx/bin/lin/update_drv
shell script   /emul/linux/root/Xilinx/bin/lin/wdreg windrvr6
shell script   /emul/linux/root/Xilinx/bin/lin/install_drv
shell script   /emul/linux/root/Xilinx/bin/lin/setup_pcusb

A lot of stuff, like CPLD, still stil works even though,

----------------------------------------------------------------
BUGS

  Cannot register service: RPC: Authentication error; why = Client credential too weak
  unable to register (registryProg, registryVers, tcp)
  Wind/U Error (248): Failed to connect to the registry on server netbsd.hightek.org
  Cannot register service: RPC: Authentication error; why = Client credential too weak
  OLE API Function OleInitialize is not currently implemented.  Further warnings will be suppressed

(has long delay but it runs anyway)


BUG HINTS    Seems to have something to do with

/tmp/windu/windu_registryd50
windu_registryd5
windu_clientd50

See the Wind/U manual for more details on the ".WindU" file and the "WINDU"

----------------------------------------------------------------
NetBSD LINUX emulation packages needed by WebPACK_71i

    libXp.so.6            suse_x11-9.1nb2.tgz
    libXt.so.6            suse_x11-9.1nb2.tgz
    libXmu.so.6           suse_x11-9.1nb2.tgz
    libX11.so.6           suse_x11-9.1nb2.tgz
    libXm.so.3            suse_openmotif-9.1nb1.tgz

LINUX LIBS needed by WebPACK_71i

    libcurl.so.2          libcurl3-7.14.0-2mdk.i586.rpm
    libssl.so.0.9.7       openssl-0.9.7b-74.i586.rpm
    libcrypto.so.0.9.7    openssl-0.9.7b-74.i586.rpm
    libidn.so.11          libidn-0.3.7-62.i586.rpm
    libdb-4.1.so          db41-4.1.25-72.i586.rpm

----------------------------------------------------------------


--
Chet Stemen
http://www.hightek.org



Article: 87745
Subject: About post synthesize
From: "vssumesh" <vssumesh_asic@yahoo.com>
Date: 30 Jul 2005 04:36:48 -0700
Links: << >>  << T >>  << A >>
hello all,
  I just want to test my new HDL model it passed the simulation
testings. but unfortunately my fpga board is damaged and is in repair
stage. Can id do the the timing test with the netlist file. I am
proceeding in the following way.
1. generate a verilog netlist from the symplify.
2. test it in the modelsim with the same test benches i used in the
simulation.
3. check for any malfunction.

is this method is correct or industry standarad ??? requesting your
comments on this.
regards sumesh


Article: 87746
Subject: Re: Triggering and reseting FF
From: "vssumesh" <vssumesh_asic@yahoo.com>
Date: 30 Jul 2005 04:42:54 -0700
Links: << >>  << T >>  << A >>
hi Vladislav,
 very sorry for not responding to your suggestions. it worked just
fine. thank you very much for that. Actualy it was my mistake. thank
you once again.
regrds sumesh


Article: 87747
Subject: ISE webpack doesnt support Spartan xcs10, solution??
From: googlinggoogler@hotmail.com
Date: 30 Jul 2005 06:16:22 -0700
Links: << >>  << T >>  << A >>
Hiya,

Foolishly I developed a board for a spartan 3 xcs10, without finding
suitable development enviroment, assuming that the free ISE Webpack
would be suitable - just found out now i've gone to fire my board up
and program it that I can't...

Can anyone suggest a free solution to this? I'm a newbie and would like
to use VHDL on this board, Ive built a JTAG cable to use with the
parrallel port that is to Xilinx specification.

Yours gratefully

Dave


Article: 87748
Subject: Re: [JTAG] How to force a FPGA to reprogram itself from a prom with JTAG ?
From: "Kissingers" <mailwz@263.net>
Date: Sat, 30 Jul 2005 21:35:44 +0800
Links: << >>  << T >>  << A >>
Good!
"MM" <mbmsv@yahoo.com> 写入消息新闻:3kspnkFvdd0qU1@individual.net...
> "Antti Lukats" <antti@openchip.org> wrote in message
> news:dc87bd$knm$03$1@news.t-online.com...
>>
>> they are NOT, available are only IEEE1532 files for XCFxxS not for XCFxxP
> !!
>
> OK, I see now what you mean. I assumed there was only one BSDL standard. 
> Can
> you please explain what this IEEE1532 is all about compared to "regular" 
> bsd
> files?
>
>
> Thanks,
> /Mikhail
>
> 



Article: 87749
Subject: Re: ISE webpack doesnt support Spartan xcs10, solution??
From: "John Adair" <removethisthenleavejea@replacewithcompanyname.co.uk>
Date: Sat, 30 Jul 2005 15:58:25 +0100
Links: << >>  << T >>  << A >>
Might help if you give us all the full part number. If you are using 
XC3S1000 or XC3S100E then you should have support. Support list here 
http://www.xilinx.com/ise/products/webpack_config.htm for the latest version 
of webpack. If you have an old version then these will not be supported.

If you are having problems actually at the JTAG programming stage and have 
actually synthesised , mapped, p&r ok then more likely you have a problem 
with your cable implementation or your design implementation.

John Adair
Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development 
Board.
http://www.enterpoint.co.uk


<googlinggoogler@hotmail.com> wrote in message 
news:1122729382.393080.195750@g14g2000cwa.googlegroups.com...
> Hiya,
>
> Foolishly I developed a board for a spartan 3 xcs10, without finding
> suitable development enviroment, assuming that the free ISE Webpack
> would be suitable - just found out now i've gone to fire my board up
> and program it that I can't...
>
> Can anyone suggest a free solution to this? I'm a newbie and would like
> to use VHDL on this board, Ive built a JTAG cable to use with the
> parrallel port that is to Xilinx specification.
>
> Yours gratefully
>
> Dave
> 





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