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On May 1, 1:33 pm, Petter Gustad <newsmailco...@gustad.com> wrote: > Andy <jonesa...@comcast.net> writes: > > Unless you are prototyping an ASIC (and want portability of the code > > to ASIC tools), I would not recommend Synopsys for FPGA synthesis. > > Which tool are you talking about? DC, FPGA Compiler, FPGA Compiler II, > or DC-FPGA? The latest Synopsys tool in the FPGA-camp was DC-FPGA, but > they terminated the product long time ago. A bit pity I think because > it was great to have an ASIC flow acompatible FPGA synthesis tool. > > Petter > -- > A: Because it messes up the order in which people normally read text. > Q: Why is top-posting such a bad thing? > A: Top-posting. > Q: What is the most annoying thing on usenet and in e-mail? The last time I tried (i.e. was told) to use it was a couple of years ago (dc-fpga). Good riddance, as far as I'm concerned. Thanks, AndyArticle: 118651
On 29 Apr, 19:32, Anson.Stugg...@gmail.com wrote: > I'm designing a debounce filter using Finite State Machine. The FSM > behavior is it follows the inital input bit and thinks that's real > output until it receives 3 consecutive same bits and it changes output > to that 3 consecutive bit until next 3 consecutive bits are received. > A reset will set the FSM to output 1s until it receives the correct > input and ouput. > > This is the test sequence with input and correct output. > > 1 0 0 1 0 1 0 0 0 1 0 1 1 1 (input) > 1 1 1 1 1 1 1 1 0 0 0 0 0 1 (output) > > The state diagram I came up has 6 states and it's named SEE1, SEE11, > SEE111, SEE0, SEE00, SEE000. I am getting stuck at 11th bit, a 0 in > the input. Because it just came from SEE1 and before SEE1, it came > from SEE000, so at SEE1 it can not change ouput to 1 which is what I > have specified that state's ouput to be. > > Anyone knows how to solve this problem? Or maybe there's other better > ways to design the state diagram? > > Thanks, > > Anson This debounce idea is terrible. Straight away you have aliasing problems not to mention arbitrary latency. The simple thing to do is detect an edge by e.g. edge driven interrupt and then fire the output state immediately according to the edge direction and start your one-shot debounce-duration timer that inhibits the interrupt until it times outs. Now you have instant "analogue" style response and you can reduce the duration until bouncing happens and then back it off by a safety margin. Cheers RobinArticle: 118652
Robin wrote: > This debounce idea is terrible. Straight away you have aliasing > problems not to mention arbitrary latency. For many debounce situations, latency is no problem at all. What may be more important is to ignore narrow pulses that represent static discharges or other noise coupled into the input. Instant reaction is not always a good thing. Have you ever had to pass a static discharge test on a key pad? (snip)Article: 118653
On May 1, 11:16 am, austin <aus...@xilinx.com> wrote: > Weng, > > If you need spice models for devices, contact your local semiconductor > fabrication house (Chartered, UMC, TSMC, etc..) and request the models > for the technology node you are interested in. > > Choices are typically: low power, or high performance (high Vt, low Vt); > 130nm, 90nm (the min gate length), and so on. > > Generally speaking, these models (which are used by IC designers) are > kept under very strict non-disclosure for new technology nodes. > > Depending on how advanced the models are, BSIM 4, or BSIM 4.5 spice > models are the "best" right now, and many are good to use in RF analog > circuits, and have proximity effects, NBTI, and other real world > behaviors modeled, too. > > Austin > > > > Weng Tianxiang wrote: > > Hi, > > Please help. > > > Where can I find the pass transistor's working curve under 1.2V that > > is widely used in IC design preferebly in any articles, instead of in > > books? > > > Thank you. > > > Weng- Hide quoted text - > > - Show quoted text - Hi Austin, Actually what I need is not a precise latest pass transistor working curve. I thought it were available somewhere such that I has requested the latest version. What I really need is a typical V-I or V-V working curve of any typical pass transistor to learn some basic, not sophisticated characteristics. I think it should be availble somewhere and not a commercial secret. Because I think pass transistors are one of the most basic elements in IC industry and it should be included in any IC textbooks. I don't know which textbook contains the latest information about it. Thank you. WengArticle: 118654
On Tue, 01 May 2007 18:35:18 -0400, John Popelish <jpopelish@rica.net> wrote: >Robin wrote: > >> This debounce idea is terrible. Straight away you have aliasing >> problems not to mention arbitrary latency. > >For many debounce situations, latency is no problem at all. > What may be more important is to ignore narrow pulses that >represent static discharges or other noise coupled into the >input. Instant reaction is not always a good thing. Have >you ever had to pass a static discharge test on a key pad? > >(snip) If esd is not an issue, debouncing can be just running the switch level through a d-flop that's clocked at, say, 20 Hz. And if the switch is going into an embedded processor or equivalent, don't even do that: just check it 20 times a second. If esd is an issue, you may need a real r-c before you hit any semiconductors. So do the r-c, then the stuff above. JohnArticle: 118655
On 2007-05-01, CBFalconer <cbfalconer@yahoo.com> wrote: > petrus bitbyter wrote: >> > ... snip ... >> +--+ >> 0| | >> | v >> .------. >> | 000 |----------+ >> +--------->| 100 | | >> | | |<------+ | >> |0 '------' | |1 >> | ^ 0| | >> | | | v >> .------. |0 .------. >> | | | | | >> | 101 | | | 001 | >> | |---------+ | | | >> '------' | | '------' >> ^ | | | >> | | | |1 >> |0 | | | >> | | | v >> .------. | | .------. >> | | | +-------| | >> | 111 | | | 011 | >> | | | | | >> '------' 1| '------' >> ^ | | | >> | | v | >> 0| |1 .------. |1 >> | +-------->| | | >> | | 110 |<------+ >> +------------| 010 | >> '------' >> | ^ >> 1| | >> +--+ > > Obviously wrong. what's wrong with it? the labels on the states seem odd, but if you do this: initial state 010 state output. 000,001,011,100 0 110,010,111,101 1 it behaves as requested, Bye. JasenArticle: 118656
"Robin" <robin.pain@tesco.net> schreef in bericht news:1178058355.292440.275760@l77g2000hsb.googlegroups.com... > On 29 Apr, 19:32, Anson.Stugg...@gmail.com wrote: >> I'm designing a debounce filter using Finite State Machine. The FSM >> behavior is it follows the inital input bit and thinks that's real >> output until it receives 3 consecutive same bits and it changes output >> to that 3 consecutive bit until next 3 consecutive bits are received. >> A reset will set the FSM to output 1s until it receives the correct >> input and ouput. >> >> This is the test sequence with input and correct output. >> >> 1 0 0 1 0 1 0 0 0 1 0 1 1 1 (input) >> 1 1 1 1 1 1 1 1 0 0 0 0 0 1 (output) >> >> The state diagram I came up has 6 states and it's named SEE1, SEE11, >> SEE111, SEE0, SEE00, SEE000. I am getting stuck at 11th bit, a 0 in >> the input. Because it just came from SEE1 and before SEE1, it came >> from SEE000, so at SEE1 it can not change ouput to 1 which is what I >> have specified that state's ouput to be. >> >> Anyone knows how to solve this problem? Or maybe there's other better >> ways to design the state diagram? >> >> Thanks, >> >> Anson > > This debounce idea is terrible. Straight away you have aliasing > problems not to mention arbitrary latency. > > The simple thing to do is detect an edge by e.g. edge driven interrupt > and then fire the output state immediately according to the edge > direction and start your one-shot debounce-duration timer that > inhibits the interrupt until it times outs. > > Now you have instant "analogue" style response and you can reduce the > duration until bouncing happens and then back it off by a safety > margin. > > Cheers > Robin > As so often, it depends. Ever met some "designers" having terrible problems with the start button of their coffee machine. It made the coffee well enough but started too often spontanuously. They connected the button to the only interrupt line of their micro. The interrupt routine started the proces on the first edge detected. Being mainly (C)programmers, it took some time to convince them that false starts may occur due to interferences made by the environment, even if you do not notice them yourself. But they did understand that humans would not complain when the coffee maker started some milliseconds later so they build in some delay and checked again. (IMHO a typical example of too strict a separation of hard- and softwaredesign.) petrus bitbyterArticle: 118657
So repeated requests to redirect this discussion away from
comp.lang.c, where it's completely off-topic, have not worked. Does
anybody have any suggestions for what *would* work?
--
Keith Thompson (The_Other_Keith) kst-u@mib.org <http://www.ghoti.net/~kst>
San Diego Supercomputer Center <*> <http://users.sdsc.edu/~kst>
"We must do something. This is something. Therefore, we must do this."
-- Antony Jay and Jonathan Lynn, "Yes Minister"
Article: 118658On Wed, 2 May 2007 01:25:29 +0200, "petrus bitbyter" <pieterkraltlaatditweg@enditookhccnet.nl> wrote: > >"Robin" <robin.pain@tesco.net> schreef in bericht >news:1178058355.292440.275760@l77g2000hsb.googlegroups.com... >> On 29 Apr, 19:32, Anson.Stugg...@gmail.com wrote: >>> I'm designing a debounce filter using Finite State Machine. The FSM >>> behavior is it follows the inital input bit and thinks that's real >>> output until it receives 3 consecutive same bits and it changes output >>> to that 3 consecutive bit until next 3 consecutive bits are received. >>> A reset will set the FSM to output 1s until it receives the correct >>> input and ouput. >>> >>> This is the test sequence with input and correct output. >>> >>> 1 0 0 1 0 1 0 0 0 1 0 1 1 1 (input) >>> 1 1 1 1 1 1 1 1 0 0 0 0 0 1 (output) >>> >>> The state diagram I came up has 6 states and it's named SEE1, SEE11, >>> SEE111, SEE0, SEE00, SEE000. I am getting stuck at 11th bit, a 0 in >>> the input. Because it just came from SEE1 and before SEE1, it came >>> from SEE000, so at SEE1 it can not change ouput to 1 which is what I >>> have specified that state's ouput to be. >>> >>> Anyone knows how to solve this problem? Or maybe there's other better >>> ways to design the state diagram? >>> >>> Thanks, >>> >>> Anson >> >> This debounce idea is terrible. Straight away you have aliasing >> problems not to mention arbitrary latency. >> >> The simple thing to do is detect an edge by e.g. edge driven interrupt >> and then fire the output state immediately according to the edge >> direction and start your one-shot debounce-duration timer that >> inhibits the interrupt until it times outs. >> >> Now you have instant "analogue" style response and you can reduce the >> duration until bouncing happens and then back it off by a safety >> margin. >> >> Cheers >> Robin >> > >As so often, it depends. Ever met some "designers" having terrible problems >with the start button of their coffee machine. It made the coffee well >enough but started too often spontanuously. They connected the button to the >only interrupt line of their micro. The interrupt routine started the proces >on the first edge detected. Being mainly (C)programmers, it took some time >to convince them that false starts may occur due to interferences made by >the environment, even if you do not notice them yourself. But they did >understand that humans would not complain when the coffee maker started some >milliseconds later so they build in some delay and checked again. (IMHO a >typical example of too strict a separation of hard- and softwaredesign.) > >petrus bitbyter > > > Interrupts are evil. They should have used a state machine that ran, say, 5 times a second and checked the switch state. JohnArticle: 118659
On Tue, 01 May 2007 17:29:11 -0700, Keith Thompson <kst-u@mib.org> wrote: >So repeated requests to redirect this discussion away from >comp.lang.c, where it's completely off-topic, have not worked. Does >anybody have any suggestions for what *would* work? Programming embedded systems, things that interface to the real world, are off-topic to c programmers? Why am I not surprised? JohnArticle: 118660
Keith Thompson wrote:
>
> So repeated requests to redirect this discussion away from
> comp.lang.c, where it's completely off-topic, have not worked. Does
> anybody have any suggestions for what *would* work?
Set follow-ups.
--
<http://www.cs.auckland.ac.nz/~pgut001/pubs/vista_cost.txt>
<http://www.securityfocus.com/columnists/423>
<http://www.aaxnet.com/editor/edit043.html>
<http://kadaitcha.cx/vista/dogsbreakfast/index.html>
cbfalconer at maineline dot net
--
Posted via a free Usenet account from http://www.teranews.com
Article: 118661Weng, Any mosfet model should be adequate for what you need. There is no difference between a "pass transistor" model, and any other kind of spice mosfet model. AustinArticle: 118662
On May 1, 6:32 pm, austin <aus...@xilinx.com> wrote: > Weng, > > Any mosfet model should be adequate for what you need. > > There is no difference between a "pass transistor" model, and any other > kind of spice mosfet model. > > Austin Hi Austin, Do you have any idea where I can get a graph of it? I just want the graph showing the relationship between input and output. Thank you. WengArticle: 118663
CBFalconer <cbfalconer@yahoo.com> writes:
> Keith Thompson wrote:
>>
>> So repeated requests to redirect this discussion away from
>> comp.lang.c, where it's completely off-topic, have not worked. Does
>> anybody have any suggestions for what *would* work?
>
> Set follow-ups.
I did, but it didn't do any good. I could only set followups in my
own followup; other direct replies to the original message retained
the full cross-posting.
--
Keith Thompson (The_Other_Keith) kst-u@mib.org <http://www.ghoti.net/~kst>
San Diego Supercomputer Center <*> <http://users.sdsc.edu/~kst>
"We must do something. This is something. Therefore, we must do this."
-- Antony Jay and Jonathan Lynn, "Yes Minister"
Article: 118664
John Larkin <jjlarkin@highNOTlandTHIStechnologyPART.com> writes:
> On Tue, 01 May 2007 17:29:11 -0700, Keith Thompson <kst-u@mib.org>
> wrote:
>
>>So repeated requests to redirect this discussion away from
>>comp.lang.c, where it's completely off-topic, have not worked. Does
>>anybody have any suggestions for what *would* work?
>
> Programming embedded systems, things that interface to the real world,
> are off-topic to c programmers? Why am I not surprised?
Questions which have nothing to do with programming in C are off-topic
in comp.lang.c. (If the original poster had asked for a C solution,
it might have been different, but I don't think I've seen a single
line of C source code in this thread.)
I'm getting the impression that once someone posts an inappropriately
cross-posted discussion, there's just no way to keep it from
continuing on all the newsgroups to which it was originally posted,
because most people posting followups just don't pay attention to the
Newsgroups: header. Oh, well.
--
Keith Thompson (The_Other_Keith) kst-u@mib.org <http://www.ghoti.net/~kst>
San Diego Supercomputer Center <*> <http://users.sdsc.edu/~kst>
"We must do something. This is something. Therefore, we must do this."
-- Antony Jay and Jonathan Lynn, "Yes Minister"
Article: 118665
On Apr 26, 10:27 am, zibix...@yahoo.com wrote:
> Ive got differential signal ALE (composed from ALE_P and ALE_N) like
> in attached vhdl entity:
>
> entity top is
> PORT(
> ALE_p, ALE_n : IN std_logic
> );
> end top;
>
> Could anybody tell me how in synplify constraint (sdc) assign
> differential pins to this signals for altera stratix 2 device?
>
> Is such assignment valid for Synplify: define_attribute {ALE}
> altera_chip_pin_lc {{AA3 AA4}}
> ??? (lets assume that AA3 and AA4 are differential pair pins)
The easiest method is to change your entity declaration to be single-
ended, and then assign a differential I/O standard to the input. You
can assign the I/O standard in the Synplify constraint (sdc) file (but
I don't recall the exact syntax), or in the Quartus assignment editor
GUI, or with a Quartus Tcl command. So your entity declaration
becomes:
entity top is
PORT(
ALE_p : IN std_logic
);
end top;
Use altera_chip_pin_lc to assign the positive input pin to wherever
you would like, and Quartus will automatically create and place the
negative pin in the appropriate (paired) I/O slot.
For Stratix III and Cyclone III there is an alternative method if you
prefer. For those devices, you can instantiate a differential
primitive, and then assign the positive and negative pin to I/O
locations yourself. This doesn't really provide extra flexibility vs.
the above approach though, since the (+ve, -ve) I/O pairs are
predefined, so once you assign either the positive or negative pin
location, there is no choice as to where to put the other one.
Regards,
Vaughn Betz
Altera
Article: 118666Keith Thompson wrote: > CBFalconer <cbfalconer@yahoo.com> writes: > >>Keith Thompson wrote: >> >>>So repeated requests to redirect this discussion away from >>>comp.lang.c, where it's completely off-topic, have not worked. Does >>>anybody have any suggestions for what *would* work? >> >>Set follow-ups. > > > I did, but it didn't do any good. I could only set followups in my > own followup; other direct replies to the original message retained > the full cross-posting. Err - not on this one, it seems ? -jgArticle: 118667
[f-ups to clc]
Keith Thompson <k...@mib.org> wrote:
> John Larkin <jjlar...@highNOTlandTHIStechnologyPART.com> writes:
> > Keith Thompson <k...@mib.org> wrote:
> > > So repeated requests to redirect this discussion away
> > > from comp.lang.c, where it's completely off-topic, have
> > > not worked. Does anybody have any suggestions for what
> > > *would* work?
Other than what you've done, no. Although you could probably
try to _make_ it topical. That way, an otherwise noisy thread
may at least have some merit.
> > Programming embedded systems, things that interface to the
> > real world, are off-topic to c programmers? Why am I not
> > surprised?
>
> Questions which have nothing to do with programming in C are
> off-topic in comp.lang.c. (If the original poster had asked
> for a C solution, it might have been different, but I don't
> think I've seen a single line of C source code in this thread.)
Well, let's post some... [both single bit in - single bit out]
/* crude state machine */
int debounce(int in)
{
static enum { sxx, s00, s01, s11, s10 } state = sxx;
static struct { unsigned char out; unsigned char next; }
fsm[][2] =
{ /* 0 */ /* 1 */
/* sxx */ { { 0, s00 }, { 1, s11 } },
/* s00 */ { { 0, s00 }, { 0, s01 } },
/* s01 */ { { 0, s00 }, { 0, sxx } },
/* s11 */ { { 1, s10 }, { 1, s11 } },
/* s10 */ { { 1, sxx }, { 1, s11 } }
};
int out = fsm[state][in].out;
state = fsm[state][in].next;
return out;
}
/* shift register */
int debounce(int in)
{
static unsigned char reg = 3;
static unsigned char out = 0;
reg = ((reg << 1) | in) & 7;
if (reg == 0 || reg == 7) out = reg & 1;
return out;
}
--
Peter
Article: 118668
Jim Granville <no.spam@designtools.maps.co.nz> writes:
> Keith Thompson wrote:
>> CBFalconer <cbfalconer@yahoo.com> writes:
>>
>>>Keith Thompson wrote:
>>>
>>>>So repeated requests to redirect this discussion away from
>>>>comp.lang.c, where it's completely off-topic, have not worked. Does
>>>>anybody have any suggestions for what *would* work?
>>>
>>>Set follow-ups.
>> I did, but it didn't do any good. I could only set followups in my
>> own followup; other direct replies to the original message retained
>> the full cross-posting.
>
> Err - not on this one, it seems ?
No, not on this one. In my initial message, I redirected followups in
an attempt to divert the discussion away from comp.lang.c. In my
later message, I was trying to find out why that didn't work and what
might work instead, so I didn't bother redirecting followups.
--
Keith Thompson (The_Other_Keith) kst-u@mib.org <http://www.ghoti.net/~kst>
San Diego Supercomputer Center <*> <http://users.sdsc.edu/~kst>
"We must do something. This is something. Therefore, we must do this."
-- Antony Jay and Jonathan Lynn, "Yes Minister"
Article: 118669<rponsard@gmail.com> wrote in message news:1177963764.891437.228400@c35g2000hsg.googlegroups.com... > there is one example in sdram directory of s3ask_test design (follow > 3A reference design in xilinx web site), but this is only an > implementation of the DDR2 testbench ; the one that is generated with > mig 1.7. (a led blink if memory fails) > > > In mig user guide ug086, there is a brief explanation of the design ; > and I am too new to design to use it without tb (i.e. read / write > example from fpga with picoblaze would be a must...) ; if you can > help, I will apperciate. > > I got 3 starter kit 3A from avnet in less than 1,5 week > Mine took about the same time from Avnet Australia. The canned examples are rather lacking at the moment. http://www.xilinx.com/products/boards/s3astarter/reference_designs.htm A couple of microblaze examples would be nice :-) Shouldn't take to much time to port the 3e examples. Getting the time to even look at the board is the problem for me. http://www.xilinx.com/products/boards/s3estarter/reference_designs.htm AlexArticle: 118670
On 2007-05-01, Manny <mloulah@hotmail.com> wrote: > Hi, > > My question is straight'n'simple: what's the *most efficient* way of > reading a 64-bit value from a slave PLB peripheral in software? Is > there any *weird* behaviour I should be made aware of when I read 32- > bit value instead? > > In principle, PLB should be able to handle 64-bit transaction but not > PPC software of course. Is there anyway to map this transaction to a > consecutive pair of PPC software registers? I haven't messed about with the PLB bus lately, but I would look at the "PowerPC Processor Reference Guide" and the description of the CCR0 register. There is a bit named LWL - "Load Word as Line" which you might be interested in. Perhaps that could be useful for you. I would also take a look at the lmw instruction (load multiple words) which might also be useful. Anyway, just a few pointers, I haven't verified that you will actually be helped by this. /AndreasArticle: 118671
On May 1, 4:21 am, "Symon" <symon_bre...@hotmail.com> wrote: > I don't understand how they manage to write stuff that crashes other apps. I > run? And why don't they do regression testing.http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountry... > just bit me. "This problem is a regression from version 8.2i SP2". As software continues to grow in size and complexity, and budgets are shrinking to support only critical customer needs and new hardware revs, it soon takes a community to develop leading software that was formally tightly held by close knit company "families". The real success of open source, has been this partnership where industry co-partners with user communities, buy providing salaries to their employees in support of such open source products to benefit the corporation (and their customers) with share development of tools and systems. The success of open source operating systems and software development tools, is that they are heavily staffed by corporate software teams, and get paid, for leading and supporting an open source replacement for formally proprietary solutions. Paid staff, plus volunteer developers, as a team will always out proform an understaffed internal team .... better designs, better code, better testing, better customer experiences.Article: 118672
Starting a new design using both V2P and V5. I see with concern that the latest Xilinx tools might have issues. We need to upgrade as the candidate development machine is running 6.2-something (don't laugh, it works fine and it hasn't broken any designs). What's the current recommendation? Can one even get a prior version that doesn't have a personality? Time to talk to an FAE, I guess. -MartinArticle: 118673
martin+x@y.z wrote: > Starting a new design using both V2P and V5. I see with concern that > the latest Xilinx tools might have issues. We need to upgrade as the > candidate development machine is running 6.2-something (don't laugh, > it works fine and it hasn't broken any designs). > > What's the current recommendation? Can one even get a prior version > that doesn't have a personality? Time to talk to an FAE, I guess. > > -Martin Every version has a personality. If you're starting a new design, I'd suggest starting with the most recent tool version and discovering the personality as you go along. When new tool versions come along, you can find out if your design "breaks." But for now, your design won't break if it's a fresh design; you may have troubles but that's the case with just about any version. I don't get into the high end parts or EDK. My experiences have been rather positive with the Xilinx tools where I typically use the GUI flow. Some things may be awkward - like the easily corrupted .ise project file - but reasonably stable. - John_HArticle: 118674
Hi everybody, My question concerns DCI and temperature. If the temperature of the chip changes considarably between the end of the init process and the normal functionning, is it a good idea to instantiate the DCIRESET and reset the DCI after some time after the init? does it help to increase the data window? Mehdi
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