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>I have submitted this idea (at least 1 DCM with pins for crystal) many >years ago. I assume Xilinx marketing is smart enough to analyze the tradeoffs. I remember being grumpy that the 2 special IOBs on the 3000 series chips were slightly different. I don't remember the details, it was probably something like slightly slower or a few extra pF. It wasn't a big deal, at least most of the time, but it was one more thing you had to keep in mind. Southbridge chips often contain the RTC and whatever it takes to drive a 32 KHz crystal. I haven't looked carefully, but I haven't seen one that includes the magic PLL clock generator stuff. That seems like a very tempting target for high volume cost sensitive applications so I assume there is a good reason they don't do it. -- These are my opinions, not necessarily my employer's. I hate spam.Article: 124651
On 29 Sep., 09:29, hal-use...@ip-64-139-1-69.sjc.megapath.net (Hal Murray) wrote: > >I have submitted this idea (at least 1 DCM with pins for crystal) many > >years ago. > > I assume Xilinx marketing is smart enough to analyze the tradeoffs. > > I remember being grumpy that the 2 special IOBs on the 3000 series > chips were slightly different. I don't remember the details, it > was probably something like slightly slower or a few extra pF. > It wasn't a big deal, at least most of the time, but it was > one more thing you had to keep in mind. > > Southbridge chips often contain the RTC and whatever it takes > to drive a 32 KHz crystal. I haven't looked carefully, but I > haven't seen one that includes the magic PLL clock generator > stuff. That seems like a very tempting target for high volume > cost sensitive applications so I assume there is a good reason > they don't do it. > > -- well, is that the same reason why Actel _INCLUDED_ oscillator in the Fusion :) ? AnttiArticle: 124652
On 29 Sep., 04:49, Peter Alfke <al...@sbcglobal.net> wrote: > On Sep 28, 5:05 pm, John Adair <g...@enterpoint.co.uk> wrote:> Austin > > > Might be worth making the suggestion to your sister grouping of GPD of > > adding a dedicated oscillator crcuit to their range of products. Given > > a lot of micros do that already there would be some logic in adding > > such a circuit in the future to the low cost sector FPGA families. > > John, "been there, done that". > XC3000 used to have a single-stage dedicated inverter, exactly for > that purpose. It caused us a lot of support grief. Between 32 kHz and > 100 MHz, there is a big variation in xtals, and there also was a > sensitivity to Vcc ramp-up rate. Nobody wants a circuit to work "most > of the time". > I also remember that many of the Intel mask revisions of the 8051 were > oscillator-related. (We second-sourced that at AMD) > My advice has always been: spend a few pennies on an oscillator > circuit made by specialists for a special purpose. And definitely do > not abuse a multi-stage I/O circuit to be the xtal inverter circuit. > Far too much gain and uncontrolled phase changes at very high > frequencies. > Peter Alfke a few pennies? FPGA prices start from 2 USD, so extra 20 penny for the oscillator is over 10% of the FPGA cost. there is magic thing called specification: if the oscillator would work reliable with 10 to 100MHz range then its sufficient to include that in the spec, and no-one would expect it to work with 32khz adding 32khz support would require 1 extra config bit to select LP vs HS oscillator, very similar to fuse options by Atmel flash MCUs. sure its additional engineering but.. MANY MANY MCU companies are including this option, and it is working and doable. I cant imaging it would not have been possible to test it without extra mask cost to xilinx, by addint 2 test pins during say V-4 initial testing. how many mask revisions was made? if the osc circuit would have been included xilinx would have plenty of time (mask revisions) to fine tune it. and in the case of failure those 2 magic pins would have "reserved" or GND marking in final datasheet. simple. just a matter of decision. AnttiArticle: 124653
On 29 Sep., 03:23, Jecel <je...@merlintec.com> wrote: > On Sep 28, 3:03 pm, Antti wrote: > > > VGA is much simpler then color NTSC/PAL ;) > > > R-2R is an option of course, but i would rather use 2 resistors then > > the R-2R network > > Here is what my experiments with four resistors looked like (the > camera wasn't a good one - the image was nicer live): > > http://www.merlintec.com:8080/hardware/uploads/14/oliver7a.jpg > > -- Jecel Hi hm, i browsed your website and found interesting things :) and hints for more interesting thing without download links :( hm by 4 resistor you mean 4 bit 2N DA stage or something else on the test PCB I included 5 bit R-2R network, that could be little better then 4 resistors, but if delta sigma with high clock gives nice results I would go with it, or then 4 R version ;) Antti ah, the results of the 2 resistor PWM greyscale also look better on TV set then on usb capture device. the 16 grey bars are all visible nicely.Article: 124654
Is it possible for a hobbiest to obtain the board for USD 300? Any downside getting this board? Regards, JohnArticle: 124655
Peter Alfke <alfke@sbcglobal.net> wrote: >On Sep 28, 5:05 pm, John Adair <g...@enterpoint.co.uk> wrote: >> Austin >> >> Might be worth making the suggestion to your sister grouping of GPD of >> adding a dedicated oscillator crcuit to their range of products. Given >> a lot of micros do that already there would be some logic in adding >> such a circuit in the future to the low cost sector FPGA families. >> >John, "been there, done that". >XC3000 used to have a single-stage dedicated inverter, exactly for >that purpose. It caused us a lot of support grief. Between 32 kHz and >100 MHz, there is a big variation in xtals, and there also was a >sensitivity to Vcc ramp-up rate. Nobody wants a circuit to work "most >of the time". >I also remember that many of the Intel mask revisions of the 8051 were >oscillator-related. (We second-sourced that at AMD) >My advice has always been: spend a few pennies on an oscillator >circuit made by specialists for a special purpose. And definitely do Xilinx could buy such a circuit as IP and integrate it. The parts containing non-volatile configuration memory would benefit greatly and could potentially replace microcontrollers. A PLL would even be better and also reduces the range of crystal frequencies that need to be supported. 4MHz to 16MHz would be enough. -- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nlArticle: 124656
hal-usenet@ip-64-139-1-69.sjc.megapath.net (Hal Murray) wrote: > >>Well, no. Back when I was quite a bit younger, I tried to build a stable >>oscillator with a unused gate on a TTL 7414, with is an inverter with >>hysteresis. Tried all sorts of values of capacitors and resisters, and the >>best I was able to do was to usually generate the third harmonic. >>Sometimes the fifth, sometimes some other multiple of the crystal >>frequency, sometimes not a stable frequency, and sometimes even the >>frequency of the crystal. Switched to using a 7404, a plain inverter, and >>then making a stable oscillator was easy. > >Did you put it into production and ship a million of them? > > >They used to make 74U04, U for unbuffered. It was intended for >hacks like this. IIRC the '04 series are designed to be used as an oscillator. I remember some IC designer complaining that he had a hard time getting the re-design of a '04 right (usefull as an oscillator) in a fast process. -- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nlArticle: 124657
On Sep 22, 10:49 pm, "John Retta" <jre...@rtc-inc.com> wrote: > I bought a laptop with Microsoft Vista Home, > installed Modelsim PE 6.3a , and ran without > problem. In your experience would you recommend running EDA Tools under Vista? Or would you recommend XP/Linux? Regards Prince -- http://dyumnin.com/ > > -- > Regards, > John Retta > Owner and Designer > Retta Technical Consulting Inc. > > email : jre...@rtc-inc.com > web : www.rtc-inc.com > > "Helpme" <hel...@nowhere.net> wrote in message > > news:eUbJi.28321$eY.3105@newssvr13.news.prodigy.net... > > > Xilinx's ISE 9.2 now supports Windows Vista (32-bit only.) > > > Do other tools like (Mentor Modelsim and Xilinx XPS/EDK) run under Windows > > Vista?Article: 124658
On Sep 25, 6:51 pm, drop...@gmail.com wrote: > Just interesting, how often some company is able to develope their own > RISC soft-core processor for their needs, without any need to publish > that fact or reveal any details? Buying a core from a third-party has some advantages. 1) not too expensive 2) they usually come with development environment 3) you get (what is expected to be) well tested core ready to apply If You intend to use the CPU of yours in many projects then it makes more sense to make your own. Just my 2 eurocents.Article: 124659
I can't speak about obtaining the board, but it is a very good board with few negatives. However, bare in mind that the free webpack will not program the xc2vp30 on the board. (At least WebPack 9.1 won't.) So that may mean $2,400 in tool costs. Stephen On Sep 29, 5:07 am, johnzulu[at]yahoo.com wrote: > Is it possible for a hobbiest to obtain the board for USD 300? Any > downside getting this board? > > Regards, > JohnArticle: 124660
On Sep 28, 7:13 pm, Matthew Hicks <mdhic...@uiuc.edu> wrote: > You can use a TCL script in ModelSim to at least setup the simulation environment > and wave window the way you want. Each time you want get the setup just > type do filename.do in ModelSim's command window. ModelSim is also good > in that it gives you the the TCL command equivalent for most of the options > you select and actions you take in the GUI (probably because that is how > their kludgy GUI actually communicates to the simulation program). > > ---Matthew Hicks > Modelsim.ini is another way to set up many parameters including default simulation run time, default display radix...Article: 124661
drop669@gmail.com a écrit : > Just interesting, how often some company is able to develope their own > RISC soft-core processor for their needs, without any need to publish > that fact or reveal any details? > Hi I did develop a RISC a few weeks ago, mainly for fun and to see how it's done. The problem I am now facing is that there is absolutely *no* tool that supports it, and I am unable to write a compiler. NicolasArticle: 124662
<theanonymous83@gmail.com> wrote in message news:1191018302.482019.285690@r29g2000hsg.googlegroups.com... > Hi! > > I am a student, graduating in October, looking for entry-level/trainee > position. I would be happy to work in either Ireland, UK, Netherlands, > Sweden or Finland (random order). I am eligible to work in any of > these countries without a work permit (an UE citizen). > > I won't disclose my personal data on Usenet for obvious reasons. I > will appreciate any information sent to me via e-mail. > > theanonymous83 A_T gmail.com > www.theitjobboard.com Has 50 'fpga' jobs in the UK. www.jobserve.com has 24. ...and so on. Do they teach how to Google at university? ;-) HTH., Syms.Article: 124663
On Sat, 29 Sep 2007 12:52:23 -0000, "stephen.craven@gmail.com" <stephen.craven@gmail.com> wrote: >I can't speak about obtaining the board, but it is a very good board >with few negatives. > >However, bare in mind that the free webpack will not program the >xc2vp30 on the board. (At least WebPack 9.1 won't.) So that may mean >$2,400 in tool costs. > >Stephen > Ouch ouch ouch. I am not willing to fork out that amount for just testing water... Any other recommendation? I found the following on the site: Spartan-3 Starter Board Spartan 3E Starter Board Nexys-2 Any opinions on the boards? Pros and cons? Thanks, JohnArticle: 124664
On Sep 29, 3:56 pm, "Symon" <symon_bre...@hotmail.com> wrote: > <theanonymou...@gmail.com> wrote in message > > news:1191018302.482019.285690@r29g2000hsg.googlegroups.com...> Hi! > > > I am a student, graduating in October, looking for entry-level/trainee > > position. I would be happy to work in either Ireland, UK, Netherlands, > > Sweden or Finland (random order). I am eligible to work in any of > > these countries without a work permit (an UE citizen). > > > I won't disclose my personal data on Usenet for obvious reasons. I > > will appreciate any information sent to me via e-mail. > > > theanonymous83 A_T gmail.com > > www.theitjobboard.com > Has 50 'fpga' jobs in the UK.www.jobserve.com > has 24. > ...and so on. > > Do they teach how to Google at university? ;-) > > HTH., Syms. Hi Symon, Yes, were are tough to look for information on the Internet. I am a frequent visitor at cwjobs, eures, etc. It seems that there is plenty of jobs but: 1. most of them are dupes (an agency is posting the same offer every day) 2. yet I have to find one that does not require commercial experience (I am not browsing all offers, just the one with lowest salary proposals, as these are usually entry/junior jobs; I agree, I might have missed the post I am looking for). Don't get me wrong. I am not whining or begging. Moreover I am not asking anyone to look for a job for me. I simply asked If anyone knows about entry/trainee job out there, that is not offered via job boards. Still, thanks for response.Article: 124665
On Sep 28, 7:49 pm, Peter Alfke <al...@sbcglobal.net> wrote: > On Sep 28, 5:05 pm, John Adair <g...@enterpoint.co.uk> wrote:> Austin > > > Might be worth making the suggestion to your sister grouping of GPD of > > adding a dedicated oscillator crcuit to their range of products. Given > > a lot of micros do that already there would be some logic in adding > > such a circuit in the future to the low cost sector FPGA families. > > John, "been there, done that". > XC3000 used to have a single-stage dedicated inverter, exactly for > that purpose. It caused us a lot of support grief. Between 32 kHz and > 100 MHz, there is a big variation in xtals, and there also was a > sensitivity to Vcc ramp-up rate. Nobody wants a circuit to work "most > of the time". > I also remember that many of the Intel mask revisions of the 8051 were > oscillator-related. (We second-sourced that at AMD) > My advice has always been: spend a few pennies on an oscillator > circuit made by specialists for a special purpose. And definitely do > not abuse a multi-stage I/O circuit to be the xtal inverter circuit. > Far too much gain and uncontrolled phase changes at very high > frequencies. > Peter Alfke I'd be happy if Xilinx would simply provide a free running, loosely spec'd clock in the FPGAs that a designer could use for non-critical design. They could spec it as "it runs at some frequency between 5 and 30 MHz and will drift with temperature/ voltage, you can't set it, you can only use it." If they would let you use the Master Mode programming clock inside the design, I'd be happy. I don't care about the frequency, I just want a free running clock. No crystal pads, no clock divider, just a ring oscillator within a reasonable frequency range. John ProvidenzaArticle: 124666
Once upon a time I worked for a company that designed and manufactured motherboards and these sorts of oscillator were used very successfully. John Adair Enterpoint Ltd. On 29 Sep, 07:09, hal-use...@ip-64-139-1-69.sjc.megapath.net (Hal Murray) wrote: > >Well, no. Back when I was quite a bit younger, I tried to build a stable > >oscillator with a unused gate on a TTL 7414, with is an inverter with > >hysteresis. Tried all sorts of values of capacitors and resisters, and the > >best I was able to do was to usually generate the third harmonic. > >Sometimes the fifth, sometimes some other multiple of the crystal > >frequency, sometimes not a stable frequency, and sometimes even the > >frequency of the crystal. Switched to using a 7404, a plain inverter, and > >then making a stable oscillator was easy. > > Did you put it into production and ship a million of them? > > They used to make 74U04, U for unbuffered. It was intended for > hacks like this. > > -- > These are my opinions, not necessarily my employer's. I hate spam.Article: 124667
On Sep 29, 8:06 am, johnzulu[at]yahoo.com wrote: > > I found the following on the site: > > Spartan-3 Starter Board > Spartan 3E Starter Board > Nexys-2 > > Any opinions on the boards? Pros and cons? It would help, if we would know what you're trying to do. The "old" spartan 3 starter boards are nice, as they have SRAM on it, which is very easy to deal with. The connector is also a standard .1" . The it get more difficult with the newer Spartan3e, (DDR SDRAM). The Nexys and Nexys-2 have PSRAM on it, never tried, but it seems to be slower than a real SDRAM. Personally, I don't like the proprietary USB-JTAG interface on the nexys boards. One more piece of software to maintain. Would prefer just the standard 20 pin header I could connect the standard programming cable. There is also a new spartan 3a-dsp board out at xilinx's webpage (only $295). Check it out, if you really need something speedy ;-)Article: 124668
On Sep 28, 5:25 pm, theanonymou...@gmail.com wrote: > Hi! > > It seems that many subscribers of this group are professional FPGA/ > ASIC designers working for European companies. Now, some time ago I > have seen that one person has introduced his/hers concerns about lack > of job offers on the job posting sites and was assured that the jobs > are there but not necessarily announced. Therefore I ask you, do you > know about open application for FPGA/ASIC Designer? > > I am a student, graduating in October, looking for entry-level/trainee > position. I would be happy to work in either Ireland, UK, Netherlands, > Sweden or Finland (random order). I am eligible to work in any of > these countries without a work permit (an UE citizen). > > I won't disclose my personal data on Usenet for obvious reasons. I > will appreciate any information sent to me via e-mail. > > theanonymous83 A_T gmail.com Does your university have a career center? At a previous job where we hired entry level engineers, we only recruited through the university career centers for entry level positions. Regards, John McCaskill www.fastertechnology.comArticle: 124669
On Sep 29, 7:31 am, Nicolas Matringe <nicolas.matri...@fre.fre> wrote: > Hi > I did develop a RISC a few weeks ago, mainly for fun and to see how it's > done. The problem I am now facing is that there is absolutely *no* tool > that supports it, and I am unable to write a compiler. try http://www.cs.princeton.edu/software/lcc/ You have a working compiler probably in few hours ...Article: 124670
johnzulu[at]yahoo.com wrote: > Ouch ouch ouch. I am not willing to fork out that amount for just > testing water... Any other recommendation? > > I found the following on the site: > > Spartan-3 Starter Board > Spartan 3E Starter Board > Nexys-2 > > Any opinions on the boards? Pros and cons? > > Thanks, > John I like the digilent Spartan-3E and 3A boards. I own a 3E500 myself, and a 3E1600 at work. I also have the Spartan-3 PCIe board at work but never quite got to where I needed it for development. The biggest question: what do you want to do with them? If you want memory, for instance, look at the Xilinx Memory Interface Generator (MIG) for supported starter boards. - John_HArticle: 124671
Nico Coesel wrote: > > Xilinx could buy such a circuit as IP and integrate it. The parts > containing non-volatile configuration memory would benefit greatly and > could potentially replace microcontrollers. A PLL would even be better > and also reduces the range of crystal frequencies that need to be > supported. 4MHz to 16MHz would be enough. > Given the trouble getting a fast process to work in the `04 series, do you *seriously* believe that just "buying IP" would be more effective than having the extreme-silicon experts in a world-class organization such as Xilinx design the same things? It seems that the "one size fits all" approach just doesn't do it. The PLL is a reasonable idea, but might be best integrated with a glued-on MEMs resonator rather than a crystal, internal or external, for those few chips that could seriously benefit from a solid internal source. I liked the 78 ps input delay resolution on some high-end Xilinx chips (which are out of my own production price range) but these need a fixed training frequency to accompany them. What an excellent opportunity for an embedded oscillator! Most systems I'm working in have a central timing scheme where the FPGA is nowhere near the center of the timing universe. If the more expensive chips (PLLs, trained timing) are the only ones that can afford the internal timing source, there's less probability that they'll be sourcing the timing for the rest of the design. And if you're paying tens of dollars for a chip, the 20 cents suggested earlier in the thread really is small potatoes. For these higher-end chips, however, imagine the improvements in DLL jitter when the frequency is maintained by the lower-jitter internal timebase and the phase adjusted more smoothly by the external clock source feeding the DCM. There are arguments for the timebase, but it's hard to strike an obvious cost/benefit tradeoff since the utilization would probably be way under the 50% point. - John_HArticle: 124672
["Followup-To:" header set to comp.lang.vhdl.] On Sat, 29 Sep 2007 03:51:43 -0700, prince@dyumnin.com <prince@dyumnin.com> wrote: > On Sep 22, 10:49 pm, "John Retta" <jre...@rtc-inc.com> wrote: >> I bought a laptop with Microsoft Vista Home, >> installed Modelsim PE 6.3a , and ran without >> problem. > In your experience would you recommend running EDA Tools under Vista? > Or would you recommend XP/Linux? Personally, my order of preference is Solaris, Linux, HP-UX, Windows. You can't have it all. Solaris SPARC has poor price/performance these days. Solaris x86/64 isn't very well supported. Linux, well, google for 'OOM kiler' and decide for yourself if you prefer unconditional stability or a bit of speed. Does anyone use Windows for serious simulation? (I ask that as a developer that's worked on field-solver based parasitic extraction and mixed signal simulation). A bientot Paul (Not speaking for Mentor Graphics) From invalid@dont.spam Sat Sep 29 12:08:36 2007 Path: newsdbm02.news.prodigy.net!newsdst02.news.prodigy.net!prodigy.com!newscon02.news.prodigy.net!prodigy.net!border1.nntp.dca.giganews.com!border2.nntp.dca.giganews.com!nntp.giganews.com!cyclone1.gnilink.net!spamkiller2.gnilink.net!gnilink.net!trndny07.POSTED!933f7776!not-for-mail From: Phil Hays <invalid@dont.spam> Subject: Re: 2 leg crystal on FPGA: Lattice vs Xilinx User-Agent: Pan/0.14.2.91 (As She Crawled Across the Table) Message-Id: <pan.2007.09.29.19.08.35.961106@dont.spam> Newsgroups: comp.arch.fpga References: <1191004215.511717.128950@w3g2000hsg.googlegroups.com> <1191042978.594191.228870@g4g2000hsf.googlegroups.com> <pan.2007.09.29.05.43.46.745176@dont.spam> <O-GdnbjbbseccWDbnZ2dnUVZ_o_inZ2d@megapath.net> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 8bit Lines: 35 Date: Sat, 29 Sep 2007 19:08:36 GMT NNTP-Posting-Host: 71.113.113.13 X-Complaints-To: abuse@verizon.net X-Trace: trndny07 1191092916 71.113.113.13 (Sat, 29 Sep 2007 15:08:36 EDT) NNTP-Posting-Date: Sat, 29 Sep 2007 15:08:36 EDT Bytes: 2508 X-Original-Bytes: 2465 Xref: prodigy.net comp.arch.fpga:136624 X-Received-Date: Sat, 29 Sep 2007 15:08:37 EDT (newsdbm02.news.prodigy.net) Hal Murray wrote: >>Well, no. Back when I was quite a bit younger, I tried to build a stable >>oscillator with a unused gate on a TTL 7414, with is an inverter with >>hysteresis. Tried all sorts of values of capacitors and resisters, and >>the best I was able to do was to usually generate the third harmonic. >>Sometimes the fifth, sometimes some other multiple of the crystal >>frequency, sometimes not a stable frequency, and sometimes even the >>frequency of the crystal. Switched to using a 7404, a plain inverter, >>and then making a stable oscillator was easy. > > Did you put it into production and ship a million of them? No, but a commercial video display card in my S100 system that I still have uses the same scheme, and I seem to remember seeing the circuit in a data book in that timeframe. This scheme did seem to work, at least for the copies I used all the time, unlike the 7414, which did the most amusing other things, other than oscillate at the intended frequency. I don't recall seeing oscillators until the late 1970's. > They used to make 74U04, U for unbuffered. It was intended for hacks > like this. CMOS gates came in both buffered and unbuffered versions, the unbuffered version for things like this. TTL gates gave you schematics. No buffer on this inverter, at least in the plain TTL version. Maybe on the 74F or 74ALS or later versions. http://focus.ti.com/lit/ds/symlink/sn7404.pdf -- Phil HaysArticle: 124673
"Antti" <Antti.Lukats@googlemail.com> wrote in message news:1191054094.139576.244950@y42g2000hsy.googlegroups.com... > On 29 Sep., 09:29, hal-use...@ip-64-139-1-69.sjc.megapath.net (Hal > Murray) wrote: <snip> > well, is that the same reason why Actel _INCLUDED_ oscillator in the > Fusion :) ? > > Antti > Isn't the marketplace wonderful? If Actel does what you need then use their parts. KJArticle: 124674
On 29 Sep., 21:27, "KJ" <kkjenni...@sbcglobal.net> wrote: > "Antti" <Antti.Luk...@googlemail.com> wrote in message > > news:1191054094.139576.244950@y42g2000hsy.googlegroups.com...> On 29 Sep., 09:29, hal-use...@ip-64-139-1-69.sjc.megapath.net (Hal > > Murray) wrote: > <snip> > > well, is that the same reason why Actel _INCLUDED_ oscillator in the > > Fusion :) ? > > > Antti > > Isn't the marketplace wonderful? If Actel does what you need then use their > parts. > > KJ LOL, I use the parts that meet the BOM budget, whatever brand their are ;) i'd prefer to use vendor X, but sometimes we cant do what we prefer A
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