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Leon Heller wrote: > > "Muthu" <muthu_nano@yahoo.co.in> wrote in message > news:28c66cd3.0206202239.60ce2324@posting.google.com... > > Hi, > > > > where can i get the xilinx's 4.1i's Latest webpack? and how to updatae the > webpack? > > It's 4.2WP20 now (113 Mb!). You can get it from the Xilinx web site. I'm in > the process of downloading it, only 1.5 hours or so to go. 8-( > > AFAIK Webpacks are not upgradeable, you have to download the new version. > > Leon > -- > Leon Heller, G1HSM leon_heller@hotmail.com > http://www.geocities.com/leon_heller > Low-cost Altera Flex design kit: http://www.leonheller.com 113 MB!!! That will take about 13 hours on my connection, assuming that it completes which it often won't with such a large file. The last time I did this it took nearly a week of trying to get it to download. Why the heck doesn't Xilinx make it available on CD for $10 or so. Netscape does it. What's the problem? Are they concerned that users will expect to get support for their $10? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 44526
Nicholas Weaver wrote: > > In article <3D10BA33.BBB6983B@yahoo.com>, > rickman <spamgoeshere4@yahoo.com> wrote: > >I am looking at a new machine as well. I would like to get an idea of > >what a faster P3 would do in your tests. Any chance you can run your > >PAR on a faster P3 or even a laptop? I believe they had P3s running at > >1.3 GHz before they released the P4. It would be very instructive to > >see how that compares to the current P4s. > > I'd definatly look at the Athlons as well. Although I don't have the > numbers to back them up, my intuition is that the tools are memory and > cache bound as much as CPU bound, and the athlons have a much better > cache heirarchy. > -- > Nicholas C. Weaver nweaver@cs.berkeley.edu But in laptops the Athons suck. The problem is that they are targeted to the low end of the market and the support chip sets are very low end. I don't think I have seen one that will support 1 GB of memory and none work with the slightly faster DDR memory. I am moving to a laptop for convenience and want to figure out which of the three are really faster in the laptop environment. So far I am pretty sure that the Athlon is at the bottom of the heap. Tom's hardware web page has a good article on Athlon chip sets and a new unnamed model with a better chip set. But it still is much slower than the P4s, mainly because of the memory. I am just not sure about the P3s. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 44527
rickman <spamgoeshere4@yahoo.com> wrote: : 113 MB!!! That will take about 13 hours on my connection, assuming that : it completes which it often won't with such a large file. The last time : I did this it took nearly a week of trying to get it to download. : Why the heck doesn't Xilinx make it available on CD for $10 or so. : Netscape does it. What's the problem? Are they concerned that users : will expect to get support for their $10? Many people now have good connectivity, and especially the target group for the package( engineers and students). Printing and managing CDs is much more effort and costly than just handling downloads. Bye -- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------Article: 44528
Explicitely instantiate LCELL in your VHDL to ensure nodes A, B & C will be implemented as output of LCELLs. "Johnny Fu" <jfu1650@hotmail.com> a écrit dans le message de news: 787cec10.0206211332.5a0a57e1@posting.google.com... > Hi, > > I am trying to prevent the Max+Plus II 9.4 compiler from performing > any type of logic reduction on a VHDL design similar to the one below: > > ---|>*--- = inverter > > input------|>*A-------|>*B---------|>*C-------output > > I am able to synthesize the design in Synplify 7.1 and keep all the > nets after synthesis. However, when I compile the implementation in > Max+Plus II, taps A, B and C are no longer in a chain and instead are > driven only by the input, minimized logic, and the internal and-or-xor > sturcture of the device. So B is only driven by the input and the > and-or-xor structure without any inverters because the output logic is > the same as with two inverters. Also, C is now only driven with one > inverter since that is logically equivalent to driving with 3 > inverters. This reduction still occurs even after I try assigning a > WYSIWYG global logic synthesis to the design. I am using an Altera > Max7000AE chip. I have contacted Altera about this issue but have yet > to hear a solution so any help would be much appreciated. Thanks. > > -JohnnyArticle: 44529
rickman <spamgoeshere4@yahoo.com> writes: > Nicholas Weaver wrote: > > > > In article <3D10BA33.BBB6983B@yahoo.com>, > > rickman <spamgoeshere4@yahoo.com> wrote: > > >PAR on a faster P3 or even a laptop? I believe they had P3s running at > > >1.3 GHz before they released the P4. It would be very instructive to > > >see how that compares to the current P4s. > > > > I'd definatly look at the Athlons as well. Although I don't have the > > But in laptops the Athons suck. The problem is that they are targeted > to the low end of the market and the support chip sets are very low > end. Generally Athlon chipsets are not up to speed. That is bad because the processor is. The boards/chipsets for Athlon MP (multiprocessor) chips seem to be better because less cost limits have lead to them pulling all stops. This is so even if you only use them as single processor machines. > I am moving to a laptop > for convenience That will though cost speed, in any case. Laptops are good enough for office work. But eng/sci computations (and so most likely PAR) will lag on them. > unnamed model with a better chip set. But it still is much slower than > the P4s, mainly because of the memory. Warning: P4s are incredibly bad for long duration jobs! They are fast so long one has jobs ths compute heavily for a short time and then take a break. The problem comes from heating up, without breaks to cool off, and then stepping down the clock to stave off overheating. Athlons just heat up and run, so long the cooling system is good enough to prevent them being killed. All our (university physics dept) engineering and science computation machines are now being specified as Athlon only. > I am just not sure about the > P3s. Good on heavy integer, can even beat P4 on that. Is PAR integer code or FP dominated? Also good solid optimised on IO in the chipsets. We specify P3 for all servers. But that is not much use for PAR. -- Neil Franklin, neil@franklin.ch.remove http://neil.franklin.ch/ Hacker, Unix Guru, El Eng HTL/BSc, Programmer, Archer, Roleplayer - Make your code truely free: put it into the public domainArticle: 44530
"rickman" <spamgoeshere4@yahoo.com> wrote in message news:3D14ABCC.88D61C29@yahoo.com... > Leon Heller wrote: > 113 MB!!! That will take about 13 hours on my connection, assuming that > it completes which it often won't with such a large file. The last time > I did this it took nearly a week of trying to get it to download. > > Why the heck doesn't Xilinx make it available on CD for $10 or so. > Netscape does it. What's the problem? Are they concerned that users > will expect to get support for their $10? Xilinx supports resume of partly downloaded files. So does Altera, now. A previous version of Webpack was available free on CD-ROM. Leon -- Leon Heller, G1HSM leon_heller@hotmail.com http://www.geocities.com/leon_heller Low-cost Altera Flex design kit: http://www.leonheller.comArticle: 44531
rickman wrote: > 113 MB!!! That will take about 13 hours on my connection, assuming that > it completes which it often won't with such a large file. The last time > I did this it took nearly a week of trying to get it to download. > > Why the heck doesn't Xilinx make it available on CD for $10 or so. > Netscape does it. What's the problem? Are they concerned that users > will expect to get support for their $10? > > The WebPACK site has some interesting ideas about download times. As an example they claim that a 142MB will take 56min over a 56K line. If anyone posseses such a line please let me know the Telco's address, otherwise methinks someone should take them aside and point out that in the strings "Kb/sec." and "KB/sec." the case is significant ... once this difference is grasped CDs might become available. Its even worse on this benighted side of the pond where local calls aren't free.Article: 44532
I think it's time for me to jump in and clear up misunderstandings and/or stupidities on our side. If anybody has to download 100 MB, that is a lousy proposition at any modem speed. And, yes, 56kbits/sec = 7kB/s, and it would take at best 20,000 seconds, which is six hours. I think most of us can do the math, but somebody must have been asleep at the wheel... Peter Alfke, Xilinx Applications ================================ Rick Filipkiewicz wrote: > rickman wrote: > > > 113 MB!!! That will take about 13 hours on my connection, assuming that > > it completes which it often won't with such a large file. The last time > > I did this it took nearly a week of trying to get it to download. > > > > Why the heck doesn't Xilinx make it available on CD for $10 or so. > > Netscape does it. What's the problem? Are they concerned that users > > will expect to get support for their $10? > > > > > > The WebPACK site has some interesting ideas about download times. As an example > they claim that a 142MB will take 56min over a 56K line. If anyone posseses such a > line please let me know the Telco's address, otherwise methinks someone should > take them aside and point out that in the strings "Kb/sec." and "KB/sec." the case > is significant ... once this difference is grasped CDs might become available. > > Its even worse on this benighted side of the pond where local calls aren't free.Article: 44533
Endric Schubert wrote:
>
> A hardware guy in my company recently mentioned that he has 2 "bad" Xilinx
> Virtex2 devices now. In one device there seems to be a stuck-at-1 memory bit
> (he found that out when using 100% block RAM) the other seems to have a
> internal connection problem: One and the same bit file works fine on one
> device but not on the "bad" device.
>
> I just wonder, has anybody had similar experiences and how do you find those
> problems in the lab?
I've never seen a bad memory bit in a FPGA, but I've seen bad routing in
FPGAs. Most of a FPGA is routing, routing is the hardest to test,
conclusion is that most bad parts will be failures in routing. BTW:
This isn't just a Xilinx issue, any complex programmable part has
similar issues. To avoid production/field problems, you might want to
read this whole thread:
http://groups.google.com/groups?hl=en&lr=&selm 010731.103308.1239036029.24248%40polybus.com
Symptom is something like this: A part works with many bit files, but
doesn't work with a bit file. All bit files work in most other parts.
1) Make sure there are no other issues.
a) Observe the power supplies as close to the part as practical
with both a DVM and a scope.
b) Make sure that the part has good timing both internally and
externally.
c) Make sure that there are no issues crossing clock domains.
2) Isolate the problem.
a) using FPGA Editor (or similar tool) add probe points to the
design and track the bad logic signals back to the source.
If the failure is in routing (most likely), then you will
probably observe that one part of the route has the correct
signal, another part of the route does not. If you suspect
a net, try rerouting only that net. If that fixes the issue,
the problem is on that net.
b) Produce a simple design using FPGA Editor that uses the
failing resource, verify that this simple design works with
other parts and fails with the bad part.
3) Contact the vendor. After they are reasonably assured that you have
eliminated other issues and that your simple test case is reasonable,
they should be happy to get the part back, and should update their test
patterns to find this (and similar) flaws.
--
Phil Hays
Article: 44534I haven't had any bad chips yet (knock on wood), but I have had chips that I'd inadvertently damaged, and I've had designs with marginal timing that worked on some parts, and not on others. If you do have a bad part, send it back to Xilinx, I bet they'd love to see how it got through manufacturing test. Regards "Endric Schubert" <endric_@_bridges2silicon.com> wrote in message news:<bxPQ8.6788$LG4.362189992@newssvr21.news.prodigy.com>... > A hardware guy in my company recently mentioned that he has 2 "bad" Xilinx > Virtex2 devices now. In one device there seems to be a stuck-at-1 memory bit > (he found that out when using 100% block RAM) the other seems to have a > internal connection problem: One and the same bit file works fine on one > device but not on the "bad" device. > > I just wonder, has anybody had similar experiences and how do you find those > problems in the lab? > > Endric > > -- > Bridges2Silicon, Inc. > Endric Schubert, PhD > 471 E. Evelyn Ave. > Sunnyvale, CA 94086 > www.bridges2silicon.com > Direct: (408) 245 8513 > Fax: (408) 245 2960 > Mobile: (408) 221 6139Article: 44535
Peter Alfke wrote: > I think it's time for me to jump in and clear up misunderstandings and/or stupidities > on our side. > If anybody has to download 100 MB, that is a lousy proposition at any modem speed. > And, yes, 56kbits/sec = 7kB/s, and it would take at best 20,000 seconds, which is six > hours. > I think most of us can do the math, but somebody must have been asleep at the > wheel... > > Peter Alfke, Xilinx Applications > ================================ > Peter, I might have been a bit intemperate in my comments and I apologise. However I do share the frustrations having many a time started a download of 80MB of service pack overnight only to find its bombed out with a few MB to go [record was one of the 3.Xi SPs which took 6 attempts and I *needed* one of the bug fixes]. The reality is that to deal with the size of modern downloadable files only a broadband connection with a real download speed of ~256Kb/sec. will do ... but then by the time we all get that the file sizes will have gone over the GB mark. The web may be a wonderful form of information propagation and sharing, and even for buying & selling, but I'm beginning to have my doubts about it as a s/w distribution meduim. But I still don't understand why Xilinx can't send a few 100 WebPACK CDs to each of the distis ? or at least allow anyone with a fast net connection and a CD-R/W the right to make & ship copies for a media charge + postage ?Article: 44536
"Endric Schubert" <endric_@_bridges2silicon.com> wrote in message news:<bxPQ8.6788$LG4.362189992@newssvr21.news.prodigy.com>... > A hardware guy in my company recently mentioned that he has 2 "bad" Xilinx > Virtex2 devices now. In one device there seems to be a stuck-at-1 memory bit > (he found that out when using 100% block RAM) the other seems to have a > internal connection problem: One and the same bit file works fine on one > device but not on the "bad" device. > > I just wonder, has anybody had similar experiences and how do you find those > problems in the lab? You don't make mention of which V2 you're using, but we've used something on the order of 500 or more XC2V3000's since the first wafer of engineering samples last year and I've not aware that we've had any troubles with them. We don't use anywhere near 100% of the BRAM's either. I'm not saying that your problem is or isn't the V2 part itself, but the chances that it is the V2 part goes down, IMO, if you are using a 3000 or smaller. You didn't give much detail on the second problem (probably because you aren't asking for advice), but it could be caused by any of a HUGE number of possiblities (that huge number rises or falls depending on the exact problem he is having ;-). Suspecting the FPGA would be one of the last things on my list. Have fun, MarcArticle: 44537
On Sat, 22 Jun 2002 00:28:55 GMT, "Endric Schubert" <endric_@_bridges2silicon.com> wrote: >A hardware guy in my company recently mentioned that he has 2 "bad" Xilinx >Virtex2 devices now. In one device there seems to be a stuck-at-1 memory bit >(he found that out when using 100% block RAM) the other seems to have a >internal connection problem: One and the same bit file works fine on one >device but not on the "bad" device. > >I just wonder, has anybody had similar experiences and how do you find those >problems in the lab? > >Endric On a product I worked on a few years ago (not Virtex2) we had a few problems with ES parts, but I don't recall any problems with fully qualified production parts. You can find these problems with your regular product QA. But that doesn't help if you later ship an upgrade that includes new FPGA downloads that use different routing resources on the die. Regards, Allan.Article: 44538
Kevin Brace <ihatespam99kevinbraceusenet@ihatespam99hotmail.com> writes: > Farhad Abdolian wrote: > > > > Hi, > > I am currntly on H1-B visa, and since my current employer has decided > > to close our office, I am looking for a new job, and a company to take > > over my H1-B visa while my green card application goes through (my > > wife is American). > > > > > If your wife is an American, won't you automatically be able to > stay in this country legally, and work without an H1-B visa? Not until he got his green card. Homann -- Magnus Homann, M.Sc. CS & E d0asta@dtek.chalmers.seArticle: 44539
Rick Filipkiewicz wrote: > > Peter Alfke wrote: > > > I think it's time for me to jump in and clear up misunderstandings and/or stupidities > > on our side. > > If anybody has to download 100 MB, that is a lousy proposition at any modem speed. > > And, yes, 56kbits/sec = 7kB/s, and it would take at best 20,000 seconds, which is six > > hours. > > I think most of us can do the math, but somebody must have been asleep at the > > wheel... > > > > Peter Alfke, Xilinx Applications > > ================================ > > > > Peter, > > I might have been a bit intemperate in my comments and I apologise. However I do share > the frustrations having many a time started a download of 80MB of service pack overnight > only to find its bombed out with a few MB to go [record was one of the 3.Xi SPs which > took 6 attempts and I *needed* one of the bug fixes]. > > The reality is that to deal with the size of modern downloadable files only a broadband > connection with a real download speed of ~256Kb/sec. will do ... but then by the time we > all get that the file sizes will have gone over the GB mark. The web may be a wonderful > form of information propagation and sharing, and even for buying & selling, but I'm > beginning to have my doubts about it as a s/w distribution meduim. You *must* get a download manager. You'd wonder how you ever did without it. I use GetRight. If a download bombs out, it automatically restarts the download from where it stopped. If the PC crashes, you can resume at the same point next time you connect. You can do all that even for 20 simultaneous downloads. I downloaded webpack at 4-5kbytes/sec.Article: 44540
Uwe Bonnes wrote: > > rickman <spamgoeshere4@yahoo.com> wrote: > > : 113 MB!!! That will take about 13 hours on my connection, assuming that > : it completes which it often won't with such a large file. The last time > : I did this it took nearly a week of trying to get it to download. > > : Why the heck doesn't Xilinx make it available on CD for $10 or so. > : Netscape does it. What's the problem? Are they concerned that users > : will expect to get support for their $10? > > Many people now have good connectivity, and especially the target group for > the package( engineers and students). > > Printing and managing CDs is much more effort and costly than just handling > downloads. > > Bye > -- > Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de What is your point? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 44541
Leon Heller wrote: > > "rickman" <spamgoeshere4@yahoo.com> wrote in message > news:3D14ABCC.88D61C29@yahoo.com... > > Leon Heller wrote: > > 113 MB!!! That will take about 13 hours on my connection, assuming that > > it completes which it often won't with such a large file. The last time > > I did this it took nearly a week of trying to get it to download. > > > > Why the heck doesn't Xilinx make it available on CD for $10 or so. > > Netscape does it. What's the problem? Are they concerned that users > > will expect to get support for their $10? > > Xilinx supports resume of partly downloaded files. So does Altera, now. A > previous version of Webpack was available free on CD-ROM. > > Leon > -- > Leon Heller, G1HSM leon_heller@hotmail.com What is your point? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 44542
Russell wrote: > > Rick Filipkiewicz wrote: > > > > Peter Alfke wrote: > > > > > I think it's time for me to jump in and clear up misunderstandings and/or stupidities > > > on our side. > > > If anybody has to download 100 MB, that is a lousy proposition at any modem speed. > > > And, yes, 56kbits/sec = 7kB/s, and it would take at best 20,000 seconds, which is six > > > hours. > > > I think most of us can do the math, but somebody must have been asleep at the > > > wheel... > > > > > > Peter Alfke, Xilinx Applications > > > ================================ > > > > > > > Peter, > > > > I might have been a bit intemperate in my comments and I apologise. However I do share > > the frustrations having many a time started a download of 80MB of service pack overnight > > only to find its bombed out with a few MB to go [record was one of the 3.Xi SPs which > > took 6 attempts and I *needed* one of the bug fixes]. > > > > The reality is that to deal with the size of modern downloadable files only a broadband > > connection with a real download speed of ~256Kb/sec. will do ... but then by the time we > > all get that the file sizes will have gone over the GB mark. The web may be a wonderful > > form of information propagation and sharing, and even for buying & selling, but I'm > > beginning to have my doubts about it as a s/w distribution meduim. > > You *must* get a download manager. You'd wonder how you ever did without it. > I use GetRight. If a download bombs out, it automatically restarts the download > from where it stopped. If the PC crashes, you can resume at the same point next > time you connect. You can do all that even for 20 simultaneous downloads. > I downloaded webpack at 4-5kbytes/sec. Netscape already has that capability. But the fact is that under Windows the process is far from perfect. The last copy of web pack I downloaded took me days due to the overnight download stopping before it was done so that even if I did not have to start over, it spent many hours a night doing nothing. Then I was within 2KBytes of being complete and it locked. When I attempted to restart, it claimed that there was no file in the first place. I don't care where the fault is, I don't care if there is "better" software. It is not a difficult thing to produce a CD. There really is no good reason that Xilinx can't do that for the Webpack software and service packs. So charge $10 like Netscape does. A CD in quantity 1000 costs about $2 to make with covers. Please keep the $8. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 44543
Neil Franklin wrote: > > rickman <spamgoeshere4@yahoo.com> writes: > > But in laptops the Athons suck. The problem is that they are targeted > > to the low end of the market and the support chip sets are very low > > end. > > Generally Athlon chipsets are not up to speed. That is bad because the > processor is. The boards/chipsets for Athlon MP (multiprocessor) chips > seem to be better because less cost limits have lead to them pulling > all stops. This is so even if you only use them as single processor > machines. That may be true in some context, but the benchmarks I have read indicate that the Athlons in standard desktops run quite well beating P3s at 20% higher clock speeds. The advantage over P4s is even more. But laptops are where they seem to be filling the low end and the chip sets are exclusively designed for that. > > I am moving to a laptop > > for convenience > > That will though cost speed, in any case. Laptops are good enough for > office work. But eng/sci computations (and so most likely PAR) will lag > on them. Of course laptops will not match desktops. But a new laptop is much better than the desktop I am currently using. I am just trying to get information on which processor is currently best for FPGA work in laptops. I can do quite well without a desktop for the time being. > > unnamed model with a better chip set. But it still is much slower than > > the P4s, mainly because of the memory. > > Warning: P4s are incredibly bad for long duration jobs! They are fast > so long one has jobs ths compute heavily for a short time and then > take a break. The problem comes from heating up, without breaks to > cool off, and then stepping down the clock to stave off overheating. Can you cite a source for this info? I have never heard that P4s won't run at full speed for long periods. This may be true in laptops, I don't doubt, but I can't belive they would design a desktop that won't crunch at top clock all day. > Athlons just heat up and run, so long the cooling system is good > enough to prevent them being killed. All our (university physics dept) > engineering and science computation machines are now being specified > as Athlon only. > > > I am just not sure about the > > P3s. > > Good on heavy integer, can even beat P4 on that. Is PAR integer code > or FP dominated? > > Also good solid optimised on IO in the chipsets. We specify P3 for all > servers. But that is not much use for PAR. I was asking about info specific to FPGA work and also laptops if available. Most of the benchmarks I have seen are targeted to office apps or graphics. This thread contained some of the few specs on FPGA applications I have seen. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 44544
Russell wrote: > Rick Filipkiewicz wrote: > > > > Peter Alfke wrote: > > > > > I think it's time for me to jump in and clear up misunderstandings and/or stupidities > > > on our side. > > > If anybody has to download 100 MB, that is a lousy proposition at any modem speed. > > > And, yes, 56kbits/sec = 7kB/s, and it would take at best 20,000 seconds, which is six > > > hours. > > > I think most of us can do the math, but somebody must have been asleep at the > > > wheel... > > > > > > Peter Alfke, Xilinx Applications > > > ================================ > > > > > > > Peter, > > > > I might have been a bit intemperate in my comments and I apologise. However I do share > > the frustrations having many a time started a download of 80MB of service pack overnight > > only to find its bombed out with a few MB to go [record was one of the 3.Xi SPs which > > took 6 attempts and I *needed* one of the bug fixes]. > > > > The reality is that to deal with the size of modern downloadable files only a broadband > > connection with a real download speed of ~256Kb/sec. will do ... but then by the time we > > all get that the file sizes will have gone over the GB mark. The web may be a wonderful > > form of information propagation and sharing, and even for buying & selling, but I'm > > beginning to have my doubts about it as a s/w distribution meduim. > > You *must* get a download manager. You'd wonder how you ever did without it. > I use GetRight. If a download bombs out, it automatically restarts the download > from where it stopped. If the PC crashes, you can resume at the same point next > time you connect. You can do all that even for 20 simultaneous downloads. > I downloaded webpack at 4-5kbytes/sec. Download manager = make + wget + Perl script on a Linux/Unix box near you [No Linux or Unix => may have to install Cygwin and build wget from source if noone's done an NT/W2K port already], but a lot of restarts might still mean a long time before completion. CD = telephone call to disti + 1 day in the post, or even an on-line order that gets re-directed to nearest disti [the sort of thing the Web *is* good for]. On a slow web day the CD's going to win out.Article: 44545
Peter Alfke wrote: > > I think it's time for me to jump in and clear up misunderstandings and/or stupidities > on our side. > If anybody has to download 100 MB, that is a lousy proposition at any modem speed. <snip> Part of the problem may be the 'big green button' mindset -> Everything in one file. I recall wanting to get just the FITTER for CoolrunnerII, because the data was superficial ( another big green button mindset ! :( but IIRC, it was not available alone, you had to download / install the whole WebPACK !. Seems it would make sense to have an option, ( beside the monster 'everything'), of a choice of device LIBS/EXEs/Fitters etc of immediate interest. Device libraries must be a big chunk of the 'bloat', and separation of the windows GUI from the actual engine room code, can also save a lot of space. Since a CD could/should also include the Data sheet PDFs, App notes, and even some FAQ'a, it would seem a good marketing resource. Seems these days, writable CD's and juke boxes coud just about automate the whole thing, of an email request ? So there is no 'stock obsolence' issue. -jgArticle: 44546
Peter Alfke wrote: > I think it's time for me to jump in and clear up misunderstandings and/or stupidities > on our side. > If anybody has to download 100 MB, that is a lousy proposition at any modem speed. > And, yes, 56kbits/sec = 7kB/s, and it would take at best 20,000 seconds, which is six > hours. > I think most of us can do the math, but somebody must have been asleep at the > wheel... > > Peter Alfke, Xilinx Applications > ================================ > > One thing I did forget to add was that I do appreciate the improvement in the WebPACK part of the site with the disappearance of all that complicated pull-down, pull-across, multicoloured Javascript GUI stuff.Article: 44547
Jim Granville <jim.granville@designtools.co.nz> wrote: > Seems it would make sense to have an option, ( beside the monster >'everything'), of a choice of device LIBS/EXEs/Fitters etc >of immediate interest. Here's a trick that might help.. if you select "custom" and deselect just one thing (experiment) you'll get a page where you can download an installer and modules one at a time, with the biggest module being ~35 megs. After you've got them all but the module you deselected, go back to the config screen and select it and deselect something else to get the missing file. Perhaps an easy solution for Xilinx is to make that separated D/L page easier to get to? I really appreciate that Xilinx makes the software available to begin with! It is definitely worth the D/L effort. If buying a fpga dev board, check with the vender, they may have included the Webpack software on the supplied tools CD. Terry NewtonArticle: 44548
Hi,
I`m using Xilinx webpack and am quite new to VHDL, at the marked line I have
to place three times end if,
otherwise a syntag error is generated.
Why do I have to place 3 times end if here instead 1 end if ?
Any ideas ?
process( SEL, D )
begin
if ( SEL = "0000" ) then
TCK <= D(0);
else if ( SEL = "0001" ) then
TCK <= D(1);
else if ( SEL = "0010" ) then
TCK <= D(2);
end if; end if; end if; -- *****************
end process;
Marcel
Article: 44549Hi, I have a design that runs at 50 MHz, with a system clock of 250 MHz, and a clock enable of 50 MHz, on a Xilinx Virtex 2 xc6000. The clock enable is generated internally with a simple counter at 250 MHz that generates a pulse every 5 clock cycle. This pulse is distributed to 150 flip flop's CE input. How do I tell Synplify 7.1 Pro this situation : 1 - The major part of the design logic runs only at 50 MHz, even though the system clock is at 250 MHz. 2 - The pulse generated from the counter only has a system clock period (4 ns) to reach every flip flop CE input. knowing that Synplify will replicate this net (and therefore renaming the nets) to reduce fanout. Thanks, Ghyslain Gagnon
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