Custom Search
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Hi, I was wondering if anyone had the VHDL code for an array divider (16-bit). I can't seem to find any help on this on the web, and need it as a component in my design. Any help would be appreicated ThanksArticle: 65976
steve41@totalise.co.uk (Steve) wrote in message > > > > Xilinx have a revenue of $1.2bn according to this: > > > > > > http://finance.yahoo.com/q/is?s=xlnx > > > > > > Are you seriously trying to say that the cost of an FPGA > > > representative being asked questions has anything other than a > > > negligible effect on the prices of FPGAs? > > > > In-state factory FAEs, Disty FAEs. Sales teams that must be incentivized > > to drum up demand for new parts. Then customers who go out and convert > > their FPGA to CGAs as soon as production ramps up. > > > > FPGAs are not like CPUs. They are often prototype platforms. > > Low volume, abandoned by the customer as soon as the design is > > stable and can be converted to a CGA or ASIC. > > > Read the statements that the Xilinx suits say about ASICs vs FPGAs, > they say that ASICs are frequently being *replaced* by FPGAs. In small volumes. > > > > FPGAs are inexpensive in my view, > > > In large quantities, not in small quantities. How much would it cost to design and build an ASIC with a total production run of say 10? Versus and FPGA. FPGAs are much cheaper. > > > > and the software tools are > > amazing. It's a good time to be an engineer. > > > Do you work for a large company that buys FPGAs in large quantities by > any chance? > Actually, I buy them in very small volumes. Small company. Very reasonable pricing, very good value for what you get. In fact, I used to work at a large company, and based on that experience, it is large companies that get raped. On one project I worked on, we were being charged $400/fpga that was being sold to new customers for $100. The lowered the price when we noticed, but did not refund the money on the devices we purchased. > > > But if you know a way to bring the equivalent of a Xilinx offering > > for 25% of the price, join the marketplace, please. > > > My point is that unless you buy in large quantities then small or > start-up companies can't put Xilinx parts in their products because > they're too expensive. Sure they can. It is done all the time. You just need to find a niche. Maybe you could start a company selling inexpensive FPGAs to small start ups. If you're having trouble coming to market with an FPGA based system, you would probably have trouble coming to market with an ASIC.Article: 65985
rickman <spamgoeshere4@yahoo.com> wrote in message news:<40286B1C.8BD933C4@yahoo.com>... > Jan Panteltje wrote: > > > > On a sunny day (Mon, 09 Feb 2004 13:21:48 -0800) it happened Peter Alfke > > <peter@xilinx.com> wrote in <4027F9ED.F7C82422@xilinx.com>: > > > > >If you build something in small volume, everything is expensive: design > > >effort, pc-boards, most components, testing, marketing, advertising, > > >selling, servicing etc. You must have a really good product to absorb > > >all these high costs. That's life. > > >Peter Alfke > > Hey, of cause things are expensive. > > Now log in to www.microchip.com > > Find a PIC, you can enter a quantity and order right there. > > Whats your problem? > > Perfect for small business. > > And you will pay some 3 or 4 times what you would pay if you were buying > 1000's. I know, I have looked. > How is this any different than any other product? Resistors, for example. Go to digikey and try to buy 3 0805 100 Ohm resistors. Your price per resistor will be much higher than if you bought several dozen reels from a distributor. > -- > > Rick "rickman" Collins > > rick.collins@XYarius.com > Ignore the reply address. To email me use the above address with the XY > removed. > > Arius - A Signal Processing Solutions Company > Specializing in DSP and FPGA design URL http://www.arius.com > 4 King Ave 301-682-7772 Voice > Frederick, MD 21701-3110 301-682-7666 FAXArticle: 65986
Rick Collins <spamgoeshere4@yahoo.com> wrote in message news:<402559B3.AFBBB736@yahoo.com>... > ... And they will very much limit the > amount of support they give you if you are not a large customer. Xilinx gives me good support. Great support. It might be that I have found documentation errors, errors in unisim/simprim models, and that my questions are usually (but not always) valid. I don't call asking why my code is resulting in a latch, for example. I sometimes ask a stupid question, but I try not to. All this while I am a small customer. It might be that I have worked in the past for large companies. It might be luck. The Xilinx support web site sometimes bites in the performance department, but I get great support when it is working, and good support from local (factory and disty) FAEs if they aren't swamped. I have also received good support from Actel and Altera. I received good support from Actel on a part that they new was going to be used in test equipment, that they knew we would only buy 3 of their devices for...Article: 65987
William Wallace wrote: > rickman <spamgoeshere4@yahoo.com> wrote in message news:<40286B1C.8BD933C4@yahoo.com>... <snip> >> >>And you will pay some 3 or 4 times what you would pay if you were buying >>1000's. I know, I have looked. >> > > > How is this any different than any other product? Resistors, for > example. Go to digikey and try to buy 3 0805 100 Ohm resistors. Your > price per resistor will be much higher than if you bought several > dozen reels from a distributor. I don't think anyone expects a flat price curve ( except in the promotion special case I mentioned earlier ). What is at issue, is the lazy application of the jelly-bean-resistor type price curves to much more expensive parts. Each sales transacton has a cost, and each customer call has a cost, but those costs do not scale with the device price. eg A price structure that has a 1 off price of $15, and volume price of $4 is probably OK to most users. What's harder to justify, is a 1 off price of $150, and volume price of $40. In one case you are saying "it costs $11 more to handle small volumes" - fine, but how can that possibly justify $110 extra on the larger device - ? -jgArticle: 65988
We have Quartus III at school, but only have the Altera UP2 development board to work with. It only has 70k gates, so Im guessing it wont be enough. Also does anyone know of a low cost (<$300) development board that can be used instead? Thanks! BenArticle: 65989
Assuming you have access to the Nios, the Parallax Cyclone Fastpack is a neat little board @ $195.00. Has a speaker and leds and 8Mbit serial flash. They have lots of other boards at different levels too. Don't know if they discount to schools. I have a friend who has built a successful commercial board with Nios on the same Cyclone chip. Ken "Ben Nguyen" <benn686@hotmail.com> wrote in message news:e604be8.0402101752.134e34cb@posting.google.com... > We have Quartus III at school, but only have the Altera UP2 development > board to work with. It only has 70k gates, so Im guessing it > wont be enough. > > Also does anyone know of a low cost (<$300) development board that can be used > instead? > > Thanks! > BenArticle: 65990
Interesting thread. I reply to the top message because of the many tentacles the thread developed. Yes, of course, we would all like to pay less. No question about it. And, it does hurt to have serious doubts about whether or not a product might be viable mainly due to the cost of the FPGA's you'll need in small quantities. I understand this very well. The error here might be a good-old standard in business: communication. Talk to your sales rep. Contact Xilinx/Altera. Let them know what you are doing. Explain what problems you have. There are real people behind the emails, websites, brochures and chips. Make contact. You'd be surprised to learn what can be achieved with a little bit of effort. From the perspective of a small company I can tell you that I'm blown away to see the effort put forth recently (and continuing) to support us. This both by Xilinx and Avnet. Both of these companies could afford to loose our business and they wouldn't even know it happened. However, like I said, there are people behind it all. Never forget that. -- ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Martin Euredjian To send private email: 0_0_0_0_@pacbell.net where "0_0_0_0_" = "martineu" "Steve" <steve41@totalise.co.uk> wrote in message news:4d3ee211.0402050950.69f50597@posting.google.com... > I've been looking for historical prices of FPGAs to try and get an > idea of what I might expect to get for a given price for small > quantities and came across this post: > > http://tinyurl.com/36blb > > which has a price table for small quantities (<=25) for January 2000: > > Spartan > XCS05 3PC84C 10.00 > XCS10 3PC84C 18.10 > XCS20 3PQ208C 40.40 > XCS30 3PQ208C 45.35 > XCS40 3PQ208C 49.15 > > Virtex > XCV50 4PQ240C 55.40 > XCV100 4PQ240C 104.00 > XCV150 4PQ240C 128.00 > XCV200 4PQ240C 157.00 > XCV300 4PQ240C 244.00 > XCV400 4HQ240C 344.00 > XCV600 4HQ240C 581.00 > XCV800 4HQ240C 860.00 > > > I compared the above prices with the prices on these web pages, that I > assume are up to date because they stock up to date chips: > > Spartan: http://www.plis.ru/price.html?ID=121 > Virtex: http://www.plis.ru/price.html?ID=111 > > and all of the prices on the Russian website are exactly the same > price today as they were from a different supplier in January 2000. > > Why are they exactly the same price? > > Do Xilinx tell their resellers what to charge? And if so, isn't this > illegal? > > Also, why is there such an enormous price difference per part between > massive quantities and smaller quantities? Xilinx make X million of > part Y, so why do they charge so many hundred percent higher prices > for small quantities than very large quantities? > > As there is such a huge difference in prices between large and small > quantities, why isn't there a supplier that buys largish quantities to > sell in smaller quantities so that the supplier makes a profit and the > purchaser of small quantities gets chips cheaper? > > Also, what does happen to FPGA prices over time? Do they just reach a > final value and they never get any cheaper? That would explain why > prices would be very similar in 2000 and 2004, but not why they're > identical. You can get a Spartan 2E XC2S150E-6PQ208C for $20.45 from > the above Russian website today. What might you expect to be able to > get for $20 in, say, 2 years' time? > > -- > Steve >Article: 65991
"Pszemol" <Pszemol@PolBox.com> wrote in message news:<c0acsk.3oc.0@poczta.onet.pl>... > "Fredrik" <fredrik_he_lang@hotmail.com> wrote in message news:77a94d51.0402100656.26670ade@posting.google.com... > > You have the RTL view in Quartus that will short of do this for you. > > RTL means that you will see it at a very basic level, flip-flops, > > Luts,muxs and soforth. Alltough the RTL viewer build up a hirachy from > > your VHDL files so you are going to see the top enties in the first > > view anyhow. > > This is the only thing I want right now. > > >I think also some 3:party tools have this features.(simplify?) > > This is a new feature as of Quartus2_ver4 so it > > might not be avalible in the free version of the tool. > > I have version 3, so I guess I need to request an upgrade. > Thanks. RTL viewer is available with the full version of the Quartus II version 4.0 software. For details on RTL viewer, check the Quartus II Handbook chapter http://www.altera.com/literature/hb/qts/qts_qii51013.pdf Regards, Seshan Altera Corp.Article: 65993
http://xilinx.openchip.org in "Files" there is downloadable version of bootloader for Microblaze that loads one file from root directory on first partition (FAT16) into memory. we are trying to get uLinux running on ML300 so that is the first attempt of the loader. also included is preliminary hardware system for "ml300_mbvanilla" but we have not even tried to bootload the uLinux. the file loading from CompactFlash (connected to SystemACE) works, and with small modification the C source code can be used with different hardware and/or different media too. the source is dirty, but works :) I know there is interest to get uLinux working on different hw platforms so this SystemACE loader could come handy. anttiArticle: 65994
Hi, Did you implement it from scratch? If so the datasheet indicates a fairly complex IMO initialization procedure to get it in the right mode. It seems like it would be quite easy to miss something. I had a burst read problem initially with the Nios SDRAM controller used with the Micron mem. It turned out to be a phase problem between the sdram clock and the cpu clock. Ken "Antti" <antti1000@yahoo.com> wrote in message news:%m%Vb.8944$g4.183754@news2.nokia.com... > Hi, > > I've implemented an sdram controller on an fpga (to micron 128 MB memory) > and tested it with a sequence of write and subsequent read bursts. In around > 1 in 5 attempts, the correct read data appears on the dq[31..0] data bus, > otherwise the memory read just returns 0xFFFFFFF. Could someone please give > pointers to why might this be? > > Thanks, > Antti > >Article: 65995
Hi Everybody I am trying to build a neural network using FPGA. As you know, the one problem that should be solved is implementation of non-linear activation function. I have read thro' many papers; some implemented using look up tables, some calculated it using piecewise approximation methods. Also I have been thinking about using different number systems that would give good precision. Any suggestions or comments helping me to find more reasonable methods would be appreciated Thank you for your replies Bye RamArticle: 65996
Hi, there: I am using some 14 global clock buffers in the design, I instantiated all of them as BUFGMUX...for example... In simulation, it showed some gray time on clk_12m at the two transitions of sel...how may I do correct this? BUFGMUX CLK_BUF2( .O( clk_12m ), .I0( clk_12m_o ), .I1( clk_12m_o ), .S( sel ) ); //1 BUFGMUX CLK_BUF2( .O( clk_12m ), .I0( clk_12m_o ), .I1( ), .S( sel ) ); //2 BUFGMUX CLK_BUF2( .O( clk_12m ), I( clk_12m_o ) ); initial begin sel <= 1'b0; #1900 sel <= 1'b1; #5000 sel <= 1'b0; end The manual said BUFG is implemented as BUGMUX...now when I instantiate a BUFG CLK_BUF2( ... ), can I still use the INST CLK_BUF2 LOC = "BUFGMUX0P" constraints? Thanks for your advice...Article: 65997
Hi, I have a problem in configurating altera devices in my board. my configuration scheme is as follows: 1 EPC16 device connected in PPS mode to: A stratix device connected to Data0 (EP1S20) & 2 cyclone devices (EP1C12) connected to Data1 & Data2 of the EPC16… When I power-up the board => the Configuration isn't done. I've looked on the nSTATUS & CONF_DONE signals and they look fine! the CONF_DONE stays LOW all the time. the nSTATUS goes HIGH ~85mSec after power is stable. the DCLK signals stays LOW all the time! (there isn't DCLK) I've tried an external OSC to the EPC16 => still the same phenomenon. Please Advice! TalArticle: 65998
Hi, I have a problem with configuration altera FPGA's on my board. my configuration scheme is: 1 EPC16 device connected in PPS mode to: A stratix device on Data0 (EP1S20) & 2 cyclone devices (EP1C12) connected Data1 & Data2 of the EPC16… when I power-up the board, the configuration cycle isn't started, I can't find the DCLK (this signal stays LOW always!) the nSTATUS signal goes HIGH ~85mSec after power-up the CONF_DONE signal stays LOW always. I've tried to connect an external OSC to the EPC16 => I didn't work. Please advice, TalArticle: 65999
"Paul Leventis (at home)" <paul.leventis@utoronto.ca> wrote in message news:vx7Wb.15455$Ovt.7578@news04.bloor.is.net.cable.rogers.com... > [this is deviating pretty far from FPGAs...] > > > There are a few benifits of the AMD-64 architecture beyond the 64-bit > width > > (in general I agree with most of what you've written here - it's a good > > explanation). In particular, the larger number of registers is a help in > > many types of application. > > Good point -- I forgot to mention the doubling of the integer and SSE > register files. And moving to other 64-bit platforms could bring even more > architectural advantages (x86-64 still doesn't have that many registers > available), though its sounding like x86-64 is going to be the primary > 64-bit architecture (Intel has indicated they plan to release a 64-bit > x86-based chip too, though aren't saying if it is same instruction set as > Athlon64). > Theories abound on that one. But for practical purposes, AMD's x86-64 is available here and now on sensibly-priced processors, and is thus a far better target than Intel's 64-bit x86 extensions (which are currently unspecified vapourware) or the Itanium (which costs a great deal more, and is slower than the Athlon/Opteron for integer work). > > Also, for some types of application, convenient > > 64-bit data items can lead to other benifits - for example, povray runs > > slightly faster in 64-bit mode than 32-bit mode on an Athlon-64, but more > > importantly it runs more accurately, giving finer detail. I don't know > > whether this could apply to tools like Quartus (povray deals with > > approximations to reality rather than absolute logic), but perhaps it > might > > have benifits for simulation. > > I don't think x86-64 brings any additional accuracy to floating-point based > code. x87 always had 32-bit and 64-bit floating point available, and > internally operates on 80-bit floating point numbers for increased accuracy > especially for things like sin(x) function it supports. Intel now > encourages programmers (and more importantly, compilers) to use SSE/SSE2 for > general floating point computation and hence x86-64 brings no update to the > older stack-based floating-point unit. Instead, it adds another 8 128-bit > SSE registers to bring the total up to 16. Floating point representations > continue to be 64-bit double precesion in x86-64. > > One way that the move to 64-bit integers can result in improved accuracy is > when programs employ fixed-point representations. For example, say I know > that some value will vary from 0 to 1. I could represent that value as a > 32-bit integer "x", and implicitly know that the actual number is x / 2^32. > Programmers used to do this sort of thing a lot back in the 386/486 days > when integer operations were significantly faster than floating-point ops. > This is less true than it used to be since integer multiplication/division > is now handled by the same unit that does floating-point multiplies (well, > except in the 90 nm version of the P4). But still there could be some > advantage since processors have more integer ALUs than floating-point/SSE > ALUs and are generally geared towards processing integer data faster than > floating-point data, especially for addition/subtraction/shift operations > (since they are needed for addressing in addition to integer math). On the > other hand, if you turn all your floating-point into fixed-point, then your > floating-point units go unused -- if you kept operations in floating-point, > then you can get parallelism inside the cpu with it using integer ALUs at > same time as FPU. So the net effect of using fixed-point these days is > unclear to me. > > Anyway, I digress. After digging around a bit in google, it looks to me > like povray uses floating-point representations, so I'm not sure why it > would be more accurate. Do you have a link I could follow that claims > increased accuracy? > x86-64 does not change the accuracy of floating-point work, as far as I know, but as you say it would make a difference in fixed point work (with appropriate source code). The article mentioning povray accuracy is at: http://www.linuxhardware.org/article.pl?sid=03/12/17/189239 I don't know anything about why povray is more accurate on the Opteron beyond what is in that article. > As for Quartus -- we don't have many cases of approximations which would > benefit from increased accuracy. Place and route is a mix of integer and > floating point code -- but most floating-point calculations don't need to be > terribly precise. Floating point is used (for example) when coming up with > a "score" for a given placement choice or to express how badly a signal > wants to use a wire during routing. We rarely even need double-precision, > since by their nature optimization decisions don't need to be super-precise > since you're really just trying to figure out which resource/configuration > is better than another. If we got to the point that our cost functions were > so good at predicting the right configuration that double-precision > round-off was detrimintaly affecting our optimization decisions, I think the > CAD optimization problem would be solved :-) > > For things like post p&r simulation and delay annotation, the accuracy > provided by greater-than-double-precision would not be needed since we can't > hope to ever model the exact workings the chip to that fine level of > accuracy anyway. If we are ps accurate, that's pretty good -- and compared > to a critical path of (say) 100 Mhz, that's 1/10000 accuracy, which is > easily handled by single-point precision. Of course, I'm glossing over > other benefits of increased precisions, such as reducing accumulation of > error when adding up many small numbers (like in a post p&r timing sim), but > still I doubt double-precision loses steam... > Having freely available 64-bit integer arithmetic would allow you to do these things in integers rather than floating point, which could improve spe ed and accuracy. In particular, they would let you hold your times in ps, and have as long delays as you want without having to worry about overflows or ranges. Whether it would be worth the effort or not, I have no idea. mvh., David > Regards, > > Paul Leventis > Altera Corp. > >
Site Home Archive Home FAQ Home How to search the Archive How to Navigate the Archive
Compare FPGA features and resources
Threads starting:
Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z