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Messages from 77650

Article: 77650
Subject: Re: Exportability of EDA industry from North America?
From: Stuart Brorson <sdb@cloud9.net>
Date: Thu, 13 Jan 2005 13:19:15 -0000
Links: << >>  << T >>  << A >>
In sci.electronics.cad Richard Griffith <rgriffith@istop.com> wrote:
: EDA wannabe wrote:
:> Some colleagues and I were discussing the situation with the high tech
:> industry, with jobs moving out of North America.  This has hit circuit
:> designers hard, especially those in digital.  Can EDA tool development
:> be expected to follow suit, is has it already happened?  If not, what
:> are the factors that differentiate it from design work to make it less
:> exportable?  Comments are also welcome for automatation of methodologies
:> for programmable system-on-chip e.g. reconfigurable processor arrays.

: I would say it is time for the EDA industry to flip to open source code.
: All the fabless startups are just killed by the tool expenditures they 
: need to make.

: 1. OpenSource simulator:
:        analog -> spice

ngspice: 
http://sourceforge.net/projects/ngspice

tclspice: 
http://tclspice.sourceforge.net/

GnuCap
http://www.geda.seul.org/tools/gnucap/index.html


:        digital->?
Icarus Verilog:
http://www.icarus.com/eda/verilog/

Alliance:
http://www-asim.lip6.fr/recherche/alliance/

Confluence:
http://www.launchbird.com/products.html


:        mixed->?
Not there yet.  :-(  However, SystemC can be used for this kind of
work.  Is it synthesizable yet?  Are the synthesis implementations
open-source?  (I don't watch this area that much.)


: 2. Schematic capture

gEDA (has schematic caputre, attribute management, netlisting,
archiving, and other utilties useful for design):
http://www.geda.seul.org/

Electric:
http://www.staticfreesoft.com/index.html

XCircuit:
http://xcircuit.ece.jhu.edu/index.html


: 3. Netlister/code capture. I don't think even the professional EDA tools 
: have this right. Why does multiplier.sch or multipler.c have only 1 
: view. Why not version control/views built into the editor where the 
: netlister can be set to grab different versions or the editor highlight 
: the delta's. A configuration view that sees all views from system level 
: to extracted with all their associated versions and tags.

Not there yet, as far as I know.  :-(


: 4. Layout editor/GDS viewer. How many polygons does a video game push?

Magic:
http://bach.ece.jhu.edu/~tim/programs/magic/index.html

Alliance:
http://www-asim.lip6.fr/recherche/alliance/


: 5. Schematic/Layout/System viewers that allow properties to attach. 
: Wires colored by current, sized by voltage. Visualization tools.

Interesting ideas.  Who implements these in the commercial world?


: I think the industry needs open source tools.

Here's the problem with open-source EDA:  How will developers be able
to support themselves while writing the stuff?  What's the economic
model?  Right now it's a hobbiest/academic effort, and the tools are
at the point where they are useful to students, hobbiests, consultants,
and small businesses.  But to really go for the high-end (as you
wish), open-source EDA needs to become economically self-supporting.  

Linux became economically self-supporting (for some) when big
companies like IBM got into it.  The companies supporting Linux right
now are those who see their business models as selling consulting
services, or higher-layer software (e.g. databases, accounting
systems) which runs on Linux.  To them, Linux is just some plumbing
which supports their stuff.  The folks who are threatened by Linux
(and open-source in general) are those who actually want to sell
software as their main line of business. 

By analogy, the major EDA houses will not be the folks pushing
open-source EDA into the big-time.  Rather, it will be design service
bureaus and large design houses.  However, this is a fragmented
industry.  There is not a single big player -- like IBM -- with the
power and vision to step up to the plate and push open-source EDA
within the industry.  Also, the design services industry is not flush
with cash right now now (due to the general collapse of engineering in
the first world), so I doubt they will be hiring teams of software
developers to work on open-source EDA apps anytime soon.

Stuart

Article: 77651
Subject: Re: Starting with xilinix and Linux
From: "B. Joshua Rosen" <bjrosen@polybus.com>
Date: Thu, 13 Jan 2005 08:37:08 -0500
Links: << >>  << T >>  << A >>
On Thu, 13 Jan 2005 09:58:42 +0100, Michael Schuster wrote:

> B. Joshua Rosen wrote:
>> I have a page that provides information on running Xilinx tools on Linux
>> with wine. I stopped maintaining it when Xilinx started offering native
>> Linux tools. However you should fine it helpfulfor running webpack undre
>> wine.
>> 
>> http://www.polybus.com/xilinx_on_linux.html
> Thanks for your reply. 
> 
> The hint here with 
> [version]
>  "windows" = "win2k"
> didn't make this runnig better. 
> 
> We think of buying the tools. But they told us: You can buy, but for SuSE
> you won't get a guarantee that it'll work. But for this and the money
> reason with still give wine a chance. 
> 
> Michael

I've run the Xilinx tools on a lot of distributions, Mandrake 9.2
(2.4.something kernel), Mandrake 10.0 (2.6.3), Mandrake 10.1(2.6.8.1),
Fedora Core 3 (both 32 and 64 bit versions, 2.6.9 kernel), and Whitebox
Linux (which is Redhat Enterprise 3.0, 2.4.21 kernel). There is no
indication that anything is distribution dependent, it works on all of
those distributions. I've also had no problem getting Xilinx support. You
won't have any trouble running it on SUSE 9.2. If you file a webcase
Xilinx doesn't ask which distribution, they only ask if it's Linux or
Windows. 


Article: 77652
Subject: Re: Exportability of EDA industry from North America?
From: Chuck Harris <cf-NO-SPAM-harris@erols.com>
Date: Thu, 13 Jan 2005 08:54:47 -0500
Links: << >>  << T >>  << A >>
Stuart Brorson wrote:

> ngspice: 
> http://sourceforge.net/projects/ngspice
> 
> tclspice: 
> http://tclspice.sourceforge.net/
> 
> GnuCap
> http://www.geda.seul.org/tools/gnucap/index.html
> 
> 
> :        digital->?
> Icarus Verilog:
> http://www.icarus.com/eda/verilog/
> 
> Alliance:
> http://www-asim.lip6.fr/recherche/alliance/
> 
> Confluence:
> http://www.launchbird.com/products.html
> 
> 
> :        mixed->?
> Not there yet.  :-(  However, SystemC can be used for this kind of
> work.  Is it synthesizable yet?  Are the synthesis implementations
> open-source?  (I don't watch this area that much.)
> 
> 
> : 2. Schematic capture
> 
> gEDA (has schematic caputre, attribute management, netlisting,
> archiving, and other utilties useful for design):
> http://www.geda.seul.org/

The gEDA system is a very nice idea... It is truly a shame that it
is packaged with insufficient thought to portability.  It wants the
system libraries it uses to be stuffed in non standard places inorder for
it to find them.  It doesn't recognize that Redhat, and some of the
other distributions use differing names for some of the normal system
libraries. (GTK+ 2 comes to mind)

If you want to install the gEDA system so it is available to all users on
a multiuser system, you have to give all of those users root privileges on
certain system directories...There is no excuse for that!

All of the example designs are broken in such a way that they cannot find
the active components to put on the schematic.

There are no examples or documents describing how the project manager is
supposed to work.  Saying it is obvious isn't much help.

The CDROM that was issued the other day is even worse than useless.  It
chugs and churns, but it doesn't notice that it cannot find certain libraries,
and it just goes on like everything is ok.  It also rebuilds and installs
the symbol libraries so many times I thought it was stuck in a loop.

Close, but not quite ready for prime time.

-Chuck Harris

Article: 77653
Subject: Re: Programming and copyright
From: "Kryten" <kryten_droid_obfusticator@ntlworld.com>
Date: Thu, 13 Jan 2005 14:03:27 GMT
Links: << >>  << T >>  << A >>
> I'm developing a software on a Cyclone FPGA. However now we are think
> about the security of the device : I mean, the code is stored on a
> flash extern to the Cyclone. What can prevent someone from copying the
> data on this flash and clone the product we are doing ?

Hi Nick.

I don't think there are easy answers here.

If the config code is off-chip, then it can be copied from the flash or 
intercepted at the bitstream pins.

I used to work for a smartcard company and they have the same sort of 
issues:
one has to get a load of blank cards programmed by someone you can't risk 
trusting (e.g. far eastern outfit). How to stop 'extra' cards being made?

The card manufacturer makes them with boot code so they can be programmed by 
the software writers to contain their OS boot code and crypto keys. This can 
be done in bulk, before shipping to banks.

The bank can then 'personalise' cards to individual customers, by talking to 
the OS. The OS handles secure communication, code and data are loaded in 
encrypted form. This includes random elements, so that the encrypted loading 
data is different every time (and thus harder to attack).

The card decrypts the code/data before storage. Smartcards are designed to 
make cracking difficult (though of course it is still possible). Address and 
data lines are in buried layers to make them harder to probe.

FPGAs are not designed with such anti-hacking measures (AFAIK).
By nature, their structure is fairly regular.
There is no dedicated micro to do encrypted loading, and if there were it 
would need a few K of ROM to hold the software. And there would still be a 
decrypted bitstream somewhere that could be probed.

I hear that FPGA makers are trying to add some crypto on some devices, but I 
don't know how effective it will be. Security is not a trivial matter to do 
right.

Essentially, each chip (or batch of chips) has to be different in some way 
(e.g. the loading keys) so that one config pattern cannot config endless 
numbers of pirate products.

One idea (for instance) might be to have the chips have each bit of the 
config shift register XORed with a key bit. You would need to know that 
pattern to XOR the config data. The chip maker would supply the XOR keys, 
and you would create the unique config data for each chip. They can then be 
made up by untrusted party in the far east, who cannot use the data for 
other chips.

Of course the XOR key would be as big as the data so some more practical 
crypto system would be used. But the principle of individualising the chips 
with a key is the same.




Article: 77654
Subject: MHS modify and then ...?
From: "Hur" <jyhur@dutepp0.et.tudelft.nl>
Date: Thu, 13 Jan 2005 15:09:22 +0100
Links: << >>  << T >>  << A >>
hi

In XPS (EDK 6.3), we need to modify the MHS file (manually) sometimes, then
we have conflicts with MSS file (and other system configuration)

For example, when I changed the name of instance, netlist generation seems
ok, but bitstream generation is not ok.

I tried in command prompt,
> xps -nw
% run resync

But also it is not ok.

Then the problem is

- How can we synchronize the setting in XPS to make this system work (in XPS
or manually) ?




Article: 77655
Subject: Re: MHS modify and then ...?
From: Daniel <>
Date: Thu, 13 Jan 2005 06:17:55 -0800
Links: << >>  << T >>  << A >>
Did you try to manualy add the changes to the mss file - Thats what I normally do...

regards Daniel

Article: 77656
Subject: Re: Starting with xilinix and Linux
From: Steve Glow <sag@ollies.net>
Date: Thu, 13 Jan 2005 09:54:20 -0500
Links: << >>  << T >>  << A >>
Michael Schuster wrote:
>
> 
> I tried to install the ise 6.3 with wine, but it didn't work. Do you have
> some hints? (Using SuSE 9.2 prof)
> 
> Michael 

I've been running WebPack 6.3 using wine under Gentoo linux for a while 
now with no problems.  My wine version is 20041019.  The only native 
.dll files I have in my windows directory are mfc42.dll and msvcp60.dll.

As I recall, I ran into no hitches during the install, it just worked 
normally.  I may have had some pop-up windows appear under other 
windows, this is a common problem with wine and I'm used to it.

The GUI programs seem to work well although they are slow under wine.  I 
tend to use the command line versions which seem to run at normal speed. 
  I just run a unix script file to synthesize my project.

To call the individual programs (xst, map, etc) I created the following 
shell script and created symlinks to it for each program I wanted to use:

------------------------------------------------------------
#!/bin/bash
export WINEPREFIX=/home/sag/wine/Xilinx
export XILINX=c:\\Xilinx
export WINEDEBUG=-fixme-all
wine "$XILINX/bin/nt/${0##*/}" $*
------------------------------------------------------------

That last line in the script starts the xilinx program with the same 
name as the script.  Since I use symlinks to this script I can use the 
same script for all the programs.  For example, I have a symlink named 
xst which points to this script and it causes the windows native xst.exe 
program to be run under wine.

In general, it looks to me like the good Xilinx software engineers have 
intentionally made these tools wine friendly.  I which everyone would do 
that (or even better support Linux natively).

Good luck,

Steve

Article: 77657
Subject: Re: Exportability of EDA industry from North America?
From: Stuart Brorson <sdb@cloud9.net>
Date: Thu, 13 Jan 2005 15:30:27 -0000
Links: << >>  << T >>  << A >>
In sci.electronics.cad Chuck Harris <cf-NO-SPAM-harris@erols.com> wrote:
:> gEDA (has schematic caputre, attribute management, netlisting,
:> archiving, and other utilties useful for design):
:> http://www.geda.seul.org/

: The gEDA system is a very nice idea... It is truly a shame that it
: is packaged with insufficient thought to portability.  

I'm sorry to hear that you have problems installing gEDA.  It seems to
work for many other people.   I am one of the active developers.
Accordingly, I am always interested in specific bug reports so I can
then fix problems, and robustify the application.  Therefore, can you
please be more specific?  I'd be happy to fix whatever I can if I had
some hard information.  

Particularly relevant info:

*  Linux distro & revision level
*  Installation flavor (i.e. RedHat comes in "personal", "workstation",
   "server", and so on.  SuSE comes in "personal" and "professional").

: It wants the
: system libraries it uses to be stuffed in non standard places inorder for
: it to find them.  It doesn't recognize that Redhat, and some of the
: other distributions use differing names for some of the normal system
: libraries. (GTK+ 2 comes to mind)

If you build it from source (or use the CD) the "configure" step takes
care of all of this -- in principle.  If it isn't working for you, we
would like to fix it.  Please report:  Which system libs go in
non-standard places, what are the non-standard places, and what
method of installation are you using?  Also, what type of system do
you use (i.e. Linux distro)?  

: If you want to install the gEDA system so it is available to all users on
: a multiuser system, you have to give all of those users root privileges on
: certain system directories...There is no excuse for that!

Which system directories?  And what method of installation?

: All of the example designs are broken in such a way that they cannot find
: the active components to put on the schematic.

This is an interesting point.  I can look into this.  I don't know how
the lib search paths are set in the examples.  I believe they are
configurable when you install from source, but if you are using a
binary distro, then they might be hardcoded.

: There are no examples or documents describing how the project manager is
: supposed to work.  Saying it is obvious isn't much help.

True, certain things lack documentation.  That problem is being
worked, but ever-so-slowly.  Please remember that gEDA is a volunteer
effort, and getting engineers to document their stuff is not always
easy.  You probably know this.

: The CDROM that was issued the other day is even worse than useless.  It
: chugs and churns, but it doesn't notice that it cannot find certain libraries,
: and it just goes on like everything is ok.  It also rebuilds and installs
: the symbol libraries so many times I thought it was stuck in a loop.

Again, what Linux distro & rev level are you using?  The CD was tested
on several modern Linux variants.  In the CD's README are listed the
systems which will and won't work.  Did you read the README? 

: Close, but not quite ready for prime time.

With some work, and specific info about problems, it will become ever
more polished over time.  Keep in mind that generalized kvetching is
cheap 'n easy, but offering bug details will help everybody.

Thank you for your detailed bug report.

Stuart

Article: 77658
Subject: Re: Starting with xilinix and Linux
From: Michael Schuster <schusterSoccer@enertex.de>
Date: Thu, 13 Jan 2005 16:43:50 +0100
Links: << >>  << T >>  << A >>
Uwe Bonnes wrote:

> So get the 60 day demo first and test on Linux. Here Foundation ( as a
> europractice site license) worked fine with
> with Suse 9.0, a short test now shows that this d*mn*d
> Wind/U X-toolkit produces an Error: wuDisplay: Can't open display

correct me if I'm wrong: There isn't a linux trail version.
Michael
-- 
Remove the sport from my address to obtain email
www.enertex.de - Innovative Systemlösungen der Energie- und Elektrotechnik

Article: 77659
Subject: Re: Starting with xilinix and Linux
From: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Date: Thu, 13 Jan 2005 15:49:28 +0000 (UTC)
Links: << >>  << T >>  << A >>
Steve Glow <sag@ollies.net> wrote:
> The GUI programs seem to work well although they are slow under wine.  I 
> tend to use the command line versions which seem to run at normal speed. 
>   I just run a unix script file to synthesize my project.

For a kernel patch, see e,g,

http://www.ussg.iu.edu/hypermail/linux/kernel/0410.1/1246.html

No luck son long. I am now taking another approach to get the patch into the
kernel.

Bye
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Article: 77660
Subject: Re: Starting with xilinix and Linux
From: Michael Schuster <schusterSoccer@enertex.de>
Date: Thu, 13 Jan 2005 16:51:39 +0100
Links: << >>  << T >>  << A >>
Steve Glow wrote:

> Michael Schuster wrote:
>>
>> 
>> I tried to install the ise 6.3 with wine, but it didn't work. Do you have
>> some hints? (Using SuSE 9.2 prof)
>> 
>> Michael
> 
> I've been running WebPack 6.3 using wine under Gentoo linux for a while
> now with no problems.  My wine version is 20041019.  The only native
> .dll files I have in my windows directory are mfc42.dll and msvcp60.dll.
I also tried wine 20040813, but there was no difference.
Which WebPack did you download? I used this one:
WebPACK_63_fcfull_i.exe


Michael
-- 
Remove the sport from my address to obtain email
www.enertex.de - Innovative Systemlösungen der Energie- und Elektrotechnik

Article: 77661
Subject: Re: Exportability of EDA industry from North America?
From: Chuck Harris <cf-NO-SPAM-harris@erols.com>
Date: Thu, 13 Jan 2005 11:57:45 -0500
Links: << >>  << T >>  << A >>
Hi Stuart,

Stuart Brorson wrote:
> In sci.electronics.cad Chuck Harris <cf-NO-SPAM-harris@erols.com> wrote:

> : The gEDA system is a very nice idea... It is truly a shame that it
> : is packaged with insufficient thought to portability.  
> 
> I'm sorry to hear that you have problems installing gEDA.  It seems to
> work for many other people.   I am one of the active developers.
> Accordingly, I am always interested in specific bug reports so I can
> then fix problems, and robustify the application.  Therefore, can you
> please be more specific?  I'd be happy to fix whatever I can if I had
> some hard information.  
> 
> Particularly relevant info:
> 
> *  Linux distro & revision level
> *  Installation flavor (i.e. RedHat comes in "personal", "workstation",
>    "server", and so on.  SuSE comes in "personal" and "professional").

RedHat 9, Workstation, upgraded to the latest fixes on FreshRPM's apt-get
repository.
> 
> : It wants the
> : system libraries it uses to be stuffed in non standard places inorder for
> : it to find them.  It doesn't recognize that Redhat, and some of the
> : other distributions use differing names for some of the normal system
> : libraries. (GTK+ 2 comes to mind)

Redhat 9 calls GTK+ 2.0 GTK2, but your configuration scripts are looking for
GTK+-2.0  So they don't find GTK2, and back down to GTK+ 1.2

Your scripts on the latest version of gSchem cannot find the dynamic links
for libstroke, or libgdg* , even though they are in /usr/local/lib (with
all the other libraries it did find):

$ ls /usr/local/lib/libst*

         /usr/local/lib/libstroke.a   /usr/local/lib/libstroke.so.0
         /usr/local/lib/libstroke.la  /usr/local/lib/libstroke.so.0.0.5
         /usr/local/lib/libstroke.so

$ ls /usr/local/lib/libgdg*
         /usr/local/lib/libgdgeda.a   /usr/local/lib/libgdgeda.so.6
         /usr/local/lib/libgdgeda.la  /usr/local/lib/libgdgeda.so.6.0.0
         /usr/local/lib/libgdgeda.so

$ ldd `which gschem`

         libstroke.so.0 => not found
         libgeda.so.22 => /home/chuck/gEDA/geda-install/lib/libgeda.so.22 (0x40033000)
         libguile.so.12 => /usr/lib/libguile.so.12 (0x4006f000)
         libguile-ltdl.so.1 => /usr/lib/libguile-ltdl.so.1 (0x400fc000)
         libcrypt.so.1 => /lib/libcrypt.so.1 (0x40103000)
         libgdgeda.so.6 => not found
         libpng12.so.0 => /usr/lib/libpng12.so.0 (0x40131000)
         libm.so.6 => /lib/tls/libm.so.6 (0x40154000)
         libglib-1.2.so.0 => /usr/lib/libglib-1.2.so.0 (0x40176000)
         libgtk-1.2.so.0 => /usr/lib/libgtk-1.2.so.0 (0x4019b000)
         libgdk-1.2.so.0 => /usr/lib/libgdk-1.2.so.0 (0x402e3000)
         libgmodule-1.2.so.0 => /usr/lib/libgmodule-1.2.so.0 (0x4031b000)
         libdl.so.2 => /lib/libdl.so.2 (0x4031f000)
         libXi.so.6 => /usr/X11R6/lib/libXi.so.6 (0x40323000)
         libXext.so.6 => /usr/X11R6/lib/libXext.so.6 (0x4032b000)
         libX11.so.6 => /usr/X11R6/lib/libX11.so.6 (0x40339000)
         libSM.so.6 => /usr/X11R6/lib/libSM.so.6 (0x40418000)
         libICE.so.6 => /usr/X11R6/lib/libICE.so.6 (0x40421000)
         libc.so.6 => /lib/tls/libc.so.6 (0x42000000)
         libgdgeda.so.6 => /usr/local/lib/libgdgeda.so.6 (0x40439000)
         libz.so.1 => /usr/lib/libz.so.1 (0x4046b000)
         libglib-2.0.so.0 => /usr/lib/libglib-2.0.so.0 (0x40479000)
         /lib/ld-linux.so.2 => /lib/ld-linux.so.2 (0x40000000)

> 
> If you build it from source (or use the CD) the "configure" step takes
> care of all of this -- in principle.  If it isn't working for you, we
> would like to fix it.  Please report:  Which system libs go in
> non-standard places, what are the non-standard places, and what
> method of installation are you using?  Also, what type of system do
> you use (i.e. Linux distro)?  

In the past, using source and ./configure, make, and make install, it did
do the right thing, but this latest 2004 release behaves differently.

> 
> : If you want to install the gEDA system so it is available to all users on
> : a multiuser system, you have to give all of those users root privileges on
> : certain system directories...There is no excuse for that!
> 
> Which system directories?  And what method of installation?

This comes directly from one of the documentation file included with gEDA.  If you
install using root, ./configure will put everything in the '/usr/local/' tree,
including all of the project files, and other files the user generates.  I cannot
find the exact doc file where I found this written, but that file says that the
users must have write privileges on the /usr/local tree inorder to use the
system if it is installed that way.  The author made it sound like something
that everyone would do... A very stupid windowsesque sort of thing.

> 
> : All of the example designs are broken in such a way that they cannot find
> : the active components to put on the schematic.
> 
> This is an interesting point.  I can look into this.  I don't know how
> the lib search paths are set in the examples.  I believe they are
> configurable when you install from source, but if you are using a
> binary distro, then they might be hardcoded.

All of the transistors, diodes and IC's used in the example programs are
located in a subdirector or the individual example program.  There is no
info present that explains how to encourage gSchem to connect the two.
Presumably that info would in the project file used for the project where
these examples reside... only no project files are included.

> 
> : There are no examples or documents describing how the project manager is
> : supposed to work.  Saying it is obvious isn't much help.
> 
> True, certain things lack documentation.  That problem is being
> worked, but ever-so-slowly.  Please remember that gEDA is a volunteer
> effort, and getting engineers to document their stuff is not always
> easy.  You probably know this.

I very much understand this.  But at this time, it is well below the usual
level of documentation found in Gpl'd software.
> 
> : The CDROM that was issued the other day is even worse than useless.  It
> : chugs and churns, but it doesn't notice that it cannot find certain libraries,
> : and it just goes on like everything is ok.  It also rebuilds and installs
> : the symbol libraries so many times I thought it was stuck in a loop.
> 
> Again, what Linux distro & rev level are you using?  The CD was tested
> on several modern Linux variants.  In the CD's README are listed the
> systems which will and won't work.  Did you read the README? 

Absolutely!  And I am running RedHat 9, a system that should work... All
the versions of my various tools are at or above the rev levels required.

The first time I ran the CDROM install, it built and installed the symbols
libraries at least 20 times before I killed the process.  (I was getting
curious as to why it was taking so long, and why every hour or so I would
look at it and it was building the symbols yet again.)

> 
> : Close, but not quite ready for prime time.
> 
> With some work, and specific info about problems, it will become ever
> more polished over time.  Keep in mind that generalized kvetching is
> cheap 'n easy, but offering bug details will help everybody.

I have a definite desire for gEDA to succeed, as I think
GPL'd software is the future.  But at this stage, gEDA 20041228
shouldn't have been released to the public.  If a guy like me who
has been working with unix for 30 years, and linux since the first
slackware distribution can't make your package work, how much chance
does anyone else have?

-Chuck

Article: 77662
Subject: Xilinx FPGA editor
From: =?ISO-8859-1?Q?Gr=E9gory_Mermoud?= <gregory.mermoud@epfl.ch>
Date: Thu, 13 Jan 2005 18:05:38 +0100
Links: << >>  << T >>  << A >>
Hi all!

I wonder if it is possible to run a FPGA editor script without graphical 
interface. Does it exist an option to run FPGA editor without its GUI ?

Grégory

Article: 77663
Subject: Re: MHS modify and then ...?
From: jyhur <jyhur@dutepp0.et.tudelft.nl>
Date: Thu, 13 Jan 2005 18:33:15 +0100
Links: << >>  << T >>  << A >>
hi

yes i changed (MHS and MSS)

- parameter instance name (but not miscroblaze name)
- bus interface instance name
- port instance name

and test program (print "hello world") is okay, though the message below 
is appeared

---------------------------------------------------------------------------
Release 6.3i Trace G.38
Copyright (c) 1995-2004 Xilinx, Inc. All rights reserved.

trce -e 3 -xml system.twx system.ncd system.pcf


Design file: system.ncd
Physical constraint file: system.pcf
Device,speed: xc2vp30,-6 (PRODUCTION 1.90 2004-11-02)
Report level: error report

INFO:Timing:2752 - To get complete path coverage, use the unconstrained 
paths
option. All paths that are not constrained will be reported in the
unconstrained paths section(s) of the report.
Done.

---------------------------------------------------------------------------

Thankyou
regards

Daniel wrote:
> Did you try to manualy add the changes to the mss file - Thats what I normally do...
> 
> regards Daniel


Article: 77664
Subject: Re: Xilinx FPGA editor
From: Bret Wade <bret.wade@xilinx.com>
Date: Thu, 13 Jan 2005 10:55:48 -0700
Links: << >>  << T >>  << A >>
Grégory Mermoud wrote:
> Hi all!
> 
> I wonder if it is possible to run a FPGA editor script without graphical 
> interface. Does it exist an option to run FPGA editor without its GUI ?
> 
> Grégory

Check out the "fpga_edline" command. It accepts script files with the 
"-p <scr_file>" switch.

Example command to lock all macros in a design:
fpga_edline -p test.scr test.ncd

Where test.scr is:
select macro *
setattr Locate LOCK:HARD:0::
save
exit

Commands available are documented here:
http://toolbox.xilinx.com/docsan/xilinx6/help/fpga_editor/fpga_editor.htm

Does anyone remember hm2nmc?

Cheers,
Bret


Article: 77665
Subject: Re: Programming and copyright
From: "Falk Brunner" <Falk.Brunner@gmx.de>
Date: Thu, 13 Jan 2005 19:05:18 +0100
Links: << >>  << T >>  << A >>

"glen herrmannsfeldt" <gah@ugcs.caltech.edu> schrieb im Newsbeitrag
news:5smdndldF9p6dXjcRVn-qg@comcast.com...

> Wasn't there a story about some TLA (three letter agency)
> putting taps on fiber optic cables on the bottom of the ocean?
> (Without either end noticing.)

Urban legends? Just PR?? Iam sure if you throw a hell of money at something,
you can do things that are close to impossible. But the infromation warefare
is much easier to do by spreading out legends, myths etc. Hollywood is
always aside ("Enemy of the state" , nice movie ;-)

Regards
Falk





Article: 77666
Subject: Re: Programming and copyright
From: "Falk Brunner" <Falk.Brunner@gmx.de>
Date: Thu, 13 Jan 2005 19:08:04 +0100
Links: << >>  << T >>  << A >>

"Nick" <char-DONTBUGME-les@YY.iiedotcnam.france> schrieb im Newsbeitrag
news:212cu0hkju645r6o1stlqfov5qo65mfnnm@4ax.com...

> Using a volatile sram + battery to keep the code scares me because i
> need to be sure that the product work in more than 10 years.
> I think I'll settle for an external prom chip and a special hanshake.

This discussion is not new, there is a article/website dicussing this very
problem (Sorry, dont have the link handy) . And the external PROM/uC/CPLD
ist not as secure as you might think.

Regards
Falk




Article: 77667
Subject: Re: Starting with xilinix and Linux
From: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Date: Thu, 13 Jan 2005 18:13:42 +0000 (UTC)
Links: << >>  << T >>  << A >>
Michael Schuster <schusterSoccer@enertex.de> wrote:
> Steve Glow wrote:

> > Michael Schuster wrote:
> >>
> >> 
> >> I tried to install the ise 6.3 with wine, but it didn't work. Do you have
> >> some hints? (Using SuSE 9.2 prof)
> >> 
> >> Michael
> > 
> > I've been running WebPack 6.3 using wine under Gentoo linux for a while
> > now with no problems.  My wine version is 20041019.  The only native
> > .dll files I have in my windows directory are mfc42.dll and msvcp60.dll.
> I also tried wine 20040813, but there was no difference.
> Which WebPack did you download? I used this one:
> WebPACK_63_fcfull_i.exe


It looks like you still didn't copy the mfc42/msvcp60 dll to the wine system
directory?  
-- 
Uwe Bonnes                bon@elektron.ikp.physik.tu-darmstadt.de

Institut fuer Kernphysik  Schlossgartenstrasse 9  64289 Darmstadt
--------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------

Article: 77668
Subject: Doubts in XCF01S Programming.txt
From: "Shreyas Kulkarni" <shyran@gmail.com>
Date: 13 Jan 2005 10:26:14 -0800
Links: << >>  << T >>  << A >>
hi there,

i have been working on a pci data acquisition card using spartan3 as
the
pci controller and platform flash(XCF01S) for configuration.
for configuration, i have decided to build the parallel DLC III as
specified by xilinx.

i have developed some doubts regarding the configuration process using
the cable -

the cable schematic is shown to be connected to the fpga and not to the
platform flash. the jtag pins are morphed into programming pins of
fpga.
will i have any problems if i directly connect the pins to the jtag
port
of the flash memory?

second, if i keep everything off except the VCCJ and VCCINT power
supply
and then program the flash mem using the jtag port, will it work?
i mean, if the card is completely isolated from the pci slot, and only
VCC(derived from external 3.3V source and given to VCCJ and VCCINT),
GND and 4 jtag pins are connected to the (modified)programming cable,
will it work? will the flash get programmed properly?
has somebody done it before?


hope i have made myself clear enough and not confused you people.
thanks in advance.


regards,
Shreyas Kulkarni


Article: 77669
Subject: Re: Lattice DDR Interface
From: Luc <lb.edc@pandora.be>
Date: Thu, 13 Jan 2005 19:17:25 GMT
Links: << >>  << T >>  << A >>


Hi André

Your first source would be one of the Lattice FAE's. They will
certainly help you in isolating the problem and finding a solution.

Regards,
Luc
On 12 Jan 2005 04:11:02 -0800, ALuPin@web.de (ALuPin) wrote:

>Hi newsgroup folks,
>
>I am trying to use the new EC/ECP - DDR interface which can be instantiated 
>in the IP-Manager of ispLEVER4.2
>
>When trying to map it I get a memory error and the mapping 
>is aborted.
>
>I am using WINDOWS2000 SP4
>
>
>Has someone tried to use this new interface ? Have you experienced
>such errors? What other experiences did you have with that new
>interface?
>
>Thank you for you opinion.
>
>Rgds
>André


Article: 77670
Subject: Re: Programming and copyright
From: Eric Smith <eric-no-spam-for-me@brouhaha.com>
Date: 13 Jan 2005 11:39:10 -0800
Links: << >>  << T >>  << A >>
glen herrmannsfeldt <gah@ugcs.caltech.edu> writes:
> Wasn't there a story about some TLA (three letter agency)
> putting taps on fiber optic cables on the bottom of the ocean?
> (Without either end noticing.)

They almost certainly have the capability to do so, but if they've done
it we wouldn't know, would we?

The nuclear-powered attack submarine USS Jimmy Carter (SSN-23) is
specially equipped to allow undersea cables to be pulled into a payload
bay and worked on.

Article: 77671
Subject: Re: Starting with xilinix and Linux
From: Eric Smith <eric-no-spam-for-me@brouhaha.com>
Date: 13 Jan 2005 11:41:24 -0800
Links: << >>  << T >>  << A >>
Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de> writes:
> So get the 60 day demo first and test on Linux.

The demo doesn't include the Linux binaries.  Since WebPACK 7.1 is
expected to include Linux support, maybe the ISE 7.1 demo will?

Article: 77672
Subject: Re: Programming and copyright
From: "Peter Alfke" <peter@xilinx.com>
Date: 13 Jan 2005 11:43:36 -0800
Links: << >>  << T >>  << A >>
That last-mentioned idea is the equivalent of the classical
"one-time-pad", which is inherently unbreakable, but also not very
practical.
Peter Alfke


Article: 77673
Subject: Re: Doubts in XCF01S Programming.txt
From: "Gabor" <gabor@alacron.com>
Date: 13 Jan 2005 12:06:49 -0800
Links: << >>  << T >>  << A >>
Shreyas Kulkarni wrote:
> hi there,
>
> i have been working on a pci data acquisition card using spartan3 as
> the
> pci controller and platform flash(XCF01S) for configuration.
> for configuration, i have decided to build the parallel DLC III as
> specified by xilinx.
>
> i have developed some doubts regarding the configuration process
using
> the cable -
>
> the cable schematic is shown to be connected to the fpga and not to
the
> platform flash. the jtag pins are morphed into programming pins of
> fpga.
> will i have any problems if i directly connect the pins to the jtag
> port
> of the flash memory?
If you want to program the platform flash in-circuit you must connect
to the jtag pins of the xcf01.  The standard approach is to create a
chain with the xcf01 taking TDI from the cable and passing its TDO
to the FPGA.  The FPGA TDO then connects to the cable.  This allows
programming the flash, or directly programming the FPGA using impact.
TMS, TCK pins connsct to both flash ans FPGA.  Xilinx has schematics
showing this on p. 14 of the xcf01 datasheet.
However, if it is your intent to program the flash when the board is
not powered, I would suggest separating the jtag of the flash from
this loop, so you don't need to power the FPGA.  This presumes that
you have somehow isolated the flash power supply from the rest of the
circuit.  It would also be a good idea to prevent the flash programming
outputs (D0/DIN, CF, CCLK) from driving the unpowered FPGA.  I have
done this by placing a "quickswitch" part in-between the flash and
the FPGA.
>
> second, if i keep everything off except the VCCJ and VCCINT power
> supply
> and then program the flash mem using the jtag port, will it work?
> i mean, if the card is completely isolated from the pci slot, and
only
> VCC(derived from external 3.3V source and given to VCCJ and VCCINT),
> GND and 4 jtag pins are connected to the (modified)programming cable,
> will it work? will the flash get programmed properly?
> has somebody done it before?
>
>
> hope i have made myself clear enough and not confused you people.
> thanks in advance.
> 
> 
> regards,
> Shreyas Kulkarni


Article: 77674
Subject: Re: Doubts in XCF01S Programming.txt
From: "Falk Brunner" <Falk.Brunner@gmx.de>
Date: Thu, 13 Jan 2005 21:08:36 +0100
Links: << >>  << T >>  << A >>

"Shreyas Kulkarni" <shyran@gmail.com> schrieb im Newsbeitrag
news:1105640774.507404.297210@c13g2000cwb.googlegroups.com...

> pci controller and platform flash(XCF01S) for configuration.
> for configuration, i have decided to build the parallel DLC III as
> specified by xilinx.
>
> i have developed some doubts regarding the configuration process using
> the cable -
>
> the cable schematic is shown to be connected to the fpga and not to the
> platform flash. the jtag pins are morphed into programming pins of
> fpga.

???
Dont mix it up. There are the configuration pins of the FPGA, D0, CCLK, INIT
PROGRAM, connected to the FLASH.
And there is JTAG, another interface, which is used to configure the FPGA
(if you like to) or program the FLASH (the only way to program the flash)

> will i have any problems if i directly connect the pins to the jtag
> port
> of the flash memory?

No.

> second, if i keep everything off except the VCCJ and VCCINT power
> supply
> and then program the flash mem using the jtag port, will it work?

Hmmm, you have to make sure that the FPGA is not "illigaly" powered via the
connetion to the FLASH. Its the best solution to have a full power supply
for your card, so the FPGA has all three (Vcore, Vio and Vaux) and the FLASH
has its supply. Shouldnt be too hard to do.

Regards
Falk






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