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Jay wrote: > > Sometimes they're looking for nice credentials on paper because > they're still trying to attract investment from people who couldn't > judge a good engineer by any other means than the name of the school > on the diploma, which is pretty funny because the correlation isn't > all that high between a "top 5 school" and being a kick-ass designer. > They'll figure it out eventually. That can go back to the principals being from the bio/chem world where these credentials make all the difference. If they are trying to attract investors, they will be selling the marketability of the end result which will not be in the the engineering world, but in the bio/chem world. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAXArticle: 50926
Ray, You're way too nice... I mean, if this person is supposedly going to be an engineer, or interested in engineering...and can't find out on their own was a "serdes" is by using a search engine...do you really want them attempting to do any (cough) "engineering"? Ah well, I guess it is XMass ... ;-) "Ray Andraka" <ray@andraka.com> wrote in message news:3E070EDE.753188D0@andraka.com... > serdes is short for Serializer-Deserializer (like modem is > short for modulator-demodulator). If you have to ask what > it is, you probably don't need it, at least not now. It is > used for high speed serial communication between chips or > systems. > > FPGA wrote: > > > What's a serdes, and do I need it? > > -- > --Ray Andraka, P.E. > President, the Andraka Consulting Group, Inc. > 401/884-7930 Fax 401/884-7950 > email ray@andraka.com > http://www.andraka.com > > "They that give up essential liberty to obtain a little > temporary safety deserve neither liberty nor safety." > -Benjamin > Franklin, 1759 > >Article: 50927
Thank you very much for your reply.
oh,really. Thank you very much!!
Toshihiro Yazawa
Jay <kayrock66@yahoo.com> wrote in message
news:d049f91b.0212221533.23747000@posting.google.com...
> Your English isn't so good? OMG, thats an understatment but hey, I
> only 2 words in Japanese so you're doing pretty good! If I underatnd
> what you're asking is about what we call in America "environment
> variables" which aren't needed to run Max+Plus2 under 98. There's got
> to be a Altera rep in Japan.
>
> Regards
>
> "Toshihiro" <bear@minos.ocn.ne.jp> wrote in message
news:<au3udf$9n$1@nn-os106.ocn.ad.jp>...
> > Hello,
> >
> > This is not FPGA's problem. but I couldn't discover at the
CPLD(software).
> > so please tell for this group.
> >
> > now I think that altera's chip used to will make a small computer.
> > but I couldn't understand these plan what into will be used software,
> > max+plus2's setting up in the windows 98 second edition. I am
> > software's licensing setting is probably okey. but my computer's
> > global variable??(japanese call kankyo-hensu) isn't understood.
> > I don't know how to set up global variable.
> > I know about windows XP and 2000's setting up because my buying
> > magazine wrote. but windows 98 second edition and windows 98
> > is not written this magazine. so please teach me global variable
> > in windows 98 second edition using and who altera's max+plus2
> > using user you. please teach me setting up global variable...or
> > Would you teach me these informaiton knew user.....sorry
> > not well my english.
> >
> > Thank you very much.
> >
> > I would do my best.
> > Toshihiro Yazawa
Article: 50928By the way, what is a "guru", and do I need it? Aurash FPGA wrote: > What's a serdes, and do I need it?Article: 50929
sorry. I mistook. not global variable, environment variable. thank you. PS thank you so much. I am happy because thats an understatement, you said..... I want to study english more!!!!!thank you. really thank you. sincerely, Toshihiro Yazawa Toshihiro <bear@minos.ocn.ne.jp> wrote in message news:au7dfv$2nv$1@nn-os103.ocn.ad.jp... > Thank you very much for your reply. > oh,really. Thank you very much!! > > Toshihiro Yazawa > > > Jay <kayrock66@yahoo.com> wrote in message > news:d049f91b.0212221533.23747000@posting.google.com... > > Your English isn't so good? OMG, thats an understatment but hey, I > > only 2 words in Japanese so you're doing pretty good! If I underatnd > > what you're asking is about what we call in America "environment > > variables" which aren't needed to run Max+Plus2 under 98. There's got > > to be a Altera rep in Japan. > > > > Regards > > > > "Toshihiro" <bear@minos.ocn.ne.jp> wrote in message > news:<au3udf$9n$1@nn-os106.ocn.ad.jp>... > > > Hello, > > > > > > This is not FPGA's problem. but I couldn't discover at the > CPLD(software). > > > so please tell for this group. > > > > > > now I think that altera's chip used to will make a small computer. > > > but I couldn't understand these plan what into will be used software, > > > max+plus2's setting up in the windows 98 second edition. I am > > > software's licensing setting is probably okey. but my computer's > > > global variable??(japanese call kankyo-hensu) isn't understood. > > > I don't know how to set up global variable. > > > I know about windows XP and 2000's setting up because my buying > > > magazine wrote. but windows 98 second edition and windows 98 > > > is not written this magazine. so please teach me global variable > > > in windows 98 second edition using and who altera's max+plus2 > > > using user you. please teach me setting up global variable...or > > > Would you teach me these informaiton knew user.....sorry > > > not well my english. > > > > > > Thank you very much. > > > > > > I would do my best. > > > Toshihiro Yazawa >Article: 50930
STFW: <http://www.google.com/search?sourceid=navclient&q=serdes> "FPGA" <fpga_guru@hotmail.com> wrote in message news:<jdwN9.5204$552.1530837@nnrp1.ptd.net>... > What's a serdes, and do I need it?Article: 50931
"Rob Finch" <robfinch@sympatico.ca> wrote in message news:<oPVM9.6268$iQ3.1478524@news20.bellglobal.com>... > > It is during the alternate step 2, when I read 64 words in 64 cycles @ > > 40MHz, that some of the data read is found to be erroneous. > > > > How do you know the data read in alternate step 2 is erroneous ? > > If you re-run step 2 again after running alternate step 2, are the data > values corrupted ? > > Are the I/O constraints in the config file the same between the two > configurations ? eg. same pin settings, same switching standards ? > > Rob To answer some of the questions asked. 1. If I run the code again, I do not get the errors in the same spot. They change with a new run. 2. I know the data read in the alternate step 2 is erroneous, as I capture it through the internal logic analyzer and view it in the Quartus software. 3. The IO configs are kept the same between the two files as far reading data from the external RAM is concerned. 4. Recently, I ran the alternate step 2 slower, which means I read the data from the external RAM in two cycles instead of one. This seems to have helped the data coming in be stable in alternate step 2. Wonder if I was reading too fast ? Thanks, PrashantArticle: 50932
Aurash, I once had a business card printed up that had: "C.H.T.G" When asked, it stood for 'Chief Head Technical Guru'. I think that was my favorite title. Of course, the 'boss' (pre-Xilinx days) was incensed, and demanded that I destroy the cards, and stop wasting company money. Some people have no life. On a more serious note, broad knowledge of many areas on one discipline, or even knowledge of more than one discipline is considered to be a mark of a guru. I remain, humbly, a guru in training. As for serdes, there are many who would say that everyone must have at least one, if not a few dozen...after all, it is the latest darling of the semi world. If you compare huge parallel buses on backplanes with huge groups of serial buses on backplanes, I don't think it makes anything any easier, as no one said that we could stop increasing the aggregate bit rate. We went from 64 bit 133 MHz PCI-X to 644 Mb/s DDR, to multiple 24 X 3.125 Gb/s serial links.....Good thing that Virtex II Pro can do them all. Just like memories, no matter how much you have, it is full by the time you finish the system. I am not sure who these system true-isms are attributable to: Rule 1: the available code space is always too small Rule 2: the available RAM is always twice too small Rule 3: the speed of the processor is never fast enough Rule 4: real time remains a constant (the 'oh s**t' of the system's engineer) And my new one - Rule 5: the backplane never has enough bandwidth (I try to hire as many gurus as I can find), Happy holidays, Austin Aurash Lazarut wrote: > By the way, > what is a "guru", and do I need it? > > Aurash > > FPGA wrote: > > > What's a serdes, and do I need it?Article: 50933
>I understand what you are saying, but this would not protect them from >that. This protects them from someone revealing any information they >may have gotten while visiting. I don't think you can get any >protection for a patent since anyone claiming that you stole their idea >would have to prove that they *had* an idea prior to the visit and prior >to any of your proof of your idea. A company can protect its ideas by not telling the visitor about them. The sign-in sheet probably says that the visitor won't reveal any secrets. Or rather that anything he says isn't secret. So he can't come back in a year or two and say they used his (secret) idea. -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.Article: 50934
Ah, a person after my own heart ;-) And...I was even able to find out what "STFW" means...all on my own! > STFW: > <http://www.google.com/search?sourceid=navclient&q=serdes> > > "FPGA" <fpga_guru@hotmail.com> wrote in message news:<jdwN9.5204$552.1530837@nnrp1.ptd.net>... > > What's a serdes, and do I need it?Article: 50935
I'm sorry to be so hard on this "issue", but I hadn't noticed the purported email address of the poster fpga_guru@hotmail.com. I mean really. If someone is a self proclaimed "FPGA Guru", shouldn't they know what a "serdes" is, or at least how to find out what it is, all on their own? Austin > By the way, > what is a "guru", and do I need it? > > Aurash > > FPGA wrote: > > > What's a serdes, and do I need it? > > >Article: 50936
thanks a ton for the reply. those docs really helped a lot. Platform's way is to spool off several tasks in parallel on several machines but it is really pseudo parallel as each indiviual pc runs a unique test. At the end of the day, you do get results quickly since multiple simuations are running simultaneously. What i intended was to run a single test on multiple PCs with the simulation poartitioned. Data communication across simulators will then occur through sockets. regards, Nachiket Kapre. Design Engineer. Paxonet Communications. "Steve Casselman" <sc@vcc.com> wrote in message news:<y_zN9.1278$sl.104130625@newssvr21.news.prodigy.com>... > Sure why not? It is always possible to attempt anything. There are programs > that will do distributed simulations... > http://www.platform.com/PDFs/whitepapers/MUG_Oct2K1.pdf (this looks like the > thing most people do) > http://www.avery-design.com/web/simcluster.pdf > > DO a google search on > > distributed simulations modelsim > > > Steve > > > "Nachiket Kapre" <nachikap@yahoo.com> wrote in message > news:eadce17c.0212220755.431fc33b@posting.google.com... > > While simulating a complete ASIC (~5 million gates) consisting of > > several individual blocks, is it possible to attempt a concurrent > > simulation (functional or timing) in a distributed environment with a > > pool of dedicated PCs simulating the individual blocks with > > inter-block communication handled by PLI/FLI wrappers in Modelsim > > which take care of "forcing" the signals driven by other blocks into > > this block? Each individual PC needs to load only a small part of the > > whole design and wait for new updates from interacting blocks. Pakcets > > keep travelling to and fro between the PCs progressing the simulation. > > It may also be possible to avoid IDLE time by allowing the individual > > PCs to assume a certain set of inpout values and start simulating, if > > later an update arrives that invalidates this assumption, all > > subsequent operatins are rerun with these new inoouts and the > > corresponding outputs generated invalidated. This will definitely > > require mor thinking than can fit in a single email, but how is the > > idea for starters?...and has it been tried before ? > > It would'nt be wrong to mention that attempting such a simulation on a > > single PC would be too tedious and time consuming. > > > > regards, > > Nachiket Kapre. > > Design Engineer. > > Paxonet Communication Inc.Article: 50937
The pin assignments are saved in the <proj_name>.csf file in the project directory. Once you have compiled the design, the <proj_name>.pin file in the project directory has the pinout info needed for working with a PCB tool. - Subroto Datta "Martin Schoeberl" <martin.schoeberl@chello.at> wrote in message news:c6FN9.39479$qq5.497475@news.chello.at... > I'm tired of defining pin numbers in a gui. Is there a way to import a text > file (cvs) for the pin definition in quartus? > > When I used Max+Plus I closed the projet, opened the relevant .acf file and > copied the pin definitions in. Is this possible in Quartus? Have not found > the relevant file till now. > > A little bit off topic, but for the next step: Is it possible to generate > some kind of library definition for a PCB tool (again with pin definition of > signals and VCC, VCCINT, GND,...) > > Martin > > > >Article: 50938
Sorry, but all I can find about oscillators are the characteristics. None of manufacturers tell about pinout and how to use their devices. This is typical information http://www.ecliptek.com/oscillators/ec31/index.html#mechanical . Where can I find basic information about cristal oscillators?Article: 50939
What are you complaining about? You got the pin-outs below the mechanical outlines. You got the value for Vcc and for the control voltage of this electrically tune-able oscillator ( expensive option?), and you even got stability and jitter specs. What more do you want? Connect ground and Vcc and use the TTL-like output to drive your load... Peter Alfke =========== valentin tihomirov wrote: > Sorry, but all I can find about oscillators are the characteristics. None of > manufacturers tell about pinout and how to use their devices. This is > typical information > http://www.ecliptek.com/oscillators/ec31/index.html#mechanical . Where can I > find basic information about cristal oscillators?Article: 50940
I just installed ChipScope Pro 5.1, 2nd release, evaluation version. Following the manual advice, insrting the ICON and ILA cores in my design, configuring and connecting them was rather painless. Since I use ISE 5.1+SP3, I did as suggested at page 3-18 of the manual and all went good. But I'm not able to import the *.CDC project saved in Inserter into Analyzer. Without that, the tool is useless. The dialog box opens, I can choose the file, but the drop down list (unit/device) stays empty; there's no way to exit from the dialog except Cancel. This happens on two different machines, both running XP, on at least three different simple projects. I did read a Xilinx support answer, suggesting how to write a .CDC file by himself, but it didn't work (same result, drop down empty). In the ChipScope root, I found a log, full of notes about "Java exceptions" related to a drop-down. Seems a problem of Java runtime. It's a pity, I was really in need of a tool like that. Does somebody knows how to solve ?Article: 50941
valentin tihomirov wrote: > Sorry, but all I can find about oscillators are the characteristics. None of > manufacturers tell about pinout and how to use their devices. This is > typical information > http://www.ecliptek.com/oscillators/ec31/index.html#mechanical . Where can I > find basic information about cristal oscillators? Did you have a look at the full & half size specifications at the bootom of the page, downloadable as pdf ? There is also a test circuit. http://www.ecliptek.com/pdf/oscillators/ec31.pdf http://www.ecliptek.com/pdf/oscillators/ec31hs.pdf http://www.ecliptek.com/oscillators/glossary.html#figure2 The information provided can be considered as complete. Rene -- Ing.Buero R.Tschaggelar - http://www.ibrtses.com & commercial newsgroups - http://www.talkto.netArticle: 50942
"Toshihiro" <bear@minos.ocn.ne.jp> schrieb im Newsbeitrag news:au3udf$9n$1@nn-os106.ocn.ad.jp... > Hello, > > This is not FPGA's problem. but I couldn't discover at the CPLD(software). > so please tell for this group. > > now I think that altera's chip used to will make a small computer. > but I couldn't understand these plan what into will be used software, > max+plus2's setting up in the windows 98 second edition. I am > software's licensing setting is probably okey. but my computer's > global variable??(japanese call kankyo-hensu) isn't understood. > I don't know how to set up global variable. > I know about windows XP and 2000's setting up because my buying > magazine wrote. but windows 98 second edition and windows 98 > is not written this magazine. so please teach me global variable > in windows 98 second edition using and who altera's max+plus2 > using user you. please teach me setting up global variable...or > Would you teach me these informaiton knew user.....sorry > not well my english. > Hello Toshihiro, you have to set these variables in your autoexec.bat file. I am aware of one variable for the Altera license manager: set LM_LICENSE_FILE=E:\quartus\license.dat This line sets the variable LM_LICENSE_FILE to the path of the license file "license.dat". If you it installed on drive C, then you have to replace E: with C:. Best Regards HelmutArticle: 50943
Hello Rene, I can't understand the role of microcontroller in this particular configuration. 1) If you use EPC2, you do not need microcontroller. EPC2 configures ACEX at power-up (in passive serial mode). From Max+2 Programmer you can either program EPC2, or configure ACEX. The relevant schematic - AN116, ver. 1.03, fig. 29, page55. In Max+2, you shall setup multi-device JTAG chain (selecting POF for EPC2 and SOF for ACEX). 2) If you use flash memory and microcontroller, you should employ RBF file and use passive serial configuration scheme (it is easier than JTAG). >Since the *.pof and the *.sof appear to require interpretation >by MaxPlus2 or Quartus2, the preferred format would be *.rbf >it appears. But is the created rbf sufficient for the ACEX as >well as for the configuration flash ? Actually, RBF content appears in POF at some starting address. The length of RBF depends on the type of programmable logic device. POF is a fixed-length file. Its length depends on the type of programming device (128K+ for EPC1, 200K+ for EPC2). The rest of POF is stuffed up with 0xFFs. Best Regards, Igor KauranenArticle: 50944
rickman wrote:
> Theron Hicks wrote:
> >
> > Hello,
> > I have an EMI noise problem with a cooling fan on an FPGA based system.
> > As a result, I am considering using a thermostat to control my cooling fans
> > in my system. I would like to attach the thermostat directly to the worst
> > case element on the board. To do so I need to decide what the likely
> > maximum allowable case temperature is. I am using a Spartan2E
> > XC2S50E-7TQ144C. I believe that the part is dissipating about a watt
> > although I haven't measured this yet. When I look at XAPP415 I see that
> > they list a maximum Theta J-A of 57.6 C/W with a typical value of 33.5C/W.
> > They also list Theta J-C of 5.5 W/C (typical). The first question is, "What
> > are the assumtions about heatsinking through the ground plane in the PCB for
> > theta J/C ?" The second question is can I use the 5.5 number to calculate
> > the temperature setting for my thermostat? Thus the maximum junction
> > temperature is 85C and the part dissapates 1 watt for a J/C temperature rise
> > of 5.5C. Thus the temperature of the thermostat could be set at say 79.5C.
> > For safety, I could use a 65C thermostat. The intent of all this is to
> > allow the customer to run the part in a low noise condition if the
> > environment is cool enough, but yet protect the system from overheating.
> >
> > As I think about it turning the fan on will generate a nasty EMI glitch
> > that would corrupt the user's measurements. Perhaps, I should provide any
> > idiot light/beeper that would tell the user to turn on the fan. Still, how
> > do I make the determination as to what the allowable case temperature should
> > be.
> >
> > By the way, the system is a low noise pulse width modulated anemometer
> > which is intended to be used in the field (i.e. in the sun on the salt flats
> > in Utah.)
> >
> > Thanks,
> > Theron Hicks
>
> If you measure the case temp via contact, then you only need to consider
> the Theta J-C number. This number makes no assumptions about the rest
> of the cooling system since it is independant of that. The Theta J-A
> number does make assumptions about how the case is cooled by the
> ambient. This should be spec'd in terms of the air flow and the design
> of the PC board the chip is on.
>
> As to the EMI, if the radiated frequency of concern is high such as the
> FCC requirements for commercial or residential equiptment, then you
> should be able to isolate the fan from the rest of the case with an
> enclosure. The air can move through the holes while the EM field does
> not. Your design may be too sensitive since this attenuates the EMI,
> but does not eliminate it. If the EMI is being conducted, then you
> certainly can remove that using chokes and capacitors. Should I assume
> that you have already explored techniques to reduce the EMI?
>
Rick,
The situation is that the EMI is being generated in the cooling fans for the
unit itself. Thus the unit is effectively interfering with itself. I have tried
ferrite beads and capacitors to reduce the posibility of conducted EMI. The
chassis of the fan is aluminum so it prety much shields itself. However, I tried
to shield the fan with a screen on top of the fan between the boards and the fan.
Nothing seems to help. I am not sure whether the EMI is coming directly into the
PCB or if it is coming in via the external probe cable. I know that the old (very
noisy) cooling fan could be placed outside the unit and, if oriented correctly, it
would show up in the data _very_ strongly. This would appear to imply radiated
rather than conducted EMI. Also, I tried to power the fans from an external
supply and the EMI did not change. Again, this would tend to imply radiated
interference. The fan vendors web site claims that conducted EMI is usually the
only problem for brushless DC fans. I am aware that my design is sensitive to
EMI. In the previous iteration of the device, the self noise of the unit totally
masked the fan EMI. Now, the new system has so improved its self noise flow that
the fan noise is apparent. Of course, now I would like to reduce the fan noise
below the system noise floor. One possible cure is to turn the fan off during
actual data acquistion. This will likely work for most users. However one
customer plans to use the system on the salt flats in Utah in mid July to August.
(HOT!) I have considered using a peltier effect device but I would rather avoid
doing so for reasons of cost, etc.
Thanks,
Theron Hicks
>
> --
>
> Rick "rickman" Collins
>
> rick.collins@XYarius.com
> Ignore the reply address. To email me use the above address with the XY
> removed.
>
> Arius - A Signal Processing Solutions Company
> Specializing in DSP and FPGA design URL http://www.arius.com
> 4 King Ave 301-682-7772 Voice
> Frederick, MD 21701-3110 301-682-7666 FAX
Article: 50945
Jim Granville wrote:
> Theron Hicks (Terry) wrote:
> >
> > Actually Glen, the device I am building _is_ a hot wire anemometer. The control
> > system is Pulse Width Modulated as opposed to the conventional Whetstone Bridge
> > based constant temperature anemometer. By using PWM we can get a better
> > transfer function and use a simple counter instead of an A/D converter. Also,
> > the system has a few other advantages. (See United States Patent #03603147.)
> > The real problem is that the fan ENI shows up in the Spectral Plot for the
> > recovered data from the anemometer.
>
> I would have expected the two to have different frequency bands - the
> FAN will be 100's of Hz, and the airflow sub-Hz ?
>
Jim,
As it turns out the frequency of interest for the flow is up to on the order of
several KHz. The frequency of interest is defined by the size of the feature to be
resolved and the velocity of the flow. We look at features on the order of 1mm in a
10m/S flow. Thus maximum frequency of interest is about 10KHz The fan has spectral
content from as low as about 150Hz to as high as 2.5KHz. The competetive full analog
product has a frequency response of about 30KHz at 10m/s flow velocity.
I know this is all a little strange to an EE. I certainly found it so. For
example, the first thing I learned is that there is no good way to generate a varying
flow with a known frequency. Every thing they (the fluids community) do uses inferred
frequency response from an inferred impulse behavior. The first time I tried to
describe a conventional analog constant temperature anemometer to a semiconductor apps
engineer he told me that it could not work. (The system uses a whetstone bridge with
the hot wire as one of the elements. The output of the bridge amp is used to excite
the top of the bridge. The resistance of the hotwire changes with its temperature.
The system is inherently unstable.)
Enough of my babling,
Thanks,
Theron Hicks
>
> > I am looking at several options including
> > grounding the fan cases, filtering their input lines, and shielding the fan
> > cases. I am currently using the best specified fans for EMI that I can find.
>
> Piezo fans maybe ? - not the same airflow, but quieter.
>
> Or, you could invest more in Copper/Aluminium, and try and eliminate the
> FANS, or move them into a 'shielded tunnel' ?
>
> > The fans are 119mm square by 35mm high (however height is somewhat
> > negotiable). I have even considered using a remote fan and ducting the coolant
> > flow into the system via some large diameter hose.
> >
> > Thanks,
> > Theron
> >
> > glen herrmannsfeldt wrote:
> >
> > > "Theron Hicks" <hicksthe@egr.msu.edu> wrote in message
> > > news:au01e8$17oj$1@msunews.cl.msu.edu...
> > >
> > > (snip)
> > > > As I think about it turning the fan on will generate a nasty EMI
> > > glitch
> > > > that would corrupt the user's measurements. Perhaps, I should provide any
> > > > idiot light/beeper that would tell the user to turn on the fan. Still,
> > > how
> > > > do I make the determination as to what the allowable case temperature
> > > should
> > > > be.
> > > >
> > > > By the way, the system is a low noise pulse width modulated anemometer
> > > > which is intended to be used in the field (i.e. in the sun on the salt
> > > flats
> > > > in Utah.)
> > >
> > > How about a hot-wire anemometer?
> > >
> > > Do you have to worry about the effect of the fan on the
> > > anemometer itself?
> > >
> > > -- glen
>
> --
> ======= 80x51 Tools & IP Specialists =========
> = Want to work smarter than C ?
> = http://www.DesignTools.co.nz/modbench.htm
> = http://www.DesignTools.co.nz
Article: 50946pmxtow@merlot.uucp (Thomas Womack) wrote in message news:<at4pse$k8m$1@oyez.ccc.nottingham.ac.uk>... > This may be an incoherent request, but I'll go ahead. > > When I last played with electronics, resistors were little cylindrical > things with long wire legs, and ICs had at most forty pins, which came > out of the side at convenient 2.54mm spacing; you could design on > bread-board. If you wanted to connect to a computer, you used the > parallel port, or the four-channel analogue-digital converter on the > BBC Micro joystick port. If you were really advanced, you might try to > build a two-layer PCB with little metal fingers at the bottom to plug > into an ISA slot on a PC. This reminds me of a conversation with a recently minted manufacturing engineer who had to be explained what a thru-hole resistor was, and then described why anyone would want to make them... :-) > > Nowadays, passive components are little flecks of ceramic with solder > pads at each end, small ICs come in tiny flat-packs with centipede > fringes of legs around, and the interesting ones come either in large > flat-packs with centipede fringes, or in BGA form. And I presume the > signal-integrity requirements are such that bread-board, and even the > two-layer PCB, are Right Out. The BBC Micro and the ISA slot have > gone the way of the dinosaur; the parallel port is dying out. > > So, what do people do to prototype now? As I read it, you do a lot in > simulation and then, once you're happy with a design, you send a file > to a boutiquie to get a PCB made and the components fitted to it. How > much does it cost to get one two- or four-layer PCB made, how long > does it take, and do you have to provide the company with all the > components you want fitted, or will they have 1kohm surface-mount > resistors and 555 oscillators in stock? I think it is really how much involvment/control you want. There is free software to do a two layer mask such that you can spin your own cards, but generally, (unless you are doing more than 2+ designs) it is probably more cost effective to order the bare cards for your design (~$30US/per for 4"x5" 2 layer, in small quantities). I have gone with two companies and turnaround is about two weeks. You can pay someone to put it all together, but if you design it, it is probably easier to put the first few together yourself. Once you understand how important flux is (!) you can solder quad-flat packs pretty easily (see www.tech-forge.com) > > How do you interface widgets to a computer nowadays? Are there chips > which can convert USB or PCI to something easier to contemplate; is it > practical for a hobbyist to connect things to the PCI bus? Depends on your speed requirements. I think the parallel port is going to stay around for a long time. Although I have not used the FTDI USB parts that Marc mentioned, they look cool, and probably allow you an upgrade path to USB2.x. As Kevin mentioned, PCI IP is a lot more complicated than the good old ISA days. > > Which is the right group for me to be asking these questions in? Ping me if you want more precise details. -SteenArticle: 50947
Theron Hicks <hicksthe@egr.msu.edu> wrote: > The situation is that the EMI is being generated in the cooling fans for the >unit itself. Thus the unit is effectively interfering with itself. Being a sensitive anemometer have you considered that detecting the proximity of a fan is what it is meant to do?Article: 50948
> ... One possible cure is to turn the fan off during >actual data acquistion. This will likely work for most users. However one >customer plans to use the system on the salt flats in Utah in mid July to August. How long does it take to grab a set of measurements? Can you turn the fan off for long enough to grab the data you need? Might need a few large blocks of metal to hold some of the energy/heat. How about putting the whole thing (electronics) in a bucket of oil and putting fins on the outside of the bucket? -- The suespammers.org mail server is located in California. So are all my other mailboxes. Please do not send unsolicited bulk e-mail or unsolicited commercial e-mail to my suespammers.org address or any of my other addresses. These are my opinions, not necessarily my employer's. I hate spam.Article: 50949
Hal Murray wrote: > How about putting the whole thing (electronics) in a bucket of oil > and putting fins on the outside of the bucket? > Alcohol would be even better. It boils off at 79 degrees C, so nothing inside can ever get hotter than that. Cheers! Peter Alfke
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