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Threads Starting Dec 1996

4695: 96/12/02: 1997 International Symposium on Physical Design: ISPD-97 CFP (Dec 20 Submission Deadline)
4703: 96/12/03: Joe Blake: Memory Requirements
    4708: 96/12/04: DTHIBAUL: Re: Memory Requirements
    4718: 96/12/05: Jason T. Wright: Re: Memory Requirements
    4730: 96/12/07: bob elkind: Re: Memory Requirements
        4731: 96/12/07: Scott Kroeger: Re: Memory Requirements
4705: 96/12/03: Jon Saul: CFP: Reed-Muller 97 -- Int. Workshop on Function Representations
4709: 96/12/04: John Cooley: Re: What Does ASIC Stand For?
    4932: 97/01/01: Subramnyeswar Saladi: Re: What Does ASIC Stand For?
        4933: 97/01/02: Gaven Miller: Re: What Does ASIC Stand For?
        4939: 97/01/02: Geremy F.: Re: What Does ASIC Stand For?
            4946: 97/01/03: Mike Froggatt: Re: What Does ASIC Stand For?
        4961: 97/01/04: Roger D'Joos: Re: What Does ASIC Stand For?
        4988: 97/01/08: Bryan Williams: Re: What Does ASIC Stand For?
4711: 96/12/05: Jason Tayles: US LA *Job Post* Vhdl, FPGA, Mentor Engineer Needed to $75/hr
4712: 96/12/05: Philip Freidin: Re: Looking for hc0324
    4717: 96/12/05: <phony@see.sig.for.real>: Re: Looking for hc0324
        4727: 96/12/06: Bob Wilson: Re: Looking for hc0324
4714: 96/12/05: The POLIS team: Announcement: public release of POLIS-0.2, an embedded system design software
4715: 96/12/05: Bob Wilson: Re: Looking for hc0324
4716: 96/12/05: <kardos@mail.matav.hu>: Looking for hc0324
    4735: 96/12/09: <kardos@mail.matav.hu>: Re: Looking for hc0324
        4748: 96/12/10: Bob Wilson: Re: Looking for hc0324
4719: 96/12/06: Felix K.C. CHEN: what is "token chain"?
    4745: 96/12/10: Philip Freidin: Re: what is "token chain"?
        4795: 96/12/16: Symon Brewer: Re: what is "token chain"?
            4823: 96/12/18: Philip Freidin: Re: what is "token chain"?
4720: 96/12/06: Jae-Ho Shin: Or- gated clock solution?
4721: 96/12/05: Kayvon Irani: ASICs Vs. FPGA in Safety Critical Apps.
    4728: 96/12/06: Jackie Meyer: Re: ASICs Vs. FPGA in Safety Critical Apps.
    4729: 96/12/06: Brad Taylor: Re: ASICs Vs. FPGA in Safety Critical Apps.
    4743: 96/12/10: John Cooley: Re: ASICs Vs. FPGA in Safety Critical Apps.
        4749: 96/12/10: Steven E. Raasch: Re: ASICs Vs. FPGA in Safety Critical Apps.
            4808: 96/12/17: Simon: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4873: 96/12/23: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4875: 96/12/22: Kayvon Irani: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4897: 96/12/26: Romuald K. Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4902: 96/12/27: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4911: 96/12/29: Jeff Millar: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                4918: 96/12/30: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
        4769: 96/12/13: Alasdair MacLean: Re: ASICs Vs. FPGA in Safety Critical Apps.
            4772: 96/12/13: John Walton: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4778: 96/12/13: Ray Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4779: 96/12/13: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4787: 96/12/14: Brian Drummond: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4794: 96/12/16: Alasdair MacLean: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4796: 96/12/16: Miron Abramovici: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4799: 96/12/16: Randy Tietz: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4801: 96/12/16: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
            4776: 96/12/13: George Herbert: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4785: 96/12/13: Bob Doyle: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4790: 96/12/16: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4789: 96/12/15: Ray Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4805: 96/12/17: <peter@nowhere.com>: Re: ASICs Vs. FPGA in Safety Critical Apps.
            4777: 96/12/13: John L. Smith: Re: ASICs Vs. FPGA in Safety Critical Apps.
            4800: 96/12/16: Brad Taylor: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4803: 96/12/16: John L. Smith: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4812: 96/12/17: Maynard Handley: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4815: 96/12/17: James Thiele: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4816: 96/12/17: Brad Taylor: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4817: 96/12/17: Scott Kroeger: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4825: 96/12/18: Ray Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                4828: 96/12/18: John Walton: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                    4829: 96/12/18: John Walton: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4840: 96/12/19: Arnie Frisch: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4853: 96/12/20: Joe Hinrichs: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                4880: 96/12/23: Arnie Frisch: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4818: 96/12/17: Dale Shuttleworth: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4824: 96/12/18: Jan Vorbrueggen: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4826: 96/12/17: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
                4844: 96/12/19: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4850: 96/12/19: Ray Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4858: 96/12/20: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4883: 96/12/24: Henry Spencer: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4896: 96/12/26: Romuald K. Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                4901: 96/12/27: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                    4906: 96/12/27: Romuald K. Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                        4907: 96/12/28: Scott Kroeger: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                            4910: 96/12/29: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                        4909: 96/12/29: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                            4912: 96/12/29: George Herbert: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4917: 96/12/30: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4921: 96/12/30: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4922: 96/12/30: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                            4913: 96/12/29: Scott Kroeger: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                        4914: 96/12/29: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                            4919: 96/12/30: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                            4923: 96/12/30: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4925: 96/12/30: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                    4927: 96/12/31: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                    4928: 96/12/31: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                    4937: 97/01/02: Henry Spencer: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4926: 96/12/31: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                    4942: 97/01/02: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                        4949: 97/01/03: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4955: 97/01/04: Eric Edwards: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                            4972: 97/01/07: James W. Swonger: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                4973: 97/01/07: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                    4979: 97/01/08: Friedrich Beckmann: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                        5007: 97/01/11: David Erstad: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                            5014: 97/01/13: Steven K. Knapp: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                        5044: 97/01/16: Hans Tiggeler: Re: Safety Critical Apps -> Xilinx Checker.
                                                            5046: 97/01/16: Peter Sels: ILP formulation of DRL Scheduling Problem
                                                            5049: 97/01/16: Rich K.: Re: Safety Critical Apps -> Xilinx Checker.
                                                                5141: 97/01/26: Bradley Yearwood: Re: Safety Critical Apps -> Xilinx Checker.
                                                                    5177: 97/01/29: Peter: Re: Safety Critical Apps -> Xilinx Checker.
                                                                        5180: 97/01/29: Steven K. Knapp: Re: Safety Critical Apps -> Xilinx Checker.
                                                                            5183: 97/01/29: Peter: Re: Safety Critical Apps -> Xilinx Checker.
                                                                                5192: 97/01/30: Steve Casselman: Re: Safety Critical Apps -> Xilinx Checker.
                                                                                5194: 97/01/29: Brian Fox: Re: Safety Critical Apps -> Xilinx Checker.
                                                                                    5199: 97/01/30: Philip Freidin: Re: Safety Critical Apps -> Xilinx Checker.
                                                                                        5278: 97/02/03: K Goldman: Re: Safety Critical Apps -> Xilinx Checker.
                                                                                            5297: 97/02/05: Philip Freidin: Re: Safety Critical Apps -> Xilinx Checker.
                                                                                                5919: 97/03/26: Gregory Smith: Re: Safety Critical Apps -> Xilinx Checker.
                                                            5050: 97/01/16: Steven K. Knapp: Re: Safety Critical Apps -> Xilinx Checker.
                                                5010: 97/01/12: Henry Spencer: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                    5016: 97/01/13: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                        5024: 97/01/14: Henry Spencer: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                            5038: 97/01/15: David Erstad: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                5042: 97/01/16: Henry Spencer: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                        5032: 97/01/14: Brad Taylor: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                        5043: 97/01/16: Hans Tiggeler: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                            5048: 97/01/16: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                5052: 97/01/17: Hans Tiggeler: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                    5053: 97/01/17: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                            5066: 97/01/20: Julian Cox: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                5072: 97/01/20: Ewan D. Milne x3767: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                            5144: 97/01/27: Donald Gillies: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                5154: 97/01/27: George Herbert: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                    5160: 97/01/27: Rich K.: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                    5170: 97/01/28: Alvin E. Toda: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                        5190: 97/01/29: Mike McCarty: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                            5255: 97/02/02: Henry Spencer: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                                5259: 97/02/02: Erik Corry: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                                5195: 97/01/30: Jan Vorbrueggen: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                                5061: 97/01/18: Jan Vorbrueggen: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                        5264: 97/02/03: Jan Vorbrueggen: Re: ASICs Vs. FPGA in Safety Critical Apps.
                                4956: 97/01/04: Tom Biggs: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4861: 96/12/20: Hans Grobler: Re: ASICs Vs. FPGA in Safety Critical Apps.
                            4863: 96/12/20: David Kessner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4851: 96/12/19: Ray Andraka: Re: ASICs Vs. FPGA in Safety Critical Apps.
                    4855: 96/12/20: Gerhard Hoffmann: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4860: 96/12/20: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
                        4882: 96/12/23: Ben Mathew: Re: ASICs Vs. FPGA in Safety Critical Apps.
    4746: 96/12/10: Martin d'Anjou: Re: ASICs Vs. FPGA in Safety Critical Apps.
        4768: 96/12/13: Harrie Gulikers: Re: ASICs Vs. FPGA in Safety Critical Apps.
    4761: 96/12/12: Acquisition Systems: Re: ASICs Vs. FPGA in Safety Critical Apps.
4722: 96/12/06: Hamilton: Name this chip !!
    4725: 96/12/06: Don Husby: Re: Name this chip !!
    4726: 96/12/06: John L. Smith: Re: Name this chip !!
4724: 96/12/06: <swgarb@aol.com>: FIND OUT HOW $$$ EASY MONEY HERE
4732: 96/12/08: Tony Ambardar: Controlling Xilinx Xchecker cable...
4733: 96/12/09: Brian R Cartwright: suggestions for arithmetic experiment?
4734: 96/12/09: 1997 International Symposium on Physical Design: ISPD-97 CFP (Dec 20 Submission Deadline)
4736: 96/12/09: Symon Brewer: XC4010E configuration problem.
    4765: 96/12/12: Peter Alfke: Re: XC4010E configuration problem.
4737: 96/12/09: Raphael BELLEC: Fpga, Epld, cpld....
    4766: 96/12/12: Peter Alfke: Re: Fpga, Epld, cpld....
        4791: 96/12/16: Wayne Turner: Re: Fpga, Epld, cpld....
            4809: 96/12/17: Simon: Re: Fpga, Epld, cpld....
                4813: 96/12/17: Wayne Turner: Re: Fpga, Epld, cpld....
        4811: 96/12/17: Mark Aaldering: Re: Fpga, Epld, cpld....
    4788: 96/12/15: Janos Szamosfalvi: Re: Fpga, Epld, cpld....
4738: 96/12/09: The POLIS team: Repost: Announcement: public release of POLIS-0.2, an embedded system
4739: 96/12/10: Steve Sutherland: Xilinx configuration PROM
    4740: 96/12/10: Scott Kroeger: Re: Xilinx configuration PROM
    4753: 96/12/11: <timolmst@cyberramp.net>: Re: Xilinx configuration PROM
        4755: 96/12/11: Peter Alfke: Re: Xilinx configuration PROM
            4781: 96/12/14: Dan Bartram: Re: Xilinx configuration PROM
    4757: 96/12/11: Ceri Workman: Re: Xilinx configuration PROM
    4760: 96/12/12: Bryan Williams: Re: Xilinx configuration PROM
        4780: 96/12/14: Dan Bartram: Re: Xilinx configuration PROM
            4784: 96/12/14: Bryan Williams: Re: Xilinx configuration PROM
                4786: 96/12/14: Hal Murray: Re: Xilinx configuration PROM
                4810: 96/12/17: Dan Bartram: Re: Xilinx configuration PROM
4741: 96/12/10: Claude Klimos: Poll: Please Take 2 Minutes to Answer...
4742: 96/12/10: FRANCESCO IOVINE: GAL STARTER KIT
    4751: 96/12/11: <peter@nowhere.com>: Re: GAL STARTER KIT
4744: 96/12/10: c: FPGA JOB OFFER
4747: 96/12/10: Chip Weems: Call for Papers: CAMP '97
    4763: 96/12/12: Arthur T. Murray: Re: Call for Papers: CAMP '97
4752: 96/12/11: <Subscribe2@Juno.com>: Good Quotes (xgmgeb)
4754: 96/12/11: Scott A. Hauck: FPGA'97 Advanced Program
4756: 96/12/11: <tswvxyooj@hotmail.com>: Multiply-Accumulate in VHDL
4758: 96/12/11: <invest@goldbergservices.com>: $$$$ $50,000 for the New Year $$$$
4759: 96/12/11: <schulhof@aol.com>: test
4762: 96/12/12: Charles Stevens: Configuration EEPROMS for Altera Flex10K & Flex8K
    4773: 96/12/13: Julian Cox: Re: Configuration EEPROMS for Altera Flex10K & Flex8K
4764: 96/12/12: David Badzinski: Anyone tried a FFT in a FPGA?
    4767: 96/12/12: Ray Andraka: Re: Anyone tried a FFT in a FPGA?
        4806: 96/12/17: Steve Wiseman: Re: Anyone tried a FFT in a FPGA?
            4843: 96/12/19: Wayne Turner: Re: Anyone tried a FFT in a FPGA?
        4807: 96/12/17: Simon: Re: Anyone tried a FFT in a FPGA?
            4874: 96/12/22: Kayvon Irani: Re: Anyone tried a FFT in a FPGA?
    4782: 96/12/14: Wayne Turner: Re: Anyone tried a FFT in a FPGA?
4770: 96/12/13: Richard Schwarz: XILINX TEST BOARD WITH ROUTING SOFTWARE
    4771: 96/12/13: Hans Tiggeler: Re: XILINX TEST BOARD WITH ROUTING SOFTWARE
4774: 96/12/13: Hugh Jack: Computer Engineering Faculty Position
4775: 96/12/13: Hugh Jack: Computer Engineering Faculty Position
4792: 96/12/16: Larry Chen: Motorola 68HC16 background debugger
4793: 96/12/16: Larry Chen: Motorola 68HC16 background debugger
4797: 96/12/16: Paul T. Shultz: FPGA ATM VHDL Megafunctions/Libraries
4798: 96/12/16: Stan Hodge: Experience with Altera 10K Family
4802: 96/12/17: 1997 International Symposium on Physical Design: ISPD-97 CFP (Dec 20 Submission Deadline)
4804: 96/12/17: Alon Hazay: FPGA market overview
    4819: 96/12/17: Peter Alfke: Re: FPGA market overview
    4848: 96/12/19: Thomas C. Jones: Re: FPGA market overview
        4900: 96/12/26: William Vollrath: Re: FPGA market overview
4814: 96/12/17: Jim: How to get MORE ORDERS for ANYTHING you SELL!!!
4820: 96/12/17: David Emrich: Re: Exemplar's Leonardo on Linux
    4833: 96/12/19: <phony@see.sig.for.real>: Re: Exemplar's Leonardo on Linux
        4846: 96/12/19: Celia C.: Re: Exemplar's Leonardo on Linux
        4849: 96/12/20: Eric Edwards: Re: Exemplar's Leonardo on Linux
    4905: 96/12/28: Zoltan Kocsi: Re: Exemplar's Leonardo on Linux
4821: 96/12/18: Liyong Chen: Test
4822: 96/12/18: F. Wirtz: Jedec file format definition?????
4830: 96/12/18: Tom Smythers: PLD
    4835: 96/12/19: Wong Man Kit: Re: PLD
4831: 96/12/18: <gomez66@eucmax.sim.ucm.es>: Help: FPGA for fast digital signal processing
    4836: 96/12/18: Ray Andraka: Re: Help: FPGA for fast digital signal processing
4832: 96/12/18: Mark Norton: Proper target for design
    4838: 96/12/19: Hal Murray: Re: Proper target for design
    4856: 96/12/20: Gregor Glawitsch: Re: Proper target for design
        4862: 96/12/20: Charles W. Hubbard: Re: Proper target for design
    4898: 96/12/26: Peter Alfke: Re: Proper target for design
4834: 96/12/19: Eric Edwards: design should fit, but it doesn't
    4870: 96/12/22: Steve Wiseman: Re: design should fit, but it doesn't
        4965: 97/01/06: Eric Edwards: Re: design should fit, but it doesn't
            4978: 97/01/08: Thomas Hadlich: Re: design should fit, but it doesn't
4837: 96/12/19: Andreas Doering: Area spent for routing in FPGAs
4839: 96/12/19: Andreas Wehr: Cascaded serial PROMS
    4841: 96/12/19: Jason T. Wright: Re: Cascaded serial PROMS
4842: 96/12/19: mike lottridge: Consulting Opportunity
4845: 96/12/19: <course@garnet.berkeley.edu>: Silcon Processing Courses from Berkeley this winter
4847: 96/12/20: LFB3: $$$$$$$$$ HONEST, LEGAL, EASY CASH $$$$$$$
4852: 96/12/20: Richard Gaupsas: CPLD / VHDL question
    4857: 96/12/20: Sundar Gopalan: Re: CPLD / VHDL question
        4868: 96/12/21: Greg Peek: Re: CPLD / VHDL question
4854: 96/12/20: Stephan Gick: I2C Bus Interface in FPGAs
    4864: 96/12/20: James West: Re: I2C Bus Interface in FPGAs
        4916: 96/12/30: Mika Iisakkila: Re: I2C Bus Interface in FPGAs
    4866: 96/12/20: John L. Smith: Re: I2C Bus Interface in FPGAs
        4888: 96/12/25: Wil Taphoorn: Re: I2C Bus Interface in FPGAs
            4908: 96/12/28: Bertrand: Re: I2C Bus Interface in FPGAs
                4920: 96/12/30: David: Re: I2C Bus Interface in FPGAs
                    4924: 96/12/31: Mark Aaldering: Re: I2C Bus Interface in FPGAs
        4968: 97/01/06: Alfred Fuchs: Re: I2C Bus Interface in FPGAs
    4930: 97/01/01: cong shiping: Re: I2C Bus Interface in FPGAs
        4963: 97/01/05: David J. Starr: Re: I2C Bus Interface in FPGAs
4859: 96/12/20: Sundar Gopalan: PCI Bus Based designs using FPGA's
    4865: 96/12/21: Bryan Williams: Re: PCI Bus Based designs using FPGA's
    4885: 96/12/24: Austin Franklin: Re: PCI Bus Based designs using FPGA's
        4903: 96/12/26: William Vollrath: Re: PCI Bus Based designs using FPGA's
4867: 96/12/21: Garnet Brace: Xilinx loading problem?
    4869: 96/12/21: Philip Freidin: Re: Xilinx loading problem?
        4876: 96/12/23: <peter@diguserve.com>: Re: Xilinx loading problem?
4871: 96/12/22: Andrew Morley: Re: New CAD tools for new Xilinx XC6200 FPGA
4872: 96/12/23: CMJsemi: XLNX M-1
    4884: 96/12/24: Austin Franklin: Re: XLNX M-1
4877: 96/12/23: Stefan Ludwig: New CAD tools for new Xilinx XC6200 FPGA
    4878: 96/12/23: John Walton: Re: New CAD tools for new Xilinx XC6200 FPGA
4879: 96/12/23: Jae Cho: Integer divide IC
    4881: 96/12/23: Philip Freidin: Re: Integer divide IC
    4889: 96/12/25: <peter@nowhere.com>: Re: Integer divide IC
    4899: 96/12/26: Peter Alfke: Re: Integer divide IC
4886: 96/12/25: Larry Chen: Motorola 68HC16 background debugger
4887: 96/12/25: bob elkind: Re: ASICs Vs. FPGA in Safety Critical Apps.
    4894: 96/12/26: Wayne Turner: Re: ASICs Vs. FPGA in Safety Critical Apps.
4890: 96/12/25: Larry Chen: HC16 background debugger
4891: 96/12/25: Larry Chen: Motorola 68HC16 background debugger
4892: 96/12/25: Larry Chen: Motorola 68HC16 background debugger
4893: 96/12/26: Richard Schwarz: Low $$$ XLNX Kits w Routing
4895: 96/12/26: Khalid Alotaibi: BitStream in Online
4904: 96/12/26: SHIU PUN-HANG MR: Help: Divider
4915: 96/12/30: Christopher Price: vga output


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