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Threads Starting Jul 2003

57456: 03/07/01: Jun: fpga video evaluation board
    57497: 03/07/01: Antonio Pasini: Re: fpga video evaluation board
        57499: 03/07/01: Jun: Re: fpga video evaluation board
57460: 03/07/01: black: the skew and race condition
    57462: 03/07/01: Jonathan Bromley: Re: the skew and race condition
        57463: 03/07/01: black: Re: the skew and race condition
        57466: 03/07/01: black: Re: the skew and race condition
            57474: 03/07/01: <krl@semel.fi.spam.wonderful.spam>: Re: the skew and race condition
            57476: 03/07/01: Jonathan Bromley: Re: the skew and race condition
57461: 03/07/01: Thomas: NgdBuild:477 - clock net xx has non-clock connections
    57485: 03/07/01: Colm Clancy: Re: NgdBuild:477 - clock net xx has non-clock connections
57464: 03/07/01: Thomas: MapLib:93 - Illegal LOC on symbol "clk.PAD" (pad signal=clk) or BUFGP symbol "u1" (output signal=u1), IPAD-IBUFG should only be LOC'd to GCLKIOB site."
    57470: 03/07/01: <hamish@cloud.net.au>: Re: MapLib:93 - Illegal LOC on symbol "clk.PAD" (pad signal=clk) or BUFGP symbol "u1" (output signal=u1), IPAD-IBUFG should only be LOC'd to GCLKIOB site."
        57538: 03/07/02: Sandeep Kulkarni: Re: MapLib:93 - Illegal LOC on symbol "clk.PAD" (pad signal=clk) or BUFGP symbol "u1" (output signal=u1), IPAD-IBUFG should only be LOC'd to GCLKIOB site."
            156506: 14/04/11: Jon Elson: Re: ERROR:MapLib:93 - Illegal LOC on IPAD symbol "autman" or BUFGP symbol "autman_BUFGP" (output signal=autman_BUFGP), IPAD-IBUFG should only be LOCed to GCLKIOB site.
        156487: 14/04/09: <sagarmemane4@gmail.com>: ERROR:MapLib:93 - Illegal LOC on IPAD symbol "autman" or BUFGP symbol
    156393: 14/03/27: <ahmad2smile@gmail.com>: Re: MapLib:93 - Illegal LOC on symbol "clk.PAD" (pad signal=clk) or
        156486: 14/04/09: <sagarmemane4@gmail.com>: Re: MapLib:93 - Illegal LOC on symbol "clk.PAD" (pad signal=clk) or
            156489: 14/04/10: GaborSzakacs: Re: MapLib:93 - Illegal LOC on symbol "clk.PAD" (pad signal=clk)
57465: 03/07/01: Colin Hall: Suitable motherboard for Spartan-IIE PCI design
    57502: 03/07/01: Eric Crabill: Re: Suitable motherboard for Spartan-IIE PCI design
        57637: 03/07/03: Brian Drummond: Re: Suitable motherboard for Spartan-IIE PCI design
57473: 03/07/01: Triax: Celoxica DK1 to Xilinx Spartan II
    57478: 03/07/01: Alan Fitch: Re: Celoxica DK1 to Xilinx Spartan II
57477: 03/07/01: lecroy: Xilinx ISE drops support for more parts
    57498: 03/07/01: Steve Lass: Re: Xilinx ISE drops support for more parts
        57548: 03/07/02: lecroy: Re: Xilinx ISE drops support for more parts
    57504: 03/07/01: Philip Freidin: Re: Xilinx ISE drops support for more parts
        57549: 03/07/02: lecroy: Re: Xilinx ISE drops support for more parts
    57514: 03/07/01: JoeG: Re: Xilinx ISE drops support for more parts
        57550: 03/07/02: lecroy: Re: Xilinx ISE drops support for more parts
            57556: 03/07/02: Rainer Buchty: Re: Xilinx ISE drops support for more parts
            57557: 03/07/02: rickman: Re: Xilinx ISE drops support for more parts
            57583: 03/07/02: Steve Lass: Re: Xilinx ISE drops support for more parts
                57596: 03/07/03: Jim Granville: Re: Xilinx ISE drops support for more parts
                    57680: 03/07/03: Steve Lass: Re: Xilinx ISE drops support for more parts
                        57764: 03/07/06: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
                57608: 03/07/03: David R Brooks: Re: Xilinx ISE drops support for more parts
                    57611: 03/07/02: rickman: Re: Xilinx ISE drops support for more parts
                        57655: 03/07/03: lecroy: Re: Xilinx ISE drops support for more parts
                            57660: 03/07/03: Peter Alfke: Re: Xilinx ISE drops support for more parts
                                57684: 03/07/03: Marius Vollmer: Re: Xilinx ISE drops support for more parts
                                    57685: 03/07/03: Uwe Bonnes: Re: Xilinx ISE drops support for more parts
                                    57686: 03/07/03: Uwe Bonnes: Re: Xilinx ISE drops support for more parts
                                        57688: 03/07/03: Peter Alfke: Re: Xilinx ISE drops support for more parts
                                        57766: 03/07/06: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
                            57765: 03/07/06: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
                                57839: 03/07/08: lecroy: Re: Xilinx ISE drops support for more parts
                                    57845: 03/07/08: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
                                        57862: 03/07/08: lecroy: Re: Xilinx ISE drops support for more parts
                                            57865: 03/07/08: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
                                                57903: 03/07/09: lecroy: Re: Xilinx ISE drops support for more parts
                                                    57985: 03/07/11: <hamish@cloud.net.au>: Re: Xilinx ISE drops support for more parts
                                                        57990: 03/07/11: rickman: Re: Xilinx ISE drops support for more parts
                                                            58004: 03/07/11: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
                                                            58174: 03/07/16: <hamish@cloud.net.au>: Re: Xilinx ISE drops support for more parts
                57656: 03/07/03: lecroy: Re: Xilinx ISE drops support for more parts
        57706: 03/07/04: Thomas Heller: Re: Xilinx ISE drops support for more parts
        57732: 03/07/04: rickman: Re: Xilinx ISE drops support for more parts
        57777: 03/07/07: Thomas Heller: Re: Xilinx ISE drops support for more parts
    57634: 03/07/03: <hamish@cloud.net.au>: Re: Xilinx ISE drops support for more parts
        57644: 03/07/03: Rainer Buchty: Re: Xilinx ISE drops support for more parts
            57654: 03/07/03: Steve Lass: Re: Xilinx ISE drops support for more parts
            57739: 03/07/05: <hamish@cloud.net.au>: Re: Xilinx ISE drops support for more parts
    57762: 03/07/06: B. Joshua Rosen: Re: Xilinx ISE drops support for more parts
        57809: 03/07/07: lecroy: Re: Xilinx ISE drops support for more parts
            57890: 03/07/09: rob d: Re: Xilinx ISE drops support for more parts
57483: 03/07/01: Timo: Seriell Decoder possibly in ABEL for Lattice CPLD
    57496: 03/07/01: Jonathan Bromley: Re: Seriell Decoder possibly in ABEL for Lattice CPLD
57487: 03/07/01: <mduane@umich.edu>: NAND flash file
    57506: 03/07/01: Steve Prokosch: Re: NAND flash file
57488: 03/07/01: Antti Lukats: EDK/XPS/Virtex2Pro - TFT core not avaialble
    57824: 03/07/07: John: Re: EDK/XPS/Virtex2Pro - TFT core not avaialble
57490: 03/07/01: David Tucker: device selection for game system
    58191: 03/07/16: Ray Andraka: Re: device selection for game system
        58215: 03/07/17: Martin Thompson: Re: device selection for game system
            58369: 03/07/21: Ray Andraka: Re: device selection for game system
    58222: 03/07/17: Antti Lukats: Re: device selection for game system
        58382: 03/07/22: Rudolf Usselmann: Re: device selection for game system
                58552: 03/07/25: David Tucker: Re: device selection for game system
                    58553: 03/07/25: Eric Smith: Re: device selection for game system
                    58556: 03/07/25: Mark Sandford: Re: device selection for game system
                        58576: 03/07/27: Eric Smith: Re: device selection for game system
            58460: 03/07/23: Antti Lukats: Re: device selection for game system
        58551: 03/07/25: David Tucker: Re: device selection for game system
57507: 03/07/01: Jimbo: Spartan-3 and Xilinx' PLB Gigabit Ethernet MAC
57509: 03/07/01: Alain: Celoxica feedback
57513: 03/07/01: Ewerson Carvalho: VirtexII bitstream relocation
    57580: 03/07/02: Gilad Cohen: Re: VirtexII bitstream relocation
        57665: 03/07/03: Ewerson Carvalho: Re: VirtexII bitstream relocation
57515: 03/07/02: Richard B. Katz: Seminar: Digital Signal Processing, Programmable Device Architecture, and Military/Aerospace Applications
    58009: 03/07/11: Ray Andraka: Re: Seminar: Digital Signal Processing, Programmable Device
57517: 03/07/01: Kartik Krishnan: ARM C/C++ compiler independent of OS
    57527: 03/07/02: Hal Murray: Re: ARM C/C++ compiler independent of OS
    57604: 03/07/03: Lasse Langwadt Christensen: Re: ARM C/C++ compiler independent of OS
57519: 03/07/01: Matt: VHDL variable setup and propogations
    57529: 03/07/02: Uwe Bonnes: Re: VHDL variable setup and propogations
57526: 03/07/01: Amir Amin: Need help in capturing serial data using FPGA and ethernet interface
57536: 03/07/02: Santi: FPGA Editor and Xilinx ISE 5.1i
    57572: 03/07/02: Chen Wei Tseng: Re: FPGA Editor and Xilinx ISE 5.1i
        57623: 03/07/03: Santi: Re: FPGA Editor and Xilinx ISE 5.1i
57537: 03/07/02: guest: Regarding NRZ
    57539: 03/07/02: Falk Brunner: Re: Regarding NRZ
        57595: 03/07/02: H. Peter Anvin: Re: Regarding NRZ
            57629: 03/07/03: guest: Re: Regarding NRZ
                57635: 03/07/03: Falk Brunner: Re: Regarding NRZ
                57639: 03/07/03: Uwe Bonnes: Re: Regarding NRZ
                57664: 03/07/03: rickman: Re: Regarding NRZ
                57694: 03/07/03: Daniel Lang: Re: Regarding NRZ
                    57726: 03/07/04: H. Peter Anvin: Re: Regarding NRZ
57540: 03/07/02: itsme: Why not DDR in FPGAs?
    57561: 03/07/02: John_H: Re: Why not DDR in FPGAs?
        57567: 03/07/02: Erik Widding: Re: Why not DDR in FPGAs?
    57681: 03/07/03: Steven K. Knapp: Re: Why not DDR in FPGAs?
        57682: 03/07/03: Nicholas C. Weaver: Re: Why not DDR in FPGAs?
        57742: 03/07/05: <hamish@cloud.net.au>: Re: Why not DDR in FPGAs?
57541: 03/07/02: Paul: PCB Problem
    57568: 03/07/02: Hal Murray: Re: PCB Problem
        57631: 03/07/03: Paul: Re: PCB Problem
57546: 03/07/02: praveen: Fixed point signed multiplication algorithm
    57574: 03/07/02: Terje Mathisen: Re: Fixed point signed multiplication algorithm
    57581: 03/07/02: Peter Alfke: Re: Fixed point signed multiplication algorithm
    57610: 03/07/03: Ken McElvain: Re: Fixed point signed multiplication algorithm
    58010: 03/07/11: Ray Andraka: Re: Fixed point signed multiplication algorithm
57551: 03/07/02: <eholbrook@austin.rr.com>: Looking for DIMM format FPGA board
    57573: 03/07/02: Leon Heller: Re: Looking for DIMM format FPGA board
        57592: 03/07/02: Bill: Re: Looking for DIMM format FPGA board
            57601: 03/07/02: Leon Heller: Re: Looking for DIMM format FPGA board
            57605: 03/07/03: Lasse Langwadt Christensen: Re: Looking for DIMM format FPGA board
                57700: 03/07/03: Bill: Re: Looking for DIMM format FPGA board
                    57950: 03/07/10: Steve Casselman: Re: Looking for DIMM format FPGA board
                        58155: 03/07/16: John Pham: Re: Looking for DIMM format FPGA board
    57837: 03/07/08: Bram Stolk: Re: Looking for DIMM format FPGA board
57552: 03/07/02: John Retta: Xilinx Methodology Questions : Unconstrained Paths and DLL output phase alignment.
    57560: 03/07/02: John_H: Re: Xilinx Methodology Questions : Unconstrained Paths and DLL output phase alignment.
    57570: 03/07/02: Philip Freidin: Re: Xilinx Methodology Questions : Unconstrained Paths and DLL output phase alignment.
57555: 03/07/02: Muthu: Combining Distributed RAM and Block RAM
    57578: 03/07/02: Gilad Cohen: Re: Combining Distributed RAM and Block RAM
57565: 03/07/02: Anand P Paralkar: Discrepancy in CLB Usage Report
    57609: 03/07/03: Ken McElvain: Re: Discrepancy in CLB Usage Report
57576: 03/07/02: Symon: USB flash disk drive -> "Unknown Device". MultiLINX to blame.
57577: 03/07/02: Matt: Process variable setup times and propogations
    57588: 03/07/02: Mike Treseler: Re: Process variable setup times and propogations
        57599: 03/07/02: Matt: Re: UART -- Process variable setup times and propogations
            57607: 03/07/02: Peter Alfke: Re: UART -- Process variable setup times and propogations
            57671: 03/07/03: Mike Treseler: Re: UART -- Process variable setup times and propogations
        57638: 03/07/03: Brian Drummond: Re: Process variable setup times and propogations
57579: 03/07/02: Antti Lukats: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
    57602: 03/07/02: Peter Ryser: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
        57707: 03/07/04: Antti Lukats: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
            57796: 03/07/07: Peter Ryser: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
    57614: 03/07/03: tk: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
        57709: 03/07/04: Antti Lukats: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
            57711: 03/07/04: tk: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
                57716: 03/07/04: Antti Lukats: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
                    57720: 03/07/04: tk: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
                        57740: 03/07/05: Antti Lukats: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
                            57741: 03/07/05: tk: Re: Virtex 2Pro, ML300, VP2PDK, EDK, etc..
57586: 03/07/02: PC: VHDL & OV6620 CMOS camera
    57597: 03/07/02: Jonathan Bromley: Re: VHDL & OV6620 CMOS camera
        57603: 03/07/03: PC: Re: VHDL & OV6620 CMOS camera
57587: 03/07/02: Rene Tschaggelar: NIOS tutorial for the Stratix1S10
    57594: 03/07/02: Petter Gustad: Re: NIOS tutorial for the Stratix1S10
        57624: 03/07/03: Rene Tschaggelar: Re: NIOS tutorial for the Stratix1S10
    57615: 03/07/02: Peter Sommerfeld: Re: NIOS tutorial for the Stratix1S10
        57626: 03/07/03: Rene Tschaggelar: Re: NIOS tutorial for the Stratix1S10
    57645: 03/07/03: Subroto Datta: Re: NIOS tutorial for the Stratix1S10
        57668: 03/07/03: Rene Tschaggelar: Re: NIOS tutorial for the Stratix1S10
    57717: 03/07/04: Rene Tschaggelar: Re: NIOS tutorial for the Stratix1S10
    57727: 03/07/05: Karsten Becker: Re: NIOS tutorial for the Stratix1S10
        57728: 03/07/05: Karsten Becker: Re: NIOS tutorial for the Stratix1S10
57590: 03/07/02: Sumit: New FPGA RISC C-NIT
57606: 03/07/02: chris_s: XPLA3 vs. MAX3000A
    57612: 03/07/02: rickman: Re: XPLA3 vs. MAX3000A
    57613: 03/07/03: Jim Granville: Re: XPLA3 vs. MAX3000A
    57632: 03/07/03: Chris_S: Re: XPLA3 vs. MAX3000A
        57641: 03/07/03: Uwe Bonnes: Re: XPLA3 vs. MAX3000A
            57658: 03/07/03: Uwe Bonnes: Re: XPLA3 vs. MAX3000A
            57670: 03/07/03: Chris_S: Re: XPLA3 vs. MAX3000A
        57643: 03/07/03: Mikeandmax: Re: XPLA3 vs. MAX3000A
            57663: 03/07/03: Chris_S: Re: XPLA3 vs. MAX3000A
        57649: 03/07/03: Chris Carlen: Re: XPLA3 vs. MAX3000A
            57666: 03/07/03: Chris_S: Re: XPLA3 vs. MAX3000A
        57662: 03/07/03: rickman: Re: XPLA3 vs. MAX3000A
            57678: 03/07/03: chris_s: Re: XPLA3 vs. MAX3000A
            57693: 03/07/04: Jim Granville: Re: XPLA3 vs. MAX3000A
                57730: 03/07/04: rickman: Re: XPLA3 vs. MAX3000A
                    57734: 03/07/05: Jim Granville: Re: XPLA3 vs. MAX3000A
                        57747: 03/07/05: rickman: Re: XPLA3 vs. MAX3000A
                            57754: 03/07/06: Jim Granville: Re: XPLA3 vs. MAX3000A
        57692: 03/07/04: Jim Granville: Re: XPLA3 vs. MAX3000A
    57705: 03/07/03: Chris_S: Re: XPLA3 vs. MAX3000A
        57731: 03/07/04: rickman: Re: XPLA3 vs. MAX3000A
            57751: 03/07/05: Chris_S: Re: XPLA3 vs. MAX3000A
                57752: 03/07/05: rickman: Re: XPLA3 vs. MAX3000A
                    57757: 03/07/05: Chris_S: Re: XPLA3 vs. MAX3000A
                        57758: 03/07/06: Jim Granville: Re: XPLA3 vs. MAX3000A
                57805: 03/07/07: jesse jenkins: Re: XPLA3 vs. MAX3000A
                    57815: 03/07/08: Jim Granville: Re: XPLA3 vs. MAX3000A
                        57819: 03/07/07: Peter Alfke: Re: XPLA3 vs. MAX3000A
57616: 03/07/03: Jay: post-PAR simulation model
    57627: 03/07/03: Sandeep Kulkarni: Re: post-PAR simulation model
        57697: 03/07/04: Jay: Re: post-PAR simulation model
57617: 03/07/03: SP: ARM+FPGA
    57673: 03/07/03: Mark Sandford: Re: ARM+FPGA
        57712: 03/07/04: Kari Runk: Re: ARM+FPGA
57618: 03/07/03: juice28: xilinx and web pack questions newbe
    57651: 03/07/03: Chris Carlen: Re: xilinx and web pack questions newbe
        57657: 03/07/03: juice28: Re: xilinx and web pack questions newbe
57619: 03/07/03: Stifler: What a fascinating board!
    57620: 03/07/03: Philip Freidin: Re: What a fascinating board!
    57633: 03/07/03: Chris_S: Re: What a fascinating board!
    57659: 03/07/03: rickman: Re: What a fascinating board!
    57652: 03/07/03: Chris Carlen: Re: check one two check check
57625: 03/07/03: Markus Meng: [DLL Virtex/Spartan-II] Which is the right feedback in x1 and x2 Appl
    57825: 03/07/07: John: Re: [DLL Virtex/Spartan-II] Which is the right feedback in x1 and
57628: 03/07/03: Markus Meng: [DLL usage Virtex/Spartan-II] HowTo drive CLKDV Div 2 off Chip
    57826: 03/07/07: John: Re: [DLL usage Virtex/Spartan-II] HowTo drive CLKDV Div 2 off Chip
        57854: 03/07/08: Avrum: Re: [DLL usage Virtex/Spartan-II] HowTo drive CLKDV Div 2 off Chip
57630: 03/07/03: Aziz AhmedSaid: RE:can you please post a summary of your findings to the group?
57636: 03/07/03: Christoph Grundner: create JAM-File for Xilinx device
    57708: 03/07/04: Antti Lukats: Re: create JAM-File for Xilinx device
        57779: 03/07/07: Christoph Grundner: Re: create JAM-File for Xilinx device
            57802: 03/07/07: Uwe Bonnes: Re: create JAM-File for Xilinx device
        57921: 03/07/09: Neil Glenn Jacobson: Re: create JAM-File for Xilinx device
57642: 03/07/03: Manfred Kraus: Spartan-3 availability
    57648: 03/07/03: Manfred Kraus: Re: Spartan-3 availability
        57669: 03/07/03: rickman: Re: Spartan-3 availability
    57653: 03/07/03: Peter Alfke: Re: Spartan-3 availability
    57713: 03/07/04: Manfred Kraus: Re: Spartan-3 availability
        57714: 03/07/04: Uwe Bonnes: Re: Spartan-3 availability
            57733: 03/07/04: rickman: Re: Spartan-3 availability
                57788: 03/07/07: Tolga: Re: Spartan-3 availability
                    57789: 03/07/07: rickman: Re: Spartan-3 availability
57646: 03/07/03: Petter Gustad: Using Quarus to create SVF files?
    57679: 03/07/03: Subroto Datta: Re: Using Quarus to create SVF files?
        57683: 03/07/03: Petter Gustad: Re: Using Quarus to create SVF files?
57675: 03/07/03: rickman: ACEX (EP1K) Power-Up Current
    57691: 03/07/03: Greg Steinke: Re: ACEX (EP1K) Power-Up Current
        57729: 03/07/04: rickman: Re: ACEX (EP1K) Power-Up Current
57687: 03/07/03: Mike: Questions about Design Compiler.
57690: 03/07/03: Subroto Datta: Quartus II 3.0 Release & Web Edition Download Links
    57695: 03/07/04: leon qin: Re: Quartus II 3.0 Release & Web Edition Download Links
        57746: 03/07/05: Ben Twijnstra: Re: Quartus II 3.0 Release & Web Edition Download Links
    57710: 03/07/04: Valeria Dal Monte: Re: Quartus II 3.0 Release & Web Edition Download Links
        57718: 03/07/04: Subroto Datta: Re: Quartus II 3.0 Release & Web Edition Download Links
        57745: 03/07/05: Ben Twijnstra: Re: Quartus II 3.0 Release & Web Edition Download Links
            57750: 03/07/05: rickman: Re: Quartus II 3.0 Release & Web Edition Download Links
57696: 03/07/04: GpsBob: Difficulty with OPB bus and user IP
    57790: 03/07/07: Ryan Laity: Re: Difficulty with OPB bus and user IP
    57808: 03/07/07: Lasse Langwadt Christensen: Re: Difficulty with OPB bus and user IP
        57814: 03/07/07: Ryan Laity: Re: Difficulty with OPB bus and user IP
57699: 03/07/04: juice28: okay what am I missing??? Please
    57926: 03/07/09: Marc Guardiani: Re: okay what am I missing??? Please
        57935: 03/07/10: juice28: Re: okay what am I missing??? Please
            57938: 03/07/10: Martin Euredjian: Re: okay what am I missing??? Please
                57939: 03/07/10: juice28: Re: okay what am I missing??? Please
            57954: 03/07/10: Theron Hicks: Re: okay what am I missing??? Please
                57956: 03/07/10: Peter Alfke: Re: okay what am I missing??? Please
                    57969: 03/07/10: Theron Hicks (Terry): Re: okay what am I missing??? Please
                57958: 03/07/10: Philip Freidin: Re: okay what am I missing??? Please
57701: 03/07/03: Jason Berringer: constraints, etc
    57866: 03/07/08: Spam Hater: Re: constraints, etc
57703: 03/07/03: Yu Haiwen: DCM usage question
    57715: 03/07/04: Marc Randolph: Re: DCM usage question
        57776: 03/07/06: Jay: Re: DCM usage question
    57791: 03/07/07: Peter Alfke: Re: DCM usage question
57704: 03/07/03: Guest: information required
    57722: 03/07/04: Avrum: Re: information required
    57736: 03/07/04: Guest: Re: information required
    57793: 03/07/07: Peter Alfke: Re: information required
        57885: 03/07/08: Karthik: Re: information required
        57937: 03/07/09: Karthik: Re: information required
57719: 03/07/04: Nap: About BRAM in VirtexII
    57847: 03/07/08: Steve Casselman: Re: About BRAM in VirtexII
    57852: 03/07/08: Avrum: Re: About BRAM in VirtexII
57724: 03/07/04: Brad Smallridge: Re: Starter Question and Opinion on VHDL
    57780: 03/07/07: Jonathan Bromley: Re: Starter Question and Opinion on VHDL
57735: 03/07/04: Ketan: division
    57768: 03/07/06: Replace_latter8717_with_manorsway: Re: division
        57771: 03/07/07: Mario Trams: Re: division
            57797: 03/07/07: Replace_latter8717_with_manorsway: Re: division
            57914: 03/07/09: Replace_latter8717_with_manorsway: Re: division
                57920: 03/07/09: Glen Herrmannsfeldt: Re: division
                    57923: 03/07/09: Peter Alfke: Re: division
                        57980: 03/07/11: Glen Herrmannsfeldt: Re: division
57737: 03/07/05: Thomas: hidden remap failed
    57738: 03/07/05: Thomas: Re: hidden remap failed
57748: 03/07/05: Alex: Xilinx:CAM
57749: 03/07/05: rickman: QuartusII software licencing
    57772: 03/07/06: Andy Peters: Re: QuartusII software licencing
        57773: 03/07/06: rickman: Re: QuartusII software licencing
            57774: 03/07/06: Spam Hater 7: Re: QuartusII software licencing
            57785: 03/07/07: mk: Re: QuartusII software licencing
                57787: 03/07/07: Giuseppe³: Re: QuartusII software licencing
                    57817: 03/07/07: H. Peter Anvin: Re: QuartusII software licencing
                        57874: 03/07/09: Sander Vesik: Re: QuartusII software licencing
57753: 03/07/05: db: Exceptional conditions on XST.
    57800: 03/07/07: Steve Lass: Re: Exceptional conditions on XST.
57759: 03/07/06: Uwe Bonnes: Re: Spartan2E + PCI
57761: 03/07/06: Chris_S: What About CPLD Standardization ?
    57769: 03/07/07: Jim Granville: Re: What About CPLD Standardization ?
57763: 03/07/06: rickman: Re: Spartan2E + PCI
57767: 03/07/06: Ed Diego: Spartan2E + PCI
57775: 03/07/07: Jean Nicolle: control R/C servos with FPGAs
57778: 03/07/07: Christian Haase: Dynamic Reconfiguration, Contentions
    57836: 03/07/08: Steve Casselman: Re: Dynamic Reconfiguration, Contentions
        57887: 03/07/09: Christian Haase: Re: Dynamic Reconfiguration, Contentions
57781: 03/07/07: Anup Kumar Raghavan: Spartan XL Tool Support
    57783: 03/07/07: Neeraj Varma: Re: Spartan XL Tool Support
    57799: 03/07/07: Steve Lass: Re: Spartan XL Tool Support
57782: 03/07/07: Thomas: spartan2e block ram error
57784: 03/07/07: Matt: Re UART troubles solved - THANKS Mike, Peter, and Philip!!
57786: 03/07/07: Thorsten Klatt: Problem with user defined logicinterface in Nios
    57795: 03/07/07: Jim M.: Re: Problem with user defined logicinterface in Nios
57792: 03/07/07: Nir: Nios bash acting bizzar
    57798: 03/07/07: Krzysztof Olesiejuk: Re: Nios bash acting bizzar
        57833: 03/07/07: Nir: Re: Nios bash acting bizzar
    57843: 03/07/08: Peter Sommerfeld: Re: Nios bash acting bizzar
57801: 03/07/07: Martin Euredjian: Pulse stretching
    57806: 03/07/07: John_H: Re: Pulse stretching
        57816: 03/07/07: Martin Euredjian: Re: Pulse stretching
            57820: 03/07/07: Peter Alfke: Re: Pulse stretching
                57888: 03/07/09: Martin Euredjian: Re: Pulse stretching
57803: 03/07/07: Bojan: CPSR register
57804: 03/07/07: rickman: Altera licenses
    57810: 03/07/07: Jean Nicolle: Re: Altera licenses
    57831: 03/07/08: maxfoo: Re: Altera licenses
57807: 03/07/07: <bob@zeidmanconsulting.com>: Beta sites needed
57811: 03/07/07: Charles Krinke: GSR
    57812: 03/07/07: Uwe Bonnes: Re: GSR
    57835: 03/07/08: Steve Casselman: Re: GSR
57813: 03/07/07: Giuseppe³: ISE 5.1/5.2 Error
57821: 03/07/07: John: Re: Rant mode ON
    57894: 03/07/09: Allan Herriman: Re: Rant mode ON
    57900: 03/07/09: rickman: Re: Rant mode ON
57822: 03/07/07: John: Re: User Core OPB Problem (EDK3.2)
57828: 03/07/07: Jimy: wired downloading bitstream to spartan2
    57834: 03/07/08: Peter Seng: Re: wired downloading bitstream to spartan2
    57922: 03/07/09: Neil Glenn Jacobson: Re: wired downloading bitstream to spartan2
57829: 03/07/07: Mike: std_logic_vector type port doesn't work after synthesis.
    57851: 03/07/08: Mike Treseler: Re: std_logic_vector type port doesn't work after synthesis.
        57875: 03/07/08: Liang Yang: Re: std_logic_vector type port doesn't work after synthesis.
            57898: 03/07/09: z.karim: Re: std_logic_vector type port doesn't work after synthesis.
                57902: 03/07/09: Mike: Re: std_logic_vector type port doesn't work after synthesis.
            57917: 03/07/09: Mike Treseler: Re: std_logic_vector type port doesn't work after synthesis.
57830: 03/07/07: Jerry: eCOS port for NIOS
    57832: 03/07/08: Khim Bittle: Re: eCOS port for NIOS
57838: 03/07/08: Tim Hogard: Copy Altera Config EPC2 via JTAG?
    57857: 03/07/08: Rene Tschaggelar: Re: Copy Altera Config EPC2 via JTAG?
57840: 03/07/08: Marc Battyani: phase noise in NCO
    57841: 03/07/08: rickman: Re: phase noise in NCO
    57848: 03/07/08: John_H: Re: phase noise in NCO
        57868: 03/07/09: Marc Battyani: Re: phase noise in NCO
    57849: 03/07/08: Peter Alfke: Re: phase noise in NCO
        57869: 03/07/09: Marc Battyani: Re: phase noise in NCO
            57872: 03/07/09: Jim Granville: Re: phase noise in NCO
                58055: 03/07/14: Marc Battyani: Re: phase noise in NCO
                    58067: 03/07/14: John_H: Re: phase noise in NCO
            57873: 03/07/09: John_H: Re: phase noise in NCO
    57853: 03/07/09: Allan Herriman: Re: phase noise in NCO
        57867: 03/07/09: Marc Battyani: Re: phase noise in NCO
            57889: 03/07/09: Allan Herriman: Re: phase noise in NCO
                58052: 03/07/13: Marc Battyani: Re: phase noise in NCO
    57927: 03/07/10: maxfoo: Re: phase noise in NCO
        58053: 03/07/13: Marc Battyani: Re: phase noise in NCO
57842: 03/07/08: Nahum Barnea: workstation for virtex2 - 8000
    58448: 03/07/23: Bill Hanna: Re: workstation for virtex2 - 8000
        58455: 03/07/23: Andrew Paule: Re: workstation for virtex2 - 8000
57844: 03/07/08: John: Re: Rant mode ON
    57882: 03/07/09: John: Re: Rant mode <OFF>
    57928: 03/07/09: rickman: Re: Rant mode <OFF>
57846: 03/07/08: rickman: Rant mode ON
    57850: 03/07/08: Nicholas C. Weaver: Re: Rant mode ON
    57861: 03/07/08: CB: Re: Rant mode ON
        57880: 03/07/09: rickman: Re: Rant mode ON
            57881: 03/07/09: Nicholas C. Weaver: Re: Rant mode ON
                57899: 03/07/09: rickman: Re: Rant mode ON
                57925: 03/07/10: Hal Murray: Re: Rant mode ON
                    57930: 03/07/09: rickman: Re: Rant mode ON
                        57943: 03/07/10: Russell Shaw: Re: Rant mode ON
        57891: 03/07/09: Kolja Sulimma: Re: Rant mode ON
    57863: 03/07/08: Falk Brunner: Re: Rant mode ON
        57901: 03/07/09: rickman: Re: Rant mode ON
            57904: 03/07/09: Leon Heller: Re: Rant mode ON
                57907: 03/07/09: rickman: Re: Rant mode <OFF>
57855: 03/07/08: MACEI'S: Multiple Files to Synthesis in Make File ?
57856: 03/07/08: Udayan: clock management on SPARTAN2
    57859: 03/07/08: Uwe Bonnes: Re: clock management on SPARTAN2
        57905: 03/07/09: Udayan: Re: clock management on SPARTAN2
            57906: 03/07/09: Uwe Bonnes: Re: clock management on SPARTAN2
                57915: 03/07/09: Udayan: Re: clock management on SPARTAN2
    57909: 03/07/09: Aurelian Lazarut: Re: clock management on SPARTAN2
    59103: 03/08/08: Manfred Kraus: Re: clock management on SPARTAN2
57858: 03/07/08: MACEI'S: Books
    57870: 03/07/08: Jon: Re: Books
    57878: 03/07/08: Ajeetha Kumari: Re: Books
57871: 03/07/08: Aman Gayasen: Benchmark designs for partial dynamic reconfiguration
57886: 03/07/08: Jared: Leonardo changes name of lpm megafunction
    57976: 03/07/11: Hans: Re: Leonardo changes name of lpm megafunction
    58011: 03/07/11: Jen: Re: Leonardo changes name of lpm megafunction
57892: 03/07/09: <Mancini =?iso-8859-1?q?St=E9phane=22?= <stephane.mancini@inpg.fr>>: Xilinx price question
    57916: 03/07/09: Mel: Re: Xilinx price question
57893: 03/07/09: Morten Leikvoll: cascaded DLL's in VirtexE, routing problems
    57961: 03/07/10: Ray Andraka: Re: cascaded DLL's in VirtexE, routing problems
57895: 03/07/09: Isaac: How to change Read Only Constraint to Read-Write
    57896: 03/07/09: Allan Herriman: Re: How to change Read Only Constraint to Read-Write
        57912: 03/07/09: Isaac: Re: How to change Read Only Constraint to Read-Write
            57942: 03/07/10: Allan Herriman: Re: How to change Read Only Constraint to Read-Write
                57946: 03/07/10: Isaac: Re: How to change Read Only Constraint to Read-Write
57908: 03/07/09: Prashant: Synplify and then Quartus
    57919: 03/07/09: Mike Treseler: Re: Synplify and then Quartus
    57933: 03/07/10: Ken McElvain: Re: Synplify and then Quartus
57910: 03/07/09: MACEI'S: Make file ...........Help Please
    57931: 03/07/10: Peter J. Kootsookos: Re: Make file ...........Help Please
    57936: 03/07/09: Rudolf Usselmann: Re: Make file ...........Help Please
57911: 03/07/09: Muhammad Khan: how can I use a signal defined in one Architecture to another Architecture
    57913: 03/07/09: Mario Trams: Re: how can I use a signal defined in one Architecture to another Architecture
    57918: 03/07/09: Jon: Re: how can I use a signal defined in one Architecture to another Architecture
        57934: 03/07/10: Ken McElvain: Re: how can I use a signal defined in one Architecture to another Architecture
57924: 03/07/09: ..:: Gabster ::..: PROM JTAG download cable for Xilinx Spartan II + Webpack
    57945: 03/07/10: Antti Lukats: Re: PROM JTAG download cable for Xilinx Spartan II + Webpack
    57957: 03/07/10: ..:: Gabster ::..: Re: PROM JTAG download cable for Xilinx Spartan II + Webpack
        57981: 03/07/11: Antti Lukats: Re: PROM JTAG download cable for Xilinx Spartan II + Webpack
57929: 03/07/10: Anup Kumar Raghavan: Spartan XL Prom Selection
    57973: 03/07/11: Spam Hater: Re: Spartan XL Prom Selection
        57983: 03/07/11: Neeraj Varma: Re: Spartan XL Prom Selection
        58003: 03/07/11: Ashok Chotai: Re: Spartan XL Prom Selection
            58042: 03/07/14: Anup Kumar Raghavan: Re: Spartan XL Prom Selection
57932: 03/07/09: ouadid abdelkarim: Please help in soft-decision decoding of convolutionel codes
57940: 03/07/10: Christian Haase: Partial Bitstream, Virtex-II, Virtex-II PRO
57941: 03/07/10: millim: Xilinx Spartan-3 samples, how to get?
    57947: 03/07/10: rickman: Re: Xilinx Spartan-3 samples, how to get?
        57948: 03/07/10: Peter Alfke: Re: Xilinx Spartan-3 samples, how to get?
            57993: 03/07/11: Amontec Team: Re: Xilinx Spartan-3 samples, how to get?
57944: 03/07/10: Jerzy: viterbi - SMU - trace back calculation
57949: 03/07/10: Aman Gayasen: Benchmarks for partial dynamic reconfiguration
57951: 03/07/10: Raoul: XILINX COREGEN FFT CORE 2.0
57953: 03/07/10: rickman: Quartus warning in NUMERIC_STD.vhd
    57978: 03/07/11: Alan Fitch: Re: Quartus warning in NUMERIC_STD.vhd
        57988: 03/07/11: rickman: Re: Quartus warning in NUMERIC_STD.vhd
        57996: 03/07/11: Alan Nishioka: Re: Quartus warning in NUMERIC_STD.vhd
            58002: 03/07/11: rickman: Re: Quartus warning in NUMERIC_STD.vhd
        57998: 03/07/11: Mike Treseler: Re: Quartus warning in NUMERIC_STD.vhd
            58033: 03/07/12: Clyde R. Shappee: Re: Quartus warning in NUMERIC_STD.vhd
                58034: 03/07/12: Mike Treseler: Re: Quartus warning in NUMERIC_STD.vhd
                    58047: 03/07/13: Clyde R. Shappee: Re: Quartus warning in NUMERIC_STD.vhd
    58007: 03/07/11: Subroto Datta: Re: Quartus warning in NUMERIC_STD.vhd
57955: 03/07/10: David: Fpga design with multiple audio rate (44, 48khz ...)
    57959: 03/07/10: H. Peter Anvin: Re: Fpga design with multiple audio rate (44, 48khz ...)
        58099: 03/07/14: David: Re: Fpga design with multiple audio rate (44, 48khz ...)
    57962: 03/07/10: Jan Panteltje: Re: Fpga design with multiple audio rate (44, 48khz ...)
    57965: 03/07/10: rickman: Re: Fpga design with multiple audio rate (44, 48khz ...)
        57970: 03/07/10: David: Re: Fpga design with multiple audio rate (44, 48khz ...)
            57972: 03/07/11: rickman: Re: Fpga design with multiple audio rate (44, 48khz ...)
                58001: 03/07/11: David: Re: Fpga design with multiple audio rate (44, 48khz ...)
                    58006: 03/07/11: Falk Brunner: Re: Fpga design with multiple audio rate (44, 48khz ...)
57960: 03/07/10: Pete: Behavioral simulation problem using Modelsim
57963: 03/07/11: Johnny: wireless 802.11
    58064: 03/07/14: Stevenson: Re: wireless 802.11
57967: 03/07/10: John Pham: Xilinx FPGA module
    57994: 03/07/11: Amontec Team: Re: Xilinx FPGA module
        58149: 03/07/16: John Pham: Re: Xilinx FPGA module
57968: 03/07/10: Jeff: Questions about the figure in algorithm implimenting in hardware
57974: 03/07/11: rickman: Missing something...
    57977: 03/07/11: Dziadek: Re: Missing something...
        57987: 03/07/11: rickman: Re: Missing something...
    57995: 03/07/11: Amontec Team: Re: Missing something...
        57999: 03/07/11: rickman: Re: Missing something...
            58030: 03/07/12: Stifler: Re: Missing something...
                58057: 03/07/13: Peter Alfke: Re: Missing something...
                    58094: 03/07/14: rickman: Re: Missing something...
                58093: 03/07/14: rickman: Re: Missing something...
57975: 03/07/11: HT Chang: resynthesize ASIC netlist
    57997: 03/07/11: Amontec Team: Re: resynthesize ASIC netlist
57979: 03/07/11: Sasa Bremec: DDS theory of operation
    58008: 03/07/11: Ray Andraka: Re: DDS theory of operation
57982: 03/07/11: Krzysztof Szczepanski: VIRTEX switching IO voltage 3.3V / 2.5V
    58023: 03/07/12: John_H: Re: VIRTEX switching IO voltage 3.3V / 2.5V
57984: 03/07/11: Morten Leikvoll: From one clock domain to another
    57989: 03/07/11: rickman: Re: From one clock domain to another
    58000: 03/07/11: Philip Freidin: Re: From one clock domain to another
        58005: 03/07/11: rickman: Re: From one clock domain to another
            58021: 03/07/12: Morten Leikvoll: Re: From one clock domain to another
                58022: 03/07/11: rickman: Re: From one clock domain to another
57986: 03/07/11: l nguyen: DCM CLKFX simulation
    58056: 03/07/14: John Williams: Re: DCM CLKFX simulation
    58075: 03/07/14: l nguyen: Re: DCM CLKFX simulation
        58090: 03/07/15: John Williams: Re: DCM CLKFX simulation
57991: 03/07/11: MACEI'S: how to compile .vhd files one by one using makefile
57992: 03/07/11: Amontec Team: XML for VHDL documention and structural description of Hardware SoC
58012: 03/07/11: Jon Elson: Re: Graduation Day: My first 4-layer PCB
58013: 03/07/11: ..:: Gabster ::..: Graduation Day: My first 4-layer PCB
    58014: 03/07/11: rickman: Re: Graduation Day: My first 4-layer PCB
    58015: 03/07/11: rickman: Re: Graduation Day: My first 4-layer PCB
        58016: 03/07/11: ..:: Gabster ::..: Re: Graduation Day: My first 4-layer PCB
            58025: 03/07/12: Klaus Vestergaard Kragelund: Re: Graduation Day: My first 4-layer PCB
                58036: 03/07/13: Glen Herrmannsfeldt: Re: Graduation Day: My first 4-layer PCB
                    58038: 03/07/13: Hal Murray: Re: Graduation Day: My first 4-layer PCB
                        58054: 03/07/13: james: Re: Graduation Day: My first 4-layer PCB
    58051: 03/07/13: james: Re: Graduation Day: My first 4-layer PCB
        58059: 03/07/13: t hicks: Re: Graduation Day: My first 4-layer PCB
            58060: 03/07/14: Hal Murray: Re: Graduation Day: My first 4-layer PCB
                58080: 03/07/14: Kolja Sulimma: Re: Graduation Day: My first 4-layer PCB
                58082: 03/07/14: james: Re: Graduation Day: My first 4-layer PCB
            58084: 03/07/14: james: Re: Graduation Day: My first 4-layer PCB
                58154: 03/07/15: t hicks: Re: Graduation Day: My first 4-layer PCB
                    58156: 03/07/16: John_H: Re: Graduation Day: My first 4-layer PCB
    58061: 03/07/13: Jay: Re: Graduation Day: My first 4-layer PCB
    58165: 03/07/16: Hal Murray: Re: Graduation Day: My first 4-layer PCB
        58182: 03/07/16: ..:: Gabster ::..: Re: Graduation Day: My first 4-layer PCB
            58183: 03/07/16: Hal Murray: Re: Graduation Day: My first 4-layer PCB
        58256: 03/07/18: Martin Schoeberl: Re: Graduation Day: My first 4-layer PCB
            58260: 03/07/18: rickman: Re: Graduation Day: My first 4-layer PCB
                58262: 03/07/18: Tim: Re: Graduation Day: My first 4-layer PCB
                58263: 03/07/18: John_H: Re: Graduation Day: My first 4-layer PCB
                    58270: 03/07/18: rickman: Re: Graduation Day: My first 4-layer PCB
                58338: 03/07/21: Martin Thompson: Re: Graduation Day: My first 4-layer PCB
            58281: 03/07/19: Jim Granville: Re: Graduation Day: My first 4-layer PCB
58017: 03/07/11: rickman: Quartus VHDL problem with aggregate and type cast
    58062: 03/07/14: Alan Fitch: Re: Quartus VHDL problem with aggregate and type cast
        58095: 03/07/14: rickman: Re: Quartus VHDL problem with aggregate and type cast
            58101: 03/07/15: rickman: Re: Quartus VHDL problem with aggregate and type cast
                58109: 03/07/15: Alan Fitch: Re: Quartus VHDL problem with aggregate and type cast
58020: 03/07/11: Brad Eckert: Post-fit simulation question
    58028: 03/07/12: Gilad Cohen: Re: Post-fit simulation question
        58077: 03/07/14: Brad Eckert: Re: Post-fit simulation question
            58108: 03/07/14: Gilad Cohen: Re: Post-fit simulation question
    58066: 03/07/14: John_H: Re: Post-fit simulation question
58026: 03/07/12: Thomas Fuchs: CLKDLLE CLK2X180 Outpu doesn't work
    58027: 03/07/12: Markus Meng: Re: CLKDLLE CLK2X180 Outpu doesn't work
    58118: 03/07/15: Morten Leikvoll: Re: CLKDLLE CLK2X180 Outpu doesn't work
58029: 03/07/12: John Phillips: Actel ProAsic+ APA -> User's Clock speed??
58031: 03/07/12: Martin Euredjian: Parallel processing (synthesis and simulation)
58032: 03/07/12: yxl: How to choose FPGA device?
    58035: 03/07/13: Philip Freidin: Re: How to choose FPGA device?
        58041: 03/07/13: Simon Peacock: Re: How to choose FPGA device?
        58063: 03/07/14: Yttrium: Re: How to choose FPGA device?
    58386: 03/07/22: Andrew Paule: Re: How to choose FPGA device?
58037: 03/07/12: t hicks: edge card connectors and high speed design
    58040: 03/07/13: Norm Dresner: Re: edge card connectors and high speed design
    58045: 03/07/13: Peter Wallace: Re: edge card connectors and high speed design
    58161: 03/07/16: Hal Murray: Re: edge card connectors and high speed design
58039: 03/07/13: ..:: Gabster ::..: Wanted: Orcad Capture symbol for Xilinx Spartan IIE XC2S300E PQ208
    58044: 03/07/13: Spam Hater: Re: Wanted: Orcad Capture symbol for Xilinx Spartan IIE XC2S300E PQ208
        58048: 03/07/13: ..:: Gabster ::..: Re: Wanted: Orcad Capture symbol for Xilinx Spartan IIE XC2S300E PQ208
    58049: 03/07/13: Mike Butts: Re: Wanted: Orcad Capture symbol for Xilinx Spartan IIE XC2S300E PQ208
    58134: 03/07/15: Steve Casselman: Re: Wanted: Orcad Capture symbol for Xilinx Spartan IIE XC2S300E PQ208
58043: 03/07/14: Anup Kumar Raghavan: Virtex Bitstream verification
    58050: 03/07/13: Neil Franklin: Re: Virtex Bitstream verification
58046: 03/07/13: Denis Gleeson: Combinational logic and gate delays - Help
    58058: 03/07/13: Peter Alfke: Re: Combinational logic and gate delays - Help
        58070: 03/07/14: Denis Gleeson: Re: Combinational logic and gate delays - Help
            58085: 03/07/14: Ray Andraka: Re: Combinational logic and gate delays - Help
            58091: 03/07/14: Peter Alfke: Re: Combinational logic and gate delays - Help
        58073: 03/07/14: Denis Gleeson: Re: Combinational logic and gate delays - Help
            58079: 03/07/14: Avrum: Re: Combinational logic and gate delays - Help
            58092: 03/07/14: Peter Alfke: Re: Combinational logic and gate delays - Help
            58152: 03/07/16: Hal Murray: Re: Combinational logic and gate delays - Help
    58069: 03/07/14: Mike Treseler: Re: Combinational logic and gate delays - Help
        58171: 03/07/16: Denis Gleeson: Re: Combinational logic and gate delays - Help
        58207: 03/07/16: Andrew Paule: Re: Combinational logic and gate delays - Help
            58225: 03/07/17: Paul Leventis: Re: Combinational logic and gate delays - Help
58065: 03/07/14: Michael Nicklas: library issues
58071: 03/07/14: javid: programming a PLD/CPLD with a PIC?
    58083: 03/07/14: Ben Jackson: Re: programming a PLD/CPLD with a PIC?
        58103: 03/07/14: javid: Re: programming a PLD/CPLD with a PIC?
            58105: 03/07/15: Ben Jackson: Re: programming a PLD/CPLD with a PIC?
                58115: 03/07/15: javid: Re: programming a PLD/CPLD with a PIC?
            58113: 03/07/15: Mario Trams: Re: programming a PLD/CPLD with a PIC?
    58126: 03/07/15: Jason Daughenbaugh: Re: programming a PLD/CPLD with a PIC?
    58143: 03/07/15: Philip Freidin: Re: programming a PLD/CPLD with a PIC?
        58158: 03/07/15: javid: Re: programming a PLD/CPLD with a PIC?
    58243: 03/07/17: Powermos: Re: programming a PLD/CPLD with a PIC?
58072: 03/07/14: Greatin Baby: Xilinx Spartan 2E Clock generator selection
58076: 03/07/14: Josh Kramer: Aurora Reference Design help
58078: 03/07/14: Stephen: problems on using CLKDLL in Xilinx ISE
    58098: 03/07/15: Jay: Re: problems on using CLKDLL in Xilinx ISE
    58110: 03/07/15: Muhammad Khan: Re: problems on using CLKDLL in Xilinx ISE
58088: 03/07/14: Kevin Neilson: Booth Multipliers
    58089: 03/07/14: Nicholas C. Weaver: Re: Booth Multipliers
58104: 03/07/15: ..:: Gabster ::..: JTAG standard connector
    58106: 03/07/15: Ben Jackson: Re: JTAG standard connector
    58120: 03/07/15: Leon Heller: Re: JTAG standard connector
    58130: 03/07/15: Brad Eckert: Re: JTAG standard connector
    58153: 03/07/16: Hal Murray: Re: JTAG standard connector
        58180: 03/07/16: ..:: Gabster ::..: Re: JTAG standard connector
58111: 03/07/15: Marco Kluge: Bus macros and partial reconfiguration
58112: 03/07/15: MACEI'S: how to remove this error
    58146: 03/07/15: Jon: Re: how to remove this error
58114: 03/07/15: MACEI'S: Make file ...........Help Please
    58117: 03/07/15: Ronald Hecht: Re: Make file ...........Help Please
58116: 03/07/15: Antti Lukats: JTAG Boundary scan during configuration
    58119: 03/07/15: rickman: Re: JTAG Boundary scan during configuration
        58163: 03/07/16: Antti Lukats: Re: JTAG Boundary scan during configuration
            58172: 03/07/16: rickman: Re: JTAG Boundary scan during configuration
58121: 03/07/15: tk: "ML300 Embedded" Mapping Help
    58164: 03/07/16: Antti Lukats: Re: "ML300 Embedded" Mapping Help
        58170: 03/07/16: tk: Re: "ML300 Embedded" Mapping Help
            58184: 03/07/16: Antti Lukats: Re: "ML300 Embedded" Mapping Help
                58238: 03/07/17: tk: Re: "ML300 Embedded" Mapping Help
    58274: 03/07/18: Peter Ryser: Re: "ML300 Embedded" Mapping Help
        58294: 03/07/19: Antti Lukats: Re: "ML300 Embedded" Mapping Help
            58320: 03/07/20: Peter Ryser: Re: "ML300 Embedded" Mapping Help
                58347: 03/07/21: tk: Re: "ML300 Embedded" Mapping Help
                    58450: 03/07/23: Peter Ryser: Re: "ML300 Embedded" Mapping Help
                        58582: 03/07/27: Lan Nguyen: Re: "ML300 Embedded" Mapping Help
                            58584: 03/07/27: Antti Lukats: Re: "ML300 Embedded" Mapping Help
                                58587: 03/07/28: tk: Re: "ML300 Embedded" Mapping Help
                                    58592: 03/07/28: Antti Lukats: Re: "ML300 Embedded" Mapping Help
                                        58647: 03/07/29: Peter Ryser: Re: "ML300 Embedded" Mapping Help
                                            58656: 03/07/30: Antti Lukats: Re: "ML300 Embedded" Mapping Help
                                    58646: 03/07/29: Peter Ryser: Re: "ML300 Embedded" Mapping Help
                                        58651: 03/07/30: tk: Re: "ML300 Embedded" Mapping Help
                            58645: 03/07/29: Peter Ryser: Re: "ML300 Embedded" Mapping Help
                                58854: 03/08/02: Lan Nguyen: Re: "ML300 Embedded" Mapping Help
                                    58969: 03/08/05: Peter Ryser: Re: "ML300 Embedded" Mapping Help
                                        59093: 03/08/07: Lan Nguyen: Re: "ML300 Embedded" Mapping Help
58122: 03/07/15: Michael S: Is a Virtex-II Pro family a hands-down winner for DSP ?
    58125: 03/07/15: Austin Lesea: Virtex-II Pro family is a hands-down winner for DSP
    58131: 03/07/15: rickman: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
    58187: 03/07/16: Ray Andraka: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
        58312: 03/07/20: Peter Sommerfeld: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
            58314: 03/07/20: Nicholas C. Weaver: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
            59678: 03/08/25: Ray Andraka: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
    58208: 03/07/16: Vaughn Betz: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
        58226: 03/07/17: Michael S: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
            58249: 03/07/17: Ray Andraka: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
        58248: 03/07/17: Ray Andraka: Re: Is a Virtex-II Pro family a hands-down winner for DSP ?
58123: 03/07/15: ..:: Gabster ::..: PROM size for spartan
    58129: 03/07/15: Bruce Jorgens: Re: PROM size for spartan
        58137: 03/07/15: ..:: Gabster ::..: Re: PROM size for spartan
        58157: 03/07/16: Neeraj Varma: Re: PROM size for spartan
    58135: 03/07/15: Peter Alfke: Re: PROM size for spartan
        58136: 03/07/15: Nicholas C. Weaver: Re: PROM size for spartan
            58138: 03/07/15: Austin Lesea: Re: PROM size for spartan
                58142: 03/07/15: Nicholas C. Weaver: Re: PROM size for spartan
                    58145: 03/07/15: Austin Lesea: Re: PROM size for spartan
                        58318: 03/07/20: Symon: Re: PROM size for spartan
                            58342: 03/07/21: Austin Lesea: Use ICAp iwth a soft IP core to decompress!!!!
                                58352: 03/07/21: rickman: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                    58353: 03/07/21: Austin Lesea: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                    58361: 03/07/22: Lasse Langwadt Christensen: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                58451: 03/07/23: Symon: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                    58452: 03/07/24: John Williams: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                        58508: 03/07/24: Symon: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                            58515: 03/07/25: John Williams: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                            58535: 03/07/25: Austin Lesea: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                    58453: 03/07/23: Ray Andraka: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                        58472: 03/07/24: Austin Lesea: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                            58495: 03/07/24: Symon: Re: Use ICAp iwth a soft IP core to decompress!!!!
                                                58536: 03/07/25: Austin Lesea: Re: Use ICAp iwth a soft IP core to decompress!!!!
                    58206: 03/07/17: Paul Leventis: Re: PROM size for spartan
                        58212: 03/07/17: Hal Murray: Re: PROM size for spartan
58124: 03/07/15: Ken: What are the maximum filter specs you've seen?
58128: 03/07/15: Michael Nicklas: what are libraries for??
    58139: 03/07/15: Mike Treseler: Re: what are libraries for??
        58162: 03/07/16: Thomas Stanka: Re: what are libraries for??
            58188: 03/07/16: Mike Treseler: Re: what are libraries for??
58132: 03/07/15: Jon Masters: Virtex II Pro Exceptions
    58144: 03/07/15: Robert McGee: Re: Virtex II Pro Exceptions
        58168: 03/07/16: Jon Masters: Re: Virtex II Pro Exceptions
58133: 03/07/15: Stevenson: Re: mac & phy interface
58147: 03/07/15: Klemen: mac & phy interface
58148: 03/07/15: Brad Smallridge: I/Os with Cypress chip
    58166: 03/07/16: Charles M. Elias: Re: I/Os with Cypress chip
        58177: 03/07/16: Brad Smallridge: Re: I/Os with Cypress chip
            58257: 03/07/18: Charles M. Elias: Re: I/Os with Cypress chip
58150: 03/07/16: John Williams: JTAG and Xilinx
    58151: 03/07/16: John Williams: Re: JTAG and Xilinx
        58160: 03/07/16: Kasper Pedersen: Re: JTAG and Xilinx
        58186: 03/07/16: Neil Glenn Jacobson: Re: JTAG and Xilinx
58159: 03/07/16: <email_address@message.end>: Xilinx XST - how to create an EDIF?
    58205: 03/07/16: Brian Davis: Re: Xilinx XST - how to create an EDIF?
    58278: 03/07/18: Brannon King: Re: Xilinx XST - how to create an EDIF?
58167: 03/07/16: Isaac: How to edit encrypted NGC file produced using XILINX ISE 5
    58175: 03/07/16: Shalin Sheth: Re: How to edit encrypted NGC file produced using XILINX ISE 5
58169: 03/07/16: rob d: vertex2 pci pinout
    58185: 03/07/16: Antti Lukats: Re: vertex2 pci pinout
    58192: 03/07/17: John Williams: Re: vertex2 pci pinout
        58197: 03/07/16: Eric Crabill: Re: vertex2 pci pinout
            58223: 03/07/17: Antti Lukats: Re: vertex2 pci pinout
58176: 03/07/16: Peter Mash: Xilinx ECS Schematic Entry
    58178: 03/07/16: Peter Mash: Re: Xilinx ECS Schematic Entry
    58179: 03/07/16: carmen lee: Re: Xilinx ECS Schematic Entry
        58194: 03/07/16: Dave Blevins: Re: Xilinx ECS Schematic Entry
            58210: 03/07/17: Peter Mash: Re: Xilinx ECS Schematic Entry
                58214: 03/07/17: leon qin: Re: Xilinx ECS Schematic Entry
                    58216: 03/07/17: Uwe Bonnes: Re: Xilinx ECS Schematic Entry
58181: 03/07/16: lrl: Digital Root circuit using tree of 4-bit CLA's with Cout fed into Cin
    58198: 03/07/17: Glen Herrmannsfeldt: Re: Digital Root circuit using tree of 4-bit CLA's with Cout fed into Cin
58195: 03/07/16: Jim Flanagan: Altera ByteBlaster Standalone Programming Utility
    58247: 03/07/17: algous: Re: Altera ByteBlaster Standalone Programming Utility
        58255: 03/07/18: Martin Schoeberl: Re: Altera ByteBlaster Standalone Programming Utility
    58266: 03/07/18: Alan Nishioka: Re: Altera ByteBlaster Standalone Programming Utility
        58354: 03/07/21: Greg Steinke: Re: Altera ByteBlaster Standalone Programming Utility
58201: 03/07/17: louis lin: Xilinx xappp348: SPI Master
58209: 03/07/16: Henning Bahr: Digital Design with just one clock at one edge
    58217: 03/07/17: Mario Trams: Re: Digital Design with just one clock at one edge
    58228: 03/07/17: Dan RADUT: Re: Digital Design with just one clock at one edge
        58231: 03/07/17: Peter Alfke: Re: Digital Design with just one clock at one edge
            58234: 03/07/17: Mike Treseler: Re: Digital Design with just one clock at one edge
    58287: 03/07/19: S. Ramirez: Re: Digital Design with just one clock at one edge
58220: 03/07/17: Peter Sander: Using Quartus II 3.0 w/ self-made byteblaster cable
    58241: 03/07/17: Subroto Datta: Re: Using Quartus II 3.0 w/ self-made byteblaster cable
58221: 03/07/17: Isaac: Problem Xilinx edif2ngd
    58277: 03/07/18: Brannon King: Re: Problem Xilinx edif2ngd
58224: 03/07/17: Nagaraj: Direct Digital Converter
58227: 03/07/17: Chris Harwood: PCI - disabling
    58229: 03/07/17: Mario Trams: Re: PCI - disabling
    58230: 03/07/17: Willem Oosthuizen: Re: PCI - disabling
        58232: 03/07/17: Mario Trams: Re: PCI - disabling
    58239: 03/07/17: Eric Crabill: Re: PCI - disabling
        58240: 03/07/17: Eric Crabill: Re: PCI - disabling
    58305: 03/07/19: TC: Re: PCI - disabling
58233: 03/07/17: Valeria Dal Monte: state machine generator
    58236: 03/07/17: John_H: Re: state machine generator
    58237: 03/07/17: Yttrium: Re: state machine generator
58242: 03/07/17: Marloboro: How fast coregen FIR?
    58259: 03/07/18: ludovic aubel: Re: How fast coregen FIR?
    58272: 03/07/18: marlboro: Re: How fast coregen FIR?
        58282: 03/07/18: Ray Andraka: Re: How fast coregen FIR?
58244: 03/07/17: Re Pas: Novice question...FPGA driver type
58245: 03/07/17: Viral Parikh: EDK - - -XMD: Can't establish connection with Stub
    58246: 03/07/18: John Williams: Re: EDK - - -XMD: Can't establish connection with Stub
58251: 03/07/18: louis lin: processing `ifdef in Xilinx ISE 5.2i
    58267: 03/07/18: Larry Doolittle: Re: processing `ifdef in Xilinx ISE 5.2i
        58324: 03/07/21: louis lin: Re: processing `ifdef in Xilinx ISE 5.2i
            58334: 03/07/21: Uwe Bonnes: Re: processing `ifdef in Xilinx ISE 5.2i
            58413: 03/07/23: n2684172: Re: processing `ifdef in Xilinx ISE 5.2i
58252: 03/07/18: bijesh v.m.: External crystal oscillator for Spartan IIE
    58253: 03/07/18: Leon Heller: Re: External crystal oscillator for Spartan IIE
    58254: 03/07/18: Hal Murray: Re: External crystal oscillator for Spartan IIE
        58331: 03/07/20: bijesh v.m.: Re: External crystal oscillator for Spartan IIE
58258: 03/07/18: Willem Oosthuizen: Level translators on PCI
    58269: 03/07/18: Austin Lesea: Re: Level translators on PCI
    58304: 03/07/19: TC: Re: Level translators on PCI
58261: 03/07/18: Isaac: Timming Specification Error
58264: 03/07/18: Michael Nicklas: Logiblox library
58265: 03/07/18: MACEI'S: bit to rbt conversion
    58268: 03/07/18: John_H: Re: bit to rbt conversion
    58271: 03/07/18: Philip Freidin: Re: bit to rbt conversion
    58273: 03/07/18: rickman: Re: bit to rbt conversion
58275: 03/07/18: James: Block Ram Preloading Data
58276: 03/07/18: James: Initialize Block RAM
    58290: 03/07/19: Martin Euredjian: Re: Initialize Block RAM
        58301: 03/07/20: David R Brooks: Re: Initialize Block RAM
58279: 03/07/18: jedes: Multi device Altera configuration problem
58280: 03/07/18: marlboro: 4.2i sp3 map error xc2v3000-ff1152
58283: 03/07/18: Symon: Synplify syn_direct_enable doesn't work for me.
    58284: 03/07/18: Barry Brown: Re: Synplify syn_direct_enable doesn't work for me.
    58298: 03/07/19: Andrew Dauman: Re: Synplify syn_direct_enable doesn't work for me.
    58407: 03/07/22: Jim Robinson: Re: Synplify syn_direct_enable doesn't work for me.
        58438: 03/07/23: Symon: Re: Synplify syn_direct_enable doesn't work for me.
            58497: 03/07/24: Jim Robinson: Re: Synplify syn_direct_enable doesn't work for me.
                58538: 03/07/25: Symon: Re: Synplify syn_direct_enable doesn't work for me.
58286: 03/07/18: rickman: How to add VHDL library in Webpack 5.2i?
    58291: 03/07/19: rickman: Re: How to add VHDL library in Webpack 5.2i?
58289: 03/07/19: Srisurya Konduri: CPLD Interface to PC's requirements
    58295: 03/07/19: Antti Lukats: Re: CPLD Interface to PC's requirements
        58299: 03/07/19: Srisurya Konduri: Re: CPLD Interface to PC's requirements
            58313: 03/07/20: Philip Freidin: Re: CPLD Interface to PC's requirements
58292: 03/07/19: Jay: Phase / frequency detector types
    58303: 03/07/19: Peter Alfke: Re: Phase / frequency detector types
        58316: 03/07/20: Symon: Re: Phase / frequency detector types
        58321: 03/07/21: Jim Granville: Re: Phase / frequency detector types
            58346: 03/07/21: Peter Alfke: Re: Phase / frequency detector types
                58358: 03/07/21: Symon: Re: Phase / frequency detector types
                    58366: 03/07/21: Jerry Avins: Re: Phase / frequency detector types
                        58392: 03/07/22: Symon: Re: Phase / frequency detector types
                            58395: 03/07/22: Peter Alfke: Re: Phase / frequency detector types
58293: 03/07/19: jedes: Multi device ALTERA chain configuration problem!
58296: 03/07/19: Bob: using block rams in FPGAs
    58297: 03/07/19: Antti Lukats: Re: using block rams in FPGAs
    58302: 03/07/19: Mike Treseler: Re: using block rams in FPGAs
    58664: 03/07/30: Andras Tantos: Re: using block rams in FPGAs
58300: 03/07/19: srini: looking for SystemC cores
58306: 03/07/20: Patrick Liu: With regard of FPGA Express v3.7
58307: 03/07/20: Jimmy Zhang: CRC questions
    58310: 03/07/20: Kevin Neilson: Re: CRC questions
        58315: 03/07/20: Avrum: Re: CRC questions
            58323: 03/07/21: Glen Herrmannsfeldt: Re: CRC questions
                58326: 03/07/21: Jimmy Zhang: Re: CRC questions
                    58330: 03/07/21: Glen Herrmannsfeldt: Re: CRC questions
                58327: 03/07/20: rickman: Re: CRC questions
                    58357: 03/07/21: Ewerson Carvalho: Re: CRC questions
                58568: 03/07/27: Hal Murray: Re: CRC questions
                    58579: 03/07/27: Glen Herrmannsfeldt: Re: CRC questions
                        58597: 03/07/28: Marc Randolph: Re: CRC questions
                            58604: 03/07/28: Glen Herrmannsfeldt: Re: CRC questions
            58437: 03/07/23: Alex: Re: CRC questions
                58443: 03/07/23: rickman: Re: CRC questions
58308: 03/07/19: Jacques athow: XILINX frequency meter from XCELL design question.
    58311: 03/07/20: Kasper Pedersen: Re: XILINX frequency meter from XCELL design question.
        58329: 03/07/20: Jacques athow: Re: XILINX frequency meter from XCELL design question.
58309: 03/07/19: PanJuHwa: Readback of RC100
58317: 03/07/20: Greg Nichols: Instantiating pins on Virtex-II Pro
    58319: 03/07/20: Greg Nichols: Re: Instantiating pins on Virtex-II Pro
        58322: 03/07/21: Martin Euredjian: Re: Instantiating pins on Virtex-II Pro
            58325: 03/07/20: Vikram Pasham: Re: Instantiating pins on Virtex-II Pro
                58405: 03/07/22: Martin Euredjian: Re: Instantiating pins on Virtex-II Pro
    58328: 03/07/20: Greg Nichols: Re: Instantiating pins on Virtex-II Pro
58332: 03/07/21: John Williams: Xilinx GCLK voltages
    58339: 03/07/21: Avrum: Re: Xilinx GCLK voltages
        58360: 03/07/22: John Williams: Re: Xilinx GCLK voltages
            58372: 03/07/21: Avrum: Re: Xilinx GCLK voltages
                58377: 03/07/22: John Williams: Re: Xilinx GCLK voltages
58333: 03/07/21: bijesh v.m.: Is QuickSwitch devices a good method to interface fpga 3.3v(spartan IIE) and 5v logic divices?
    58341: 03/07/21: rickman: Re: Is QuickSwitch devices a good method to interface fpga 3.3v(spartan
        58375: 03/07/21: bijesh v.m.: Re: Is QuickSwitch devices a good method to interface fpga 3.3v(spartan IIE) and 5v logic divices?
            58378: 03/07/22: Markus Sponsel: Re: Is QuickSwitch devices a good method to interface fpga 3.3v(spartan IIE) and 5v logic divices?
            58417: 03/07/22: bijesh v.m.: Re: Is QuickSwitch devices a good method to interface fpga 3.3v(spartan IIE) and 5v logic divices?
58335: 03/07/21: zhaoke: synplify pro
    58343: 03/07/21: Barry Brown: Re: synplify pro
    58345: 03/07/21: Ken McElvain: Re: synplify pro
    58349: 03/07/21: Andrew Paule: Re: synplify pro
58336: 03/07/21: Isaac: Clock DLL error
58337: 03/07/21: Michael Nicklas: Logiblox library - help please!
    58348: 03/07/21: Steve Casselman: Re: Logiblox library - help please!
58340: 03/07/21: Marlboro: virtex2 map error?
    58350: 03/07/21: Andrew Paule: Re: virtex2 map error?
58344: 03/07/21: =?iso-8859-15?Q?Manfred_M=FCcke?=: Q: Quartus II Schematic Editor Limitations
58351: 03/07/21: paraag: help needed..... ERROR:MapLib:30 - Bad format for LOC constraint AB12 on rx.
    58381: 03/07/22: Martin Kellermann: Re: help needed..... ERROR:MapLib:30 - Bad format for LOC constraint AB12 on rx.
58355: 03/07/21: Barry Brown: asynchronous FIFO
    58356: 03/07/21: Peter Alfke: Re: asynchronous FIFO
        58359: 03/07/21: Barry Brown: Re: asynchronous FIFO
            58362: 03/07/21: Kevin Neilson: Re: asynchronous FIFO
            58368: 03/07/21: Peter Alfke: Re: asynchronous FIFO
                58376: 03/07/22: Glen Herrmannsfeldt: Re: asynchronous FIFO
                    58389: 03/07/22: Peter Alfke: Re: asynchronous FIFO
                        58412: 03/07/23: Allan Herriman: Re: asynchronous FIFO
                            58433: 03/07/23: Peter Alfke: Re: asynchronous FIFO
                                58458: 03/07/24: Allan Herriman: Re: asynchronous FIFO
                58393: 03/07/22: Kevin Neilson: Re: asynchronous FIFO
                    58396: 03/07/22: Peter Alfke: Re: asynchronous FIFO
                        58415: 03/07/23: Andrew Paule: Re: asynchronous FIFO
                            58434: 03/07/23: Peter Alfke: Re: asynchronous FIFO
            58373: 03/07/22: Martin Euredjian: Re: asynchronous FIFO
            58411: 03/07/22: Ray Andraka: Re: asynchronous FIFO
            58440: 03/07/23: Michael S: Re: asynchronous FIFO
    58365: 03/07/21: Andrew Paule: Re: asynchronous FIFO
        58379: 03/07/22: rob d: Re: asynchronous FIFO
    58416: 03/07/23: Ronald Hecht: Re: asynchronous FIFO
    58436: 03/07/23: John_H: Re: asynchronous FIFO
        58439: 03/07/23: Peter Alfke: Re: asynchronous FIFO
    58599: 03/07/28: Wade: Re: asynchronous FIFO
58363: 03/07/21: Kuan Zhou: Distributed RAM
    58367: 03/07/21: Peter Alfke: Re: Distributed RAM
        58370: 03/07/21: Kuan Zhou: Re: Distributed RAM
            58391: 03/07/22: Peter Alfke: Re: Distributed RAM
58364: 03/07/21: Alex: Leonardo spectrum synthesis result
    58374: 03/07/21: Mike Treseler: Re: Leonardo spectrum synthesis result
58380: 03/07/22: Ken: (repost) What are the maximum filter specs you've seen?
58383: 03/07/22: Isaac: FPGA Editor
    58394: 03/07/22: Philip Freidin: Re: FPGA Editor
        58399: 03/07/22: rickman: Re: FPGA Editor
            58403: 03/07/22: John_H: Re: FPGA Editor
                58404: 03/07/22: Martin Euredjian: Re: FPGA Editor
                    58406: 03/07/22: Martin Euredjian: Re: FPGA Editor
                        58441: 03/07/23: rickman: Re: FPGA Editor
                            58444: 03/07/23: Martin Euredjian: Re: FPGA Editor
                                58454: 03/07/23: rickman: Re: FPGA Editor
                                    58461: 03/07/24: Martin Euredjian: Re: FPGA Editor
                    58410: 03/07/22: Ray Andraka: Re: FPGA Editor
                        58424: 03/07/23: Martin Euredjian: Re: FPGA Editor
                            58435: 03/07/23: Philip Freidin: Re: FPGA Editor
                            58446: 03/07/23: Ray Andraka: Re: FPGA Editor
                                58462: 03/07/24: Martin Euredjian: Re: FPGA Editor
                    58474: 03/07/24: Eric Pearson: Re: FPGA Editor
                        58480: 03/07/24: rickman: Re: FPGA Editor
                            58483: 03/07/25: Allan Herriman: Re: FPGA Editor
                                58504: 03/07/24: Ray Andraka: Re: FPGA Editor
                            58485: 03/07/24: Martin Euredjian: Re: FPGA Editor
                                58486: 03/07/24: Mike Treseler: Re: FPGA Editor
                                    58491: 03/07/24: Martin Euredjian: Re: FPGA Editor
                                        58493: 03/07/24: Martin Euredjian: Re: FPGA Editor
                                            58506: 03/07/24: Ray Andraka: Re: FPGA Editor
                                                58517: 03/07/25: Martin Euredjian: Re: FPGA Editor
                                58505: 03/07/24: Ray Andraka: Re: FPGA Editor
                                58577: 03/07/27: Philip Freidin: Re: FPGA Editor
                                    58578: 03/07/27: Martin Euredjian: Re: FPGA Editor
                                        58581: 03/07/27: Philip Freidin: Re: FPGA Editor
                    58479: 03/07/24: Mike Treseler: Re: FPGA Editor
                    58569: 03/07/27: Hal Murray: Re: FPGA Editor
                        58570: 03/07/27: Martin Euredjian: Re: FPGA Editor
            58409: 03/07/22: Ray Andraka: Re: FPGA Editor
58384: 03/07/22: Erik Spaenig: Xilinx WebPack support "dual edge clock" ??
    58385: 03/07/22: Uwe Bonnes: Re: Xilinx WebPack support "dual edge clock" ??
        58387: 03/07/22: Erik Spaenig: Re: Xilinx WebPack support "dual edge clock" ??
            58388: 03/07/22: John_H: Re: Xilinx WebPack support "dual edge clock" ??
                58390: 03/07/22: Erik Spaenig: Re: Xilinx WebPack support "dual edge clock" ??
58397: 03/07/22: spring: Internal Error again in Quartus II 3.0
    58408: 03/07/22: Paul Leventis: Re: Internal Error again in Quartus II 3.0
58400: 03/07/22: Ivan: Clock rate increase for FEC aplications
    58402: 03/07/22: Kevin Neilson: Re: Clock rate increase for FEC aplications
        58427: 03/07/23: Ivan: Re: Clock rate increase for FEC aplications
58401: 03/07/22: Shaw: How to deal with the interfacing problem
58414: 03/07/23: John Williams: iMPACT batch mode
    58421: 03/07/23: Aurelian Lazarut: Re: iMPACT batch mode
        58445: 03/07/24: John Williams: Re: iMPACT batch mode
58418: 03/07/23: rickman: Using Quartus with VHDL
    58420: 03/07/23: Allan Herriman: Re: Using Quartus with VHDL
        58442: 03/07/23: rickman: Re: Using Quartus with VHDL
58419: 03/07/23: Atif: inputs and outputs for clb in ISE5
    58432: 03/07/23: Avrum: Re: inputs and outputs for clb in ISE5
        58466: 03/07/23: Atif: Re: inputs and outputs for clb in ISE5
58422: 03/07/23: Jon Masters: Insight Reference Board Problems
    58429: 03/07/23: Jon Masters: Spurious Machine Check Exceptions [WAS: Re: Insight Reference Board
        58430: 03/07/23: Jon Masters: Re: Spurious Machine Check Exceptions [WAS: Re: Insight Reference
            58661: 03/07/30: Peter Ryser: Re: Spurious Machine Check Exceptions [WAS: Re: Insight ReferenceBoard
58423: 03/07/23: Martin Euredjian: Floorplanner "features"
    58425: 03/07/23: Uwe Bonnes: Re: Floorplanner "features"
        58426: 03/07/23: Martin Euredjian: Re: Floorplanner "features"
58428: 03/07/23: Yevgeny K.: Altera Nios 3: Using Interface To User Logic Problem
    58540: 03/07/25: Jesse Kempa: Re: Altera Nios 3: Using Interface To User Logic Problem
        58787: 03/08/01: Yevgeny K.: Re: Altera Nios 3: Using Interface To User Logic Problem
            58913: 03/08/04: Yevgeny K.: Re: Altera Nios 3: Using Interface To User Logic Problem
58431: 03/07/23: Erik Spaenig: Generate .mcs file
58447: 03/07/23: MS: Pricing question....
    58449: 03/07/23: Peter Alfke: Re: Pricing question....
        58459: 03/07/23: Stifler: Re: Pricing question....
            58467: 03/07/24: John Williams: Re: Pricing question....
                58471: 03/07/24: Austin Lesea: Re: Pricing question....
            58478: 03/07/24: Peter Alfke: Re: Pricing question....
                58484: 03/07/24: Andrew Paule: Re: Pricing question....
            58482: 03/07/24: Mike Treseler: Re: Pricing question....
            58487: 03/07/24: Peter C. Wallace: Re: Pricing question....
            58502: 03/07/24: Rudolf Usselmann: Re: Pricing question....
                58520: 03/07/25: Martin Euredjian: Re: Pricing question....
                    58542: 03/07/25: Symon: Re: Pricing question....
        58721: 03/07/31: Kolja Sulimma: Re: Pricing question....
            58748: 03/07/31: rickman: Re: Pricing question....
                58766: 03/08/01: Kolja Sulimma: Re: Pricing question....
                    58784: 03/08/01: rickman: Re: Pricing question....
            58771: 03/08/01: Rob Judd: Re: Pricing question....
                58862: 03/08/03: Alex Gibson: Re: Pricing question....
            58876: 03/08/03: Lorenzo Lutti: Re: Pricing question....
                58884: 03/08/04: rickman: Re: Pricing question....
    58469: 03/07/24: Tim Hogard: Re: Pricing question....
        58494: 03/07/25: Jim Granville: Re: Pricing question....
    58543: 03/07/25: Neeraj Varma: Re: Pricing question....
        58617: 03/07/29: MS: Re: Pricing question....
            58644: 03/07/29: john jakson: Re: Pricing question....
                58687: 03/07/30: Paul Leventis: Re: Pricing question....
                    58703: 03/07/31: Emile: Re: Pricing question....
58456: 03/07/24: Basuki Endah Priyanto: Active Probe
    58457: 03/07/23: Peter Wallace: Re: Active Probe
    58463: 03/07/24: Martin Euredjian: Re: Active Probe
    58492: 03/07/24: Andy Peters: Re: Active Probe
        58500: 03/07/24: Peter Alfke: Re: Active Probe
            58501: 03/07/24: Peter C. Wallace: Re: Active Probe
                58545: 03/07/25: Symon: Re: Active Probe
58465: 03/07/24: Martin Euredjian: Multi Pass Place & Route
    58470: 03/07/24: Vikram Pasham: Re: Multi Pass Place & Route
        58523: 03/07/25: Martin Euredjian: Re: Multi Pass Place & Route
            58549: 03/07/25: Steve Lass: Re: Multi Pass Place & Route
                58555: 03/07/26: Martin Euredjian: Re: Multi Pass Place & Route
58468: 03/07/24: E. Backhus: XST fails to recognize FSM with registered outputs
    58475: 03/07/24: Sergei Storojev: Re: XST fails to recognize FSM with registered outputs
        58522: 03/07/25: Alain: Re: XST fails to recognize FSM with registered outputs
    58477: 03/07/24: Mike Treseler: Re: XST fails to recognize FSM with registered outputs
58473: 03/07/24: Theron Hicks: Where do I find model sim xe starter download?
    58476: 03/07/24: Yttrium: Re: Where do I find model sim xe starter download?
58481: 03/07/24: ..:: Gabster ::..: Buying Xilinx Platform Flash PROM
58488: 03/07/24: Chris Carlen: Should I use ABEL?
    58489: 03/07/24: Andrew Paule: Re: Should I use ABEL?
        58559: 03/07/26: Alex Gibson: Re: Should I use ABEL?
    58490: 03/07/24: Mike Treseler: Re: Should I use ABEL?
        58526: 03/07/25: Mike Harrison: Re: Should I use ABEL?
        58537: 03/07/25: Dennis McCrohan: Re: Should I use ABEL?
            58546: 03/07/25: Chris Carlen: Re: Should I use ABEL?
    58525: 03/07/25: Bertram Geiger: Re: Should I use ABEL?
    58527: 03/07/25: Maciek: Re: Should I use ABEL?
    58560: 03/07/26: Alex Gibson: Re: Should I use ABEL?
58498: 03/07/24: Masoud Naderi: temux
    58512: 03/07/24: Andrew Paule: Re: temux
        58548: 03/07/25: Masoud Naderi: Re: temux
    58533: 03/07/25: Patrick MacGregor: Re: temux
        58550: 03/07/25: Masoud Naderi: Re: temux
            58554: 03/07/25: Patrick MacGregor: Re: temux
                58563: 03/07/26: Masoud Naderi: Re: temux
58499: 03/07/24: rickman: VHDL predefined constants
    58530: 03/07/25: Allan Herriman: Re: VHDL predefined constants
        58796: 03/08/01: Colin Paul Gloster: Re: VHDL predefined constants
58503: 03/07/24: paraag: heel needed--Bad format for LOC constraint B8 on leds<6>. To bypass this
58507: 03/07/25: Triax: Xilinx Design Manager - Connecting 2 Latches
58513: 03/07/25: ..:: Gabster ::..: Reseting the whole thing
    58514: 03/07/25: Andrew Paule: Re: Reseting the whole thing
    58516: 03/07/25: John Williams: Re: Reseting the whole thing
    58518: 03/07/25: Martin Euredjian: Re: Reseting the whole thing
        58519: 03/07/25: Andrew Paule: Re: Reseting the whole thing
            58521: 03/07/25: Martin Euredjian: Re: Reseting the whole thing
                58539: 03/07/25: Peter Alfke: Re: Reseting the whole thing
                    58653: 03/07/30: louis lin: Re: Reseting the whole thing
                        58672: 03/07/30: rickman: Re: Reseting the whole thing
                            58706: 03/07/31: louis lin: Re: Reseting the whole thing
                                58763: 03/08/01: louis lin: Re: Reseting the whole thing
                58541: 03/07/25: Symon: Re: Reseting the whole thing
        58544: 03/07/25: ..:: Gabster ::..: Re: Reseting the whole thing
58524: 03/07/25: Jack Stone: Relative placement constraints in VHDL for Virtex multipliers
    58547: 03/07/25: Symon: Re: Relative placement constraints in VHDL for Virtex multipliers
58528: 03/07/25: Saeed Nari: GL85 synthesizable code
    58585: 03/07/27: dasari: Re: GL85 synthesizable code
    58590: 03/07/28: Antti Lukats: Re: GL85 synthesizable code
        59162: 03/08/11: Saeed Nari: Re: GL85 synthesizable code
            59201: 03/08/12: Antti Lukats: Re: GL85 synthesizable code
58529: 03/07/25: Egads: XAPP058 SVF2XSVF converter problems
    58534: 03/07/25: Chen Wei Tseng: Re: XAPP058 SVF2XSVF converter problems
58531: 03/07/25: Maciek: Quartus and memory initialization
    58532: 03/07/25: Maciek: Re: Quartus and memory initialization
58558: 03/07/26: Jay: Simple circuit / good design?
    58565: 03/07/26: Paul Leventis: Re: Simple circuit / good design?
    58566: 03/07/26: Jim Wu: Re: Simple circuit / good design?
    58665: 03/07/30: Nial Stewart: Re: Simple circuit / good design?
58561: 03/07/26: Andy: Virtex II boards with PCI 66MHz support.
58562: 03/07/26: LIJO: Multi Cycle path and False paths
    58564: 03/07/26: Subroto Datta: Re: Multi Cycle path and False paths
        58567: 03/07/26: Ray Cheung: Re: Multi Cycle path and False paths
            58684: 03/07/30: Glen Herrmannsfeldt: Re: Multi Cycle path and False paths
        58641: 03/07/30: hrwieuyriwru: Re: Multi Cycle path and False paths
            58675: 03/07/30: Prasanna: Re: Multi Cycle path and False paths
                58707: 03/07/31: rickman: Re: Multi Cycle path and False paths
                    58733: 03/07/31: Prasanna: Re: Multi Cycle path and False paths
                    58758: 03/08/01: Glen Herrmannsfeldt: Re: Multi Cycle path and False paths
                        58782: 03/08/01: rickman: Re: Multi Cycle path and False paths
                            58789: 03/08/01: Nicholas C. Weaver: Re: Multi Cycle path and False paths
                                58826: 03/08/02: rickman: Re: Multi Cycle path and False paths
                                    58833: 03/08/02: Jeff Cunningham: Re: Multi Cycle path and False paths
                                        58839: 03/08/02: Nicholas C. Weaver: Re: Multi Cycle path and False paths
58571: 03/07/27: Jon Masters: VHDL Book Recommendations Please
    58572: 03/07/27: Paul Leventis: Re: VHDL Book Recommendations Please
        58574: 03/07/27: Jon Masters: Re: VHDL Book Recommendations Please
            58610: 03/07/29: Paul Leventis: Re: VHDL Book Recommendations Please
                58630: 03/07/29: Jon Masters: Re: VHDL Book Recommendations Please
                    58749: 03/08/01: Paul Leventis: Re: VHDL Book Recommendations Please
                        58756: 03/08/01: kryten_droid: Re: VHDL Book Recommendations Please
                            58843: 03/08/02: Jon Masters: Re: VHDL Book Recommendations Please
                                58851: 03/08/02: rickman: Re: VHDL Book Recommendations Please
    58580: 03/07/27: john jakson: Re: VHDL Book Recommendations Please
    58595: 03/07/28: Pete Fraser: Re: VHDL Book Recommendations Please
    58612: 03/07/29: rickman: Re: VHDL Book Recommendations Please
        58615: 03/07/29: Jonathan Bromley: Re: VHDL Book Recommendations Please
            58619: 03/07/29: Mike Treseler: Re: VHDL Book Recommendations Please
            58628: 03/07/29: Lorenzo Lutti: Re: VHDL Book Recommendations Please
                58652: 03/07/30: Jonathan Bromley: Re: VHDL Book Recommendations Please
                    58670: 03/07/30: rickman: Re: VHDL Book Recommendations Please
                        58699: 03/07/31: Martin Thompson: Re: VHDL Book Recommendations Please
                    58710: 03/07/31: Jon Masters: Re: VHDL Book Recommendations Please
        58623: 03/07/29: Eric Crabill: Re: VHDL Book Recommendations Please
58573: 03/07/27: lenz: FPGA research
    58586: 03/07/27: Masoud Naderi: Re: FPGA research
        58594: 03/07/28: lenz: Re: FPGA research
            58620: 03/07/29: Steve Casselman: Re: FPGA research
                58622: 03/07/29: Austin Lesea: Re: FPGA research
58575: 03/07/27: Valentin Tihomirov: Any libraries (c++, java, etc) for netlist manipulations?
58588: 03/07/28: Antti Lukats: ZX Spectrum on V2Pro/ML300
58589: 03/07/28: Ho0gA: dataio 3900 system disk
58591: 03/07/28: Michael Petry: xilinx programing interface
    58593: 03/07/28: Amontec Team: Re: xilinx programing interface
        58598: 03/07/28: Antti Lukats: Re: xilinx programing interface
    58596: 03/07/28: Peter Alfke: Re: xilinx programing interface
        58606: 03/07/28: <email_address@message.end>: Re: xilinx programing interface
    58607: 03/07/28: <email_address@message.end>: Re: xilinx programing interface
    58627: 03/07/29: Lorenzo Lutti: Re: xilinx programing interface
58600: 03/07/28: Sriram: Partial Reconfiguration support for Spartan 2 or Spartan 2E devices
58601: 03/07/28: Seth: Altera Stratix PCI board and Linux... Anyone try this?
58602: 03/07/28: paraag: help neede-----Error Pack 1107 -Unable to combine the following .........
    58603: 03/07/28: Avrum: Re: help neede-----Error Pack 1107 -Unable to combine the following .........
        58608: 03/07/28: Marc Guardiani: Re: help neede-----Error Pack 1107 -Unable to combine the following
58605: 03/07/28: Roel: Replacing Spartan 300E by 600E
    58611: 03/07/28: Andrew Paule: Re: Replacing Spartan 300E by 600E
58609: 03/07/28: Gaby Jay: Spartan IIE max pin switching
    58613: 03/07/28: Rudolf Usselmann: Re: Spartan IIE max pin switching
        58616: 03/07/29: Antti Lukats: Re: Spartan IIE max pin switching
            58618: 03/07/29: Austin Lesea: Re: Spartan IIE max pin switching
                58626: 03/07/30: John Williams: Re: Spartan IIE max pin switching
                    58629: 03/07/29: Austin Lesea: Re: Spartan IIE max pin switching
                        58634: 03/07/30: John Williams: Re: Spartan IIE max pin switching
                            58658: 03/07/30: Austin Lesea: Re: Spartan IIE max pin switching
                                58683: 03/07/30: Eric Smith: Mentor Hyperlynx IBIS simulator (was Re: Spartan IIE max pin switching)
                                    58686: 03/07/30: Austin Lesea: Re: Mentor Hyperlynx IBIS simulator (was Re: Spartan IIE max pin
                                        58692: 03/07/30: Eric Smith: Re: Mentor Hyperlynx IBIS simulator (was Re: Spartan IIE max pin switching)
                                    58732: 03/07/31: Andy Peters: Re: Mentor Hyperlynx IBIS simulator (was Re: Spartan IIE max pin switching)
                                        58735: 03/07/31: Austin Lesea: Re: Mentor Hyperlynx IBIS simulator (was Re: Spartan IIE max pin
                                        58811: 03/08/01: Eric Smith: Re: Mentor Hyperlynx IBIS simulator (was Re: Spartan IIE max pin switching)
58614: 03/07/28: prasad: how to design hardware for 2's complement parallel multiplier(at gate level)
    58633: 03/07/29: Ray Andraka: Re: how to design hardware for 2's complement parallel multiplier(at
58624: 03/07/29: SDL: SRAM question in Cyclone Dev. Board
    58671: 03/07/30: Jesse Kempa: Re: SRAM question in Cyclone Dev. Board
58625: 03/07/29: Lorenzo Dal Bello: Partial Reconfiguration on Xilinx FPGA
    59578: 03/08/22: Eduardo Wenzel Brião: Re: Partial Reconfiguration on Xilinx FPGA
58631: 03/07/29: Jon Masters: Handel C
    58632: 03/07/30: John Williams: Re: Handel C
        58709: 03/07/31: Nial Stewart: Re: Handel C
            58746: 03/07/31: Tom Seim: Re: Handel C
                58768: 03/08/01: Nial Stewart: Re: Handel C
                    58797: 03/08/01: Tom Seim: Re: Handel C
                        58875: 03/08/03: Nial Stewart: Re: Handel C
58635: 03/07/30: Glen Herrmannsfeldt: Re: binary to BCD assistance
    58637: 03/07/30: Glen Herrmannsfeldt: Re: binary to BCD assistance
        58639: 03/07/29: Jason Berringer: Re: binary to BCD assistance
            58690: 03/07/31: Glen Herrmannsfeldt: Re: binary to BCD assistance
                58718: 03/07/31: Mike Treseler: Re: binary to BCD assistance
            58744: 03/07/31: FE: Re: binary to BCD assistance
                58745: 03/07/31: Jason Berringer: Re: binary to BCD assistance
58636: 03/07/29: Ab Ran: DCM delays in the TRCE report.
    58640: 03/07/29: Avrum: Re: DCM delays in the TRCE report.
        58668: 03/07/30: Ab Ran: Re: DCM delays in the TRCE report.
            58669: 03/07/30: Avrum: Re: DCM delays in the TRCE report.
    58642: 03/07/29: Vikram Pasham: Re: DCM delays in the TRCE report.
58638: 03/07/29: Yash Bansal: Parallel Port EPP in FPGA
    58649: 03/07/30: Dirk Dörr: Re: Parallel Port EPP in FPGA
        58655: 03/07/30: Amontec Team: Re: Parallel Port EPP in FPGA
    58663: 03/07/30: Andras Tantos: Re: Parallel Port EPP in FPGA
        58674: 03/07/30: Yash Bansal: Re: Parallel Port EPP in FPGA
            58677: 03/07/30: Andras Tantos: Re: Parallel Port EPP in FPGA
            59006: 03/08/06: Peter Seng: Re: Parallel Port EPP in FPGA
    58731: 03/07/31: Jon Elson: Re: Parallel Port EPP in FPGA
        58736: 03/07/31: Yash Bansal: Re: Parallel Port EPP in FPGA
            58906: 03/08/04: EU: Re: Parallel Port EPP in FPGA
58643: 03/07/30: <vchen@uiuc.edu>: Simulation
    58648: 03/07/30: <vchen@uiuc.edu>: Re: Simulation
    58654: 03/07/30: Mario Trams: Re: Simulation
58650: 03/07/30: Tiberio Fanti: Searching for SONET/SDH verification libraries
58657: 03/07/30: Jonathan Bromley: Synthesisable fixed-point arithmetic package
    59338: 03/08/15: Jim Lewis: Re: Synthesisable fixed-point arithmetic package
58659: 03/07/30: Jean-Luc: apex20ke library and simulation
    58662: 03/07/30: Mike Treseler: Re: apex20ke library and simulation
    58695: 03/07/31: Subroto Datta: Re: apex20ke library and simulation
        58702: 03/07/31: Jean-Luc: Re: apex20ke library and simulation
            58728: 03/07/31: Mike Treseler: Re: apex20ke library and simulation
58660: 03/07/30: Jay: PLL / DPLL phase question
    58673: 03/07/30: Thad Smith: Re: PLL / DPLL phase question
        58691: 03/07/30: Thad Smith: Re: PLL / DPLL phase question
            58693: 03/07/30: Andrew Paule: Re: PLL / DPLL phase question
                58761: 03/08/01: Thad Smith: Re: PLL / DPLL phase question
                    58819: 03/08/01: Andrew Paule: Re: PLL / DPLL phase question
            58700: 03/07/31: Robert Scott: Re: PLL / DPLL phase question
                58705: 03/07/31: Andrew Paule: Re: PLL / DPLL phase question
                58716: 03/07/31: <se10110@yahoo.com>: Re: PLL / DPLL phase question
                    58788: 03/08/01: Thad Smith: Re: PLL / DPLL phase question
                58762: 03/08/01: Thad Smith: Re: PLL / DPLL phase question
                    58792: 03/08/01: Jay: Re: PLL / DPLL phase question
                        58818: 03/08/01: John_H: Re: PLL / DPLL phase question
                            58820: 03/08/01: Andrew Paule: Re: PLL / DPLL phase question
                            58825: 03/08/01: Peter Wallace: Re: PLL / DPLL phase question
                        58822: 03/08/01: Thad Smith: Re: PLL / DPLL phase question
                            58853: 03/08/02: Jay: Re: PLL / DPLL phase question
                    58793: 03/08/01: Peter Alfke: Re: PLL / DPLL phase question
58666: 03/07/30: Isaac: Downloading into XCV600
    58676: 03/07/30: Mike Treseler: Re: Downloading into XCV600
58667: 03/07/30: Lev Razamat: ALTERA Byte BlasterII
    58688: 03/07/30: Marc Guardiani: Re: ALTERA Byte BlasterII
    59421: 03/08/19: <anyone@anywhere.com>: Re: ALTERA Byte BlasterII <--Link Inside
58678: 03/07/30: Prashant: Altera-to-Xilinx IO
    58680: 03/07/30: Austin Lesea: Re: Altera-to-Xilinx IO 3.3V -> 1.8V
        58682: 03/07/30: Pete Fraser: Re: Altera-to-Xilinx IO 3.3V -> 1.8V
            58685: 03/07/30: Austin Lesea: Re: Altera-to-Xilinx IO 3.3V -> 1.8V
                58717: 03/07/31: Pete Fraser: Re: Altera-to-Xilinx IO 3.3V -> 1.8V
                    58723: 03/07/31: Austin Lesea: Level shifting using NMOS pass gate devices
                58722: 03/07/31: Prashant: Re: Altera-to-Xilinx IO 3.3V -> 1.8V
                    58725: 03/07/31: Peter Alfke: Re: Altera-to-Xilinx IO 3.3V -> 1.8V
58679: 03/07/30: Eric: tri-State buffer troubles ...
    58689: 03/07/30: Marc Guardiani: Re: tri-State buffer troubles ...
        58754: 03/07/31: Eric: Re: tri-State buffer troubles ...
58681: 03/07/30: Aman Gayasen: AREA_GROUP constraint for Xilinx FPGAs
    58755: 03/07/31: seyior: Re: AREA_GROUP constraint for Xilinx FPGAs
    58799: 03/08/01: Steve Lass: Re: AREA_GROUP constraint for Xilinx FPGAs
58694: 03/07/30: Jacques athow: DDS question. How to generate a square from a sine wave?
    58696: 03/07/30: Andrew Paule: Re: DDS question. How to generate a square from a sine wave?
    58698: 03/07/31: Hal Murray: Re: DDS question. How to generate a square from a sine wave?
        58711: 03/07/31: Jacques athow: Re: DDS question. How to generate a square from a sine wave?
            58715: 03/07/31: Austin Lesea: Re: DDS question. How to generate a square from a sine wave?
            58719: 03/07/31: nospam: Re: DDS question. How to generate a square from a sine wave?
                58727: 03/07/31: Peter Alfke: Re: DDS question. How to generate a square from a sine wave?
    58704: 03/07/31: Michael S: Re: DDS question. How to generate a square from a sine wave?
        58714: 03/07/31: Austin Lesea: Re: DDS question. How to generate a square from a sine wave?
    58720: 03/07/31: Peter Alfke: Re: DDS question. How to generate a square from a sine wave?
        58739: 03/07/31: nospam: Re: DDS question. How to generate a square from a sine wave?
            58742: 03/07/31: Peter Alfke: Re: DDS question. How to generate a square from a sine wave?
                58747: 03/08/01: nospam: Re: DDS question. How to generate a square from a sine wave?
                    58805: 03/08/01: Peter Alfke: Re: DDS question. How to generate a square from a sine wave?
                        58809: 03/08/01: nospam: Re: DDS question. How to generate a square from a sine wave?
        58816: 03/08/01: John_H: Re: DDS question. How to generate a square from a sine wave?
            58821: 03/08/01: Peter Alfke: Re: DDS question. How to generate a square from a sine wave?
    58730: 03/07/31: Jon Elson: Re: DDS question. How to generate a square from a sine wave?
        58734: 03/07/31: Peter Alfke: Re: DDS question. How to generate a square from a sine wave?
            58830: 03/08/02: Hal Murray: Re: DDS question. How to generate a square from a sine wave?
                58916: 03/08/04: Austin Lesea: Re: DDS question. How to generate a square from a sine wave?
58697: 03/07/31: Paul Leventis: Re: binary to BCD assistance
    58724: 03/07/31: Mike Treseler: Re: binary to BCD assistance
        58737: 03/07/31: Peter Alfke: Re: binary to BCD assistance
58701: 03/07/31: Isaac: Downloading into XCV600
58708: 03/07/31: emilia: Problem in Xilinx (Freq Counter) design
    58726: 03/07/31: Kevin Neilson: Re: Problem in Xilinx (Freq Counter) design
        58757: 03/07/31: emilia: Re: Problem in Xilinx (Freq Counter) design
            58783: 03/08/01: rickman: Re: Problem in Xilinx (Freq Counter) design
                58838: 03/08/02: Phil Hays: Re: Problem in Xilinx (Freq Counter) design
                    58848: 03/08/02: rickman: Re: Problem in Xilinx (Freq Counter) design
58712: 03/07/31: Erik Coenders: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
    58764: 03/08/01: Antti Lukats: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
    58849: 03/08/02: Hal Murray: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
        59009: 03/08/06: Erik Coenders: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
            59041: 03/08/07: Hal Murray: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
    58924: 03/08/04: Jesse Kempa: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
    58936: 03/08/04: Will: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
        58949: 03/08/05: Hal Murray: Re: Tiny TCP/IP stack and tiny MAC controller on FPGA for direct download to S(D)RAM memory
58713: 03/07/31: Nikos Annitsakis: Novice problem with Altera MaxPlusII and VHDL
    58729: 03/07/31: Mike Treseler: Re: Novice problem with Altera MaxPlusII and VHDL
58738: 03/07/31: <insight@highwayman.tv>: Spartan 3 Overshoot limit
    58743: 03/07/31: Austin Lesea: Re: Spartan 3 Overshoot limit
58740: 03/07/31: Seth: Question: String matching with CAM?
    58741: 03/07/31: Peter Alfke: Re: Question: String matching with CAM?
    58750: 03/07/31: Ray Andraka: Re: Question: String matching with CAM?
58751: 03/07/31: rickman: 5 volt tolerant Xilinx parts
    58759: 03/07/31: Paul Sereno: Re: 5 volt tolerant Xilinx parts
        58777: 03/08/01: rickman: Re: 5 volt tolerant Xilinx parts
    58776: 03/08/01: Marc Randolph: Re: 5 volt tolerant Xilinx parts
        58781: 03/08/01: rickman: Re: 5 volt tolerant Xilinx parts
            58882: 03/08/04: Neeraj Varma: Re: 5 volt tolerant Xilinx parts
                58898: 03/08/04: Jim Granville: Re: 5 volt tolerant Xilinx parts
                59828: 03/08/28: John Dimtsios: Re: 5 volt tolerant Xilinx parts
                    59869: 03/08/30: rickman: Re: 5 volt tolerant Xilinx parts
        58791: 03/08/01: M.Randelzhofer: Re: 5 volt tolerant Xilinx parts
    58778: 03/08/01: Austin Lesea: Re: 5 volt tolerant Xilinx parts
        58786: 03/08/01: rickman: Re: 5 volt tolerant Xilinx parts
            58801: 03/08/01: Austin Lesea: Re: 5 volt tolerant Xilinx parts
                58827: 03/08/02: rickman: Re: 5 volt tolerant Xilinx parts
                    58914: 03/08/04: Austin Lesea: Re: 5 volt tolerant Xilinx parts
                        58921: 03/08/04: rickman: Re: 5 volt tolerant Xilinx parts
        58836: 03/08/02: B. Joshua Rosen: Re: 5 volt tolerant Xilinx parts
            58840: 03/08/03: Rob Judd: Re: 5 volt tolerant Xilinx parts
            58915: 03/08/04: Austin Lesea: Re: 5 volt tolerant Xilinx parts
                58922: 03/08/04: rickman: Re: 5 volt tolerant Xilinx parts
                    58923: 03/08/04: Austin Lesea: Re: 5 volt tolerant Xilinx parts
                        58929: 03/08/04: Uwe Bonnes: Re: 5 volt tolerant Xilinx parts
                            58934: 03/08/04: Austin Lesea: Re: 5 volt tolerant Xilinx parts
                                58939: 03/08/04: Uwe Bonnes: Re: 5 volt tolerant Xilinx parts
                        58930: 03/08/04: B. Joshua Rosen: Re: 5 volt tolerant Xilinx parts
                            58935: 03/08/04: Austin Lesea: Re: 5 volt tolerant Xilinx parts
    58823: 03/08/02: Spam Hater: Re: 5 volt tolerant Xilinx parts
        58829: 03/08/02: rickman: Re: 5 volt tolerant Xilinx parts
            58837: 03/08/02: Spam Hater: Re: 5 volt tolerant Xilinx parts
    58834: 03/08/02: B. Joshua Rosen: Re: 5 volt tolerant Xilinx parts
58752: 03/07/31: rickman: Spartan 3 support in Webpack
    58765: 03/08/01: Antti Lukats: Re: Spartan 3 support in Webpack
    58767: 03/08/01: John Morgan: Re: Spartan 3 support in Webpack
    58798: 03/08/01: Steve Lass: Re: Spartan 3 support in Webpack
    59039: 03/08/07: Steven K. Knapp: Re: Spartan 3 support in Webpack
58753: 03/07/31: Chuck Benz: free tool (PERL script) for exploring gate netlists (ALTERA EQN format for now)
58760: 03/07/31: Serg_Y: reconfiguration VirtexE via JTAG (full or partial)
    58807: 03/08/01: Chen Wei Tseng: Re: reconfiguration VirtexE via JTAG (full or partial)
        58808: 03/08/01: Chen Wei Tseng: Re: reconfiguration VirtexE via JTAG (full or partial)
            58889: 03/08/03: Serg_Y: Re: reconfiguration VirtexE via JTAG (full or partial)
                58932: 03/08/04: Chen Wei Tseng: Re: reconfiguration VirtexE via JTAG (full or partial)
        58890: 03/08/03: Serg_Y: Re: reconfiguration VirtexE via JTAG (full or partial)
        58891: 03/08/03: Serg_Y: Re: reconfiguration VirtexE via JTAG (full or partial)
            58902: 03/08/04: Antti Lukats: Re: reconfiguration VirtexE via JTAG (full or partial)


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