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Threads Starting Mar 2003

53044: 03/03/01: John Tan: Design consideration of high datarate wireless system
    53045: 03/03/01: Rene Tschaggelar: Re: Design consideration of high datarate wireless system
53046: 03/03/01: Steve Michaels: Verilog/FPGA help needed
53048: 03/03/02: Basuki Endah Priyanto: Design Manager in ISE 5.x
    53057: 03/03/02: Markus Meng: Re: Design Manager in ISE 5.x
53049: 03/03/01: Ray Andraka: Atmel and Hotworks boards for sale
    53051: 03/03/01: Ray Andraka: Re: Atmel and Hotworks boards for sale
53053: 03/03/02: Basuki Endah Priyanto: FIR Filter from Xilinx
    53054: 03/03/01: Rene Tschaggelar: Re: FIR Filter from Xilinx
    53130: 03/03/04: Ken Chapman: Re: FIR Filter from Xilinx
        53178: 03/03/05: Henk van Kampen: Re: FIR Filter from Xilinx
            53339: 03/03/11: Noddy: Re: FIR Filter from Xilinx
53055: 03/03/02: siriuswmx: How to select the chip before using FPGA?
    53058: 03/03/02: Rene Tschaggelar: Re: How to select the chip before using FPGA?
        53065: 03/03/02: siriuswmx: Re: How to select the chip before using FPGA?
            53071: 03/03/03: Rene Tschaggelar: Re: How to select the chip before using FPGA?
            53088: 03/03/03: Brad Eckert: Re: How to select the chip before using FPGA?
                53118: 03/03/04: siriuswmx: Re: How to select the chip before using FPGA?
                    53146: 03/03/04: Peter Alfke: Re: How to select the chip before using FPGA?
                    53154: 03/03/05: Subroto Datta: Re: How to select the chip before using FPGA?
53060: 03/03/02: Dr. Abbes Amira: University Research Scholarships
53063: 03/03/03: Basuki Endah Priyanto: Re: FIR Filter from Xilinx
    53358: 03/03/11: john jakson: Re: FIR Filter from Xilinx
53066: 03/03/02: ron: FPGA demo board schematic
    53067: 03/03/03: Hal Murray: Re: FPGA demo board schematic
    53069: 03/03/03: Jan Pech: Re: FPGA demo board schematic
    53074: 03/03/03: geeko: Re: FPGA demo board schematic
    53081: 03/03/03: Ray Andraka: Re: FPGA demo board schematic
    53084: 03/03/03: Hans: Re: FPGA demo board schematic
    53087: 03/03/03: Nicholas C. Weaver: Re: FPGA demo board schematic
53068: 03/03/03: Noddy: Startup latency...
    53083: 03/03/03: Jim Wu: Re: Startup latency...
        53106: 03/03/04: Noddy: Re: Startup latency...
53072: 03/03/03: praveen: PCI specification doubt
    53101: 03/03/03: Eric Smith: Re: PCI specification doubt
    53117: 03/03/04: praveen: Re: PCI specification doubt
        53282: 03/03/10: Rick Filipkiewicz: Re: PCI specification doubt
53079: 03/03/03: geeko: Design Flow --basic questions
    53089: 03/03/03: Mike Treseler: Re: Design Flow --basic questions
53080: 03/03/03: geeko: Bus Functional Model
    53082: 03/03/03: Jim Wu: Re: Bus Functional Model
    53085: 03/03/03: Puneet: Re: Bus Functional Model
        53165: 03/03/05: Brendan Lynskey: Re: Bus Functional Model
            53172: 03/03/05: Jim Wu: Re: Bus Functional Model
                53197: 03/03/06: Petter Gustad: Re: Bus Functional Model
            53426: 03/03/13: Andreas Gieriet: Re: Bus Functional Model
                53427: 03/03/13: ArtO (spam-not): AMD Temp Specs
                    53433: 03/03/13: B. Joshua Rosen: Re: AMD Temp Specs
                        53466: 03/03/14: Bas Ruiter: Re: AMD Temp Specs
                    53480: 03/03/13: Stacey: Re: AMD Temp Specs
53086: 03/03/03: Thomas Lehner: Nios - > 8 bit Ram
    53099: 03/03/03: Jesse Kempa: Re: Nios - > 8 bit Ram
    53103: 03/03/03: Peter Sommerfeld: Re: Nios - > 8 bit Ram
    53104: 03/03/03: sarah shen: questions about RS232 IN Altera FPGA
        53211: 03/03/06: Fredrik: Re: questions about RS232 IN Altera FPGA
53090: 03/03/03: Simon J Fisher: Programming Altera parts in situ.
    53123: 03/03/04: Greg Deuerling: Re: Programming Altera parts in situ.
53092: 03/03/03: Lis Hu: scripting leonardo spectrum
    53093: 03/03/03: Petter Gustad: Re: scripting leonardo spectrum
        53283: 03/03/10: Rick Filipkiewicz: Re: scripting leonardo spectrum
    53094: 03/03/03: Mike Treseler: Re: scripting leonardo spectrum
    53163: 03/03/05: Erik Hansen: Re: scripting leonardo spectrum
53105: 03/03/04: Kevin Neilson: conditional `include
    53137: 03/03/04: Keith: Re: conditional `include
    53151: 03/03/04: Steven Sharp: Re: conditional `include
        53158: 03/03/05: Kevin Neilson: Re: conditional `include
            53180: 03/03/05: Paulo Dutra: Re: conditional `include
                53183: 03/03/05: Kevin Neilson: Re: conditional `include
                    53186: 03/03/05: Paulo Dutra: Re: conditional `include
                    53250: 03/03/08: Ken McElvain: Re: conditional `include
                        53270: 03/03/09: Kevin Neilson: Re: conditional `include
                            53296: 03/03/10: Ken McElvain: Re: conditional `include
            53189: 03/03/05: Steven Sharp: Re: conditional `include
53109: 03/03/04: Craig Tsui: rudimentary way to program CPLD
    53114: 03/03/04: Uwe Bonnes: Re: rudimentary way to program CPLD
        53115: 03/03/04: Rene Tschaggelar: Re: rudimentary way to program CPLD
53111: 03/03/04: arkaitz: Multi cpu Nios processor through SoPC Builder
    53210: 03/03/06: Fredrik: Re: Multi cpu Nios processor through SoPC Builder
53112: 03/03/04: Jeniffer: Implementation of latch in FPGA
    53121: 03/03/04: Jens Hildebrandt: Re: Implementation of latch in FPGA
    53140: 03/03/04: Mike Treseler: Re: Implementation of latch in FPGA
    53147: 03/03/04: john jakson: Re: Implementation of latch in FPGA
    53148: 03/03/04: paul: Re: Implementation of latch in FPGA
    53149: 03/03/05: David R Brooks: Re: Implementation of latch in FPGA
        53150: 03/03/04: Peter Alfke: Re: Implementation of latch in FPGA
            53217: 03/03/06: Nimrod Mesika: Re: Implementation of latch in FPGA
                53222: 03/03/06: Peter Alfke: Re: Implementation of latch in FPGA
                    53229: 03/03/07: Hal Murray: Re: Implementation of latch in FPGA
                    53240: 03/03/07: Theron Hicks: Re: Implementation of latch in FPGA
            53221: 03/03/06: Theron Hicks (Terry): Re: Implementation of latch in FPGA
                53241: 03/03/07: john jakson: Re: Implementation of latch in FPGA
                53247: 03/03/07: Peter Alfke: Re: Implementation of latch in FPGA
                    53252: 03/03/07: Theron Hicks (Terry): Re: Implementation of latch in FPGA
                        53259: 03/03/09: Allan Herriman: Re: Implementation of latch in FPGA
                            53265: 03/03/09: Jim Granville: Re: Implementation of latch in FPGA
                                53301: 03/03/10: Peter Alfke: Re: Implementation of latch in FPGA
                                    53318: 03/03/10: Theron Hicks: Re: Implementation of latch in FPGA
                    53264: 03/03/09: David R Brooks: Re: Implementation of latch in FPGA
53113: 03/03/04: Patrick Twomey: xilinx Dsgnmgr does not support Asynchronous Fifo on Spartan II XCS200-fg456
    53122: 03/03/04: Nicolas Matringe: Re: xilinx Dsgnmgr does not support Asynchronous Fifo on Spartan II
53116: 03/03/04: Tomas: Mac Os X for FPGA design
    53139: 03/03/04: Kevin Neilson: Re: Mac Os X for FPGA design
    53143: 03/03/04: john jakson: Re: Mac Os X for FPGA design
    53144: 03/03/04: Alfredo: Re: Mac Os X for FPGA design
    53160: 03/03/05: Emil Blaschek: Re: Mac Os X for FPGA design
    53162: 03/03/05: Felix Bertram: Re: Mac Os X for FPGA design
    53179: 03/03/05: B. Joshua Rosen: Re: Mac Os X for FPGA design
        53234: 03/03/07: Tomas: Re: Mac Os X for FPGA design
    53263: 03/03/08: Stephen Williams: Re: Mac Os X for FPGA design
53119: 03/03/04: nntp.lucent.com: Newbie: Help
    53138: 03/03/04: John_H: Re: Newbie: Help
53125: 03/03/04: Steven John Buckley: EP310
    53171: 03/03/05: Jonathan Bromley: Re: EP310
    53174: 03/03/05: Langmann: Re: EP310
    53176: 03/03/06: Jim Granville: Re: EP310
53131: 03/03/04: itris: xilinx HDL bencher
    53141: 03/03/04: Mike Treseler: Re: xilinx HDL bencher
53132: 03/03/04: Noddy: Xilinx support...
    53133: 03/03/04: Austin Lesea: Re: Xilinx support...
53134: 03/03/04: Hakon Lislebo: Using Xilinx DCM's (DLL) with RESET tied to GND is dangerous!!
    53135: 03/03/04: Austin Lesea: Using Xilinx DCMs out of specifications is not recommended!!!!
        53155: 03/03/05: Bob: Re: Using Xilinx DCMs out of specifications is not recommended!!!!
            53159: 03/03/05: Allan Herriman: Re: Using Xilinx DCMs out of specifications is not recommended!!!!
    53269: 03/03/09: <hamish@cloud.net.au>: Re: Using Xilinx DCM's (DLL) with RESET tied to GND is dangerous!!
53145: 03/03/04: Sumanth Donthi: Partial reconfiguration
    53205: 03/03/06: Ray Andraka: Re: Partial reconfiguration
53152: 03/03/04: TI: Issues in Outsourcing?
    53153: 03/03/04: Garrett Mace: Re: Issues in Outsourcing?
    53156: 03/03/05: Ken Taylor: Re: Issues in Outsourcing?
    53157: 03/03/04: Jerry: Re: Issues in Outsourcing?
    53184: 03/03/05: Nial Stewart: Re: Issues in Outsourcing?
    53185: 03/03/05: Spehro Pefhany: Re: Issues in Outsourcing?
    53192: 03/03/06: Roger Lascelles: Re: Issues in Outsourcing?
        53195: 03/03/05: J. Michael Milner: Re: Issues in Outsourcing?
            53196: 03/03/05: Garrett Mace: Re: Issues in Outsourcing?
                53214: 03/03/06: john jakson: Re: Issues in Outsourcing?
                    53284: 03/03/10: Rick Filipkiewicz: Re: Issues in Outsourcing?
                53219: 03/03/06: Marc Randolph: Re: Issues in Outsourcing?
            53416: 03/03/13: Patrick Meuser: Re: Issues in Outsourcing?
    53208: 03/03/06: Paul: Re: Issues in Outsourcing?
    53233: 03/03/07: Paul Hovnanian: Re: Issues in Outsourcing?
53161: 03/03/05: Andreas Kugel: Problems with Xilinx EDK and Spartan2e devices
    53177: 03/03/05: Paulo Dutra: Re: Problems with Xilinx EDK and Spartan2e devices
53164: 03/03/05: Brazil: PCMCIA to IDE interface
    53228: 03/03/07: Jo Kenens (no_spam no_spam no_spam): Re: PCMCIA to IDE interface
    53256: 03/03/08: Spam Hater: Re: PCMCIA to IDE interface
53168: 03/03/05: Sujatha: Square root implementation
    53169: 03/03/05: Jonathan Bromley: Re: Square root implementation
        53191: 03/03/06: Glen Herrmannsfeldt: Re: Square root implementation
    53175: 03/03/05: Thomas Siebert: Re: Square root implementation
53170: 03/03/05: Jim Wu: Re: Startup latency
53173: 03/03/05: Tom Hawkins: Xilinx EDIF Flow and Blackbox Instantiation
    53182: 03/03/05: Hakon Lislebo: Re: Xilinx EDIF Flow and Blackbox Instantiation
    53187: 03/03/05: Chris Rosewarne: Re: Xilinx EDIF Flow and Blackbox Instantiation
53181: 03/03/05: RM: filter coefficients from sig. proc. toolbox to xilinx
    53200: 03/03/06: Paul Costa: Re: filter coefficients from sig. proc. toolbox to xilinx
        53204: 03/03/06: Ray Andraka: Re: filter coefficients from sig. proc. toolbox to xilinx
53188: 03/03/05: Ed Jubenville: Virtex II Pro : Memec V2PRO board
53190: 03/03/05: Eduardo Wenzel Brićo: Partial Reconfiguration : Modular Design Help
    53193: 03/03/05: Chen Wei Tseng: Re: Partial Reconfiguration : Modular Design Help
53194: 03/03/05: gps: Need help! Any experienced Handel-C user?
    53215: 03/03/06: john jakson: Re: Need help! Any experienced Handel-C user?
        53223: 03/03/07: John Williams: Re: Need help! Any experienced Handel-C user?
            53258: 03/03/08: Tom Hawkins: Re: Need help! Any experienced Handel-C user?
                53275: 03/03/10: John Williams: Re: Need help! Any experienced Handel-C user?
                    53291: 03/03/10: Tom Hawkins: CF Code Examples (Was: Need help! Any experienced Handel-C user?)
53198: 03/03/06: Andreas Kugel: DCM usage in Virtex-2Pro for Rocket I/O and PPC
53199: 03/03/06: SDL: Re: Only for Altera Nios users or Modelsim expert
53201: 03/03/07: Anup Kumar Raghavan: Week Keepers and Pull ups
53202: 03/03/06: Andreas Purde: implementing unfinished designs
    53203: 03/03/06: Jonathan Bromley: Re: implementing unfinished designs
53206: 03/03/06: sarah shen: altera quartusII help
    53207: 03/03/06: SDL: Re: altera quartusII help
    53213: 03/03/06: Thomas Siebert: Re: altera quartusII help
    53224: 03/03/07: Subroto Datta: Re: altera quartusII help
53216: 03/03/06: Scott: How to create a top level VHDL file for given EDIF files
53220: 03/03/07: Ray Andraka: VCC XC6216 Hotworks board for sale
53225: 03/03/06: Prakash: JTAG
    53231: 03/03/07: Jim Wu: Re: JTAG
        53235: 03/03/07: Larry Doolittle: Re: JTAG
            53514: 03/03/14: Turgut Abacioglu: Re: JTAG
        53513: 03/03/14: Turgut Abacioglu: Re: JTAG
53227: 03/03/07: Henrik Douglas Green: Current Consumption/Limitation Upon Output
    53230: 03/03/07: Håkon Lislebų: Re: Current Consumption/Limitation Upon Output
    53248: 03/03/07: Peter Alfke: Re: Current Consumption/Limitation Upon Output
53232: 03/03/07: Evolvable Hardware Conference: CFP: 2003 NASA/DoD Conference on Evolvable Hardware
53236: 03/03/07: JDS: Multipliers Architectures use on FPGA COREGEN
    53292: 03/03/10: Ray Andraka: Re: Multipliers Architectures use on FPGA COREGEN
53237: 03/03/07: Martin Schoeberl: Cyclone power up problem
    53238: 03/03/07: Uwe Bonnes: Re: Cyclone power up problem
        53239: 03/03/07: Martin Schoeberl: Re: Cyclone power up problem
    53278: 03/03/10: Thorsten Bunte: Re: Cyclone power up problem
        53300: 03/03/10: Peter Alfke: Re: Cyclone power up problem
        53336: 03/03/11: Martin Schoeberl: Re: Cyclone power up problem
            53337: 03/03/11: Prager Roman: Re: Cyclone power up problem
            53343: 03/03/11: Austin Lesea: Re: Cyclone power up problem
                53383: 03/03/12: Martin Schoeberl: Re: Cyclone power up problem
                    53387: 03/03/12: Jonathan Bromley: Re: Cyclone power up problem
                        53399: 03/03/12: Martin Schoeberl: Re: Cyclone power up problem
                            53423: 03/03/13: Jonathan Bromley: Re: Cyclone power up problem
                    53393: 03/03/13: Jim Granville: Re: Cyclone power up problem
                        53398: 03/03/12: Martin Schoeberl: Re: Cyclone power up problem
                            53412: 03/03/13: Jim Granville: Re: Cyclone power up problem
            53350: 03/03/12: Jim Granville: Re: Cyclone power up problem
                53361: 03/03/11: Austin Lesea: Re: Cyclone power up problem
                    53367: 03/03/12: Jim Granville: Re: Cyclone power up problem
                        53378: 03/03/12: Austin Lesea: Re: Cyclone power up problem
                            53391: 03/03/13: Jim Granville: Re: Cyclone power up problem
                                53394: 03/03/12: Austin Lesea: Re: Cyclone power up problem
                                    53401: 03/03/12: Thorsten Bunte: Re: Cyclone power up problem
    53437: 03/03/13: Greg Steinke: Re: Cyclone power up problem
        53450: 03/03/14: Jim Granville: Re: Cyclone power up problem
            53453: 03/03/13: Peter Alfke: Re: Cyclone power up problem
        53458: 03/03/13: Thorsten Bunte: Re: Cyclone power up problem
            53469: 03/03/14: Martin Schoeberl: Re: Cyclone power up problem
            53470: 03/03/13: Greg Steinke: Re: Cyclone power up problem
        53468: 03/03/13: Martin Schoeberl: Re: Cyclone power up problem
    53512: 03/03/14: Martin Schoeberl: Cyclone power up problem - Summery
        53546: 03/03/16: Jim Granville: Re: Cyclone power up problem - Summery
            53549: 03/03/16: Martin Schoeberl: Re: Cyclone power up problem - Summery
                53552: 03/03/16: Jim Granville: Re: Cyclone power up problem - Summery
                    53553: 03/03/16: Martin Schoeberl: Re: Cyclone power up problem - Summery
        53547: 03/03/15: Michael S: Re: Cyclone power up problem - Summery
            53550: 03/03/16: Martin Schoeberl: Re: Cyclone power up problem - Summery
        53663: 03/03/19: Michael S: Re: Cyclone power up problem - Summery
            54819: 03/04/18: LostSignal: Re: Cyclone power up problem - Summery
                54820: 03/04/19: Simon: Re: Cyclone power up problem - Summery
                54871: 03/04/21: Austin Lesea: Re: Cyclone power up problem - Summery
                    55059: 03/04/25: Powermos: Re: Cyclone power up problem - Summery
                        55077: 03/04/25: Austin Lesea: Re: Cyclone power up problem - Summery
                            55096: 03/04/26: Powermos: Re: Cyclone power up problem - Summery
        54149: 03/04/03: Martin Schoeberl: Re: Cyclone power up problem - Summery
            54180: 03/04/04: Simon: Re: Cyclone power up problem - Summery
                54182: 03/04/04: Martin Schoeberl: Re: Cyclone power up problem - Summery
                54190: 03/04/04: Austin Lesea: Re: Cyclone power up problem - 'Engineerus Emptor'
                    54218: 03/04/05: Simon: Re: Cyclone power up problem - 'Engineerus Emptor'
                    54229: 03/04/04: Eric Smith: Re: Cyclone power up problem - 'Engineerus Emptor'
                        54234: 03/04/05: Martin Schoeberl: Re: Cyclone power up problem - 'Engineerus Emptor'
53242: 03/03/07: TigerMole: Xilinx ISP Header
    53243: 03/03/07: Uwe Bonnes: Re: Xilinx ISP Header
        53246: 03/03/07: TigerMole: Re: Xilinx ISP Header
            53257: 03/03/08: Spam Hater: Re: Xilinx ISP Header
53249: 03/03/07: Michael Wrighton: best way to read/write contents of BRAM to a file during simulation?
    53253: 03/03/08: Terrence Mak: Re: best way to read/write contents of BRAM to a file during simulation?
    53365: 03/03/11: Michael Wrighton: Re: best way to read/write contents of BRAM to a file during simulation?
53254: 03/03/08: Kurt: Does ByteBlasterMV support the Cyclone EP1C6 configured for 3.3V I/O?
    53312: 03/03/10: Greg Steinke: Re: Does ByteBlasterMV support the Cyclone EP1C6 configured for 3.3V I/O?
53260: 03/03/08: David: Clocking a spartanIIE with a 5V signal?
    53261: 03/03/08: Bob: Re: Clocking a spartanIIE with a 5V signal?
        53272: 03/03/10: Ralph Mason: Re: Clocking a spartanIIE with a 5V signal?
            53319: 03/03/10: Theron Hicks: Re: Clocking a spartanIIE with a 5V signal?
    53262: 03/03/08: Marc Randolph: Re: Clocking a spartanIIE with a 5V signal?
53266: 03/03/09: Joe Lawrence: Extending Existing Micro(controller/processor) Core
53267: 03/03/08: Anand Ramakrishna: About Xilinx Spartan FPGA.
53268: 03/03/09: =·MoLe=: Motion Control IP Cores , anyone do them ?
    53274: 03/03/09: Peter Wallace: Re: Motion Control IP Cores , anyone do them ?
    53293: 03/03/10: Ray Andraka: Re: Motion Control IP Cores , anyone do them ?
        53295: 03/03/10: =·MoLe=: Re: Motion Control IP Cores , anyone do them ?
53273: 03/03/09: Nicholas C. Weaver: Xilinx/Altera product timeline?
53276: 03/03/09: JDS: Minimum Real-state K-multiplier/divider
    53304: 03/03/10: Ray Andraka: Re: Minimum Real-state K-multiplier/divider
53277: 03/03/09: praveen: PCI specification
    53285: 03/03/10: Kevin Brace: Re: PCI specification
        53338: 03/03/11: praveen: Re: PCI specification
            53397: 03/03/12: Kevin Brace: Re: PCI specification
                53499: 03/03/14: praveen: Re: PCI specification
                    53725: 03/03/20: Kevin Brace: Re: PCI specification
53279: 03/03/10: Liao Jirong: Time constraint of bit-stream file
    53286: 03/03/10: Uwe Bonnes: Re: Time constraint of bit-stream file
53280: 03/03/10: LIJO: Timing Simulation Glitches
    53281: 03/03/10: Muzaffer Kal: Re: Timing Simulation Glitches
    53294: 03/03/10: Andre Powell: Re: Timing Simulation Glitches
        53471: 03/03/13: Y Varma: Re: Timing Simulation Glitches
            53488: 03/03/14: Andre Powell: Re: Timing Simulation Glitches
53287: 03/03/10: Eduardo Wenzel Brićo: Partial Reconfigration:Active Module of MD
    53290: 03/03/10: Emil Blaschek: Re: Partial Reconfigration:Active Module of MD
53288: 03/03/10: jools: Atmel FPGA uk
    53297: 03/03/10: Jonathan Bromley: Re: Atmel FPGA uk
53289: 03/03/10: Jeniffer: Static Tming Analysis
    53299: 03/03/10: John_H: Re: Static Tming Analysis
53298: 03/03/10: Stephen Melnikoff: Chip release dates
53302: 03/03/10: Padraig FitzGerald: comp.arch.fpga : VCC shorted to GND within FPGA???
    53303: 03/03/10: Peter Alfke: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
    53308: 03/03/10: Nial Stewart: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
        53357: 03/03/11: Chip: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
    53315: 03/03/10: Ray Andraka: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
    53334: 03/03/11: Nicolas Matringe: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
    53368: 03/03/12: ntinsider: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
    53376: 03/03/12: Jeff Cunningham: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
    53585: 03/03/17: Arash Salarian: Re: comp.arch.fpga : VCC shorted to GND within FPGA???
53305: 03/03/10: David: Using divided clock
    53306: 03/03/10: Falk Brunner: Re: Using divided clock
        53578: 03/03/17: Rick Filipkiewicz: Re: Using divided clock
            53593: 03/03/17: Falk Brunner: Re: Using divided clock
    53309: 03/03/10: Peter Alfke: Re: Using divided clock
        53328: 03/03/11: Igor Orlovich: Re: Using divided clock
            53344: 03/03/11: Mike Treseler: Re: Using divided clock
        53465: 03/03/13: Tullio Grassi: Re: Using divided clock
            53467: 03/03/13: Peter Alfke: Re: Using divided clock
            53479: 03/03/14: Ray Andraka: Re: Using divided clock
        53486: 03/03/14: louis: Re: Using divided clock
            53505: 03/03/14: Peter Alfke: Re: Using divided clock
                53573: 03/03/17: louis: Re: Using divided clock
    53310: 03/03/10: Alan Raphael: Re: Using divided clock
        53321: 03/03/10: David: Re: Using divided clock
            53330: 03/03/10: Alex Carreira: Re: Using divided clock
    53314: 03/03/10: John_H: Re: Using divided clock
53307: 03/03/10: Kevin Neilson: Constant Functions in Synplify
53311: 03/03/10: CB: Altera Clock
    53313: 03/03/10: Ray Andraka: Re: Altera Clock
    53317: 03/03/11: Jim Granville: Re: Altera Clock
    53340: 03/03/11: CB: Re: Altera Clock
53316: 03/03/10: Joe: Are there any FPGA magazines/journals?
    53320: 03/03/10: Peter Alfke: Re: Are there any FPGA magazines/journals?
    53323: 03/03/10: Alex Carreira: Re: Are there any FPGA magazines/journals?
        53324: 03/03/11: Nicholas C. Weaver: Re: Are there any FPGA magazines/journals?
            53341: 03/03/11: <m>: Re: Are there any FPGA magazines/journals?
        53373: 03/03/12: Stephen Melnikoff: Re: Are there any FPGA magazines/journals?
    53325: 03/03/11: Ray Andraka: Re: Are there any FPGA magazines/journals?
        54687: 03/04/16: Richard B. Katz: Re: Are there any FPGA magazines/journals?
    53353: 03/03/11: john jakson: Re: Are there any FPGA magazines/journals?
    53362: 03/03/11: Joe: Re: Are there any FPGA magazines/journals?
53322: 03/03/10: Amy Mitby: Synplicity's Identify tool vs. Chipscope
53326: 03/03/10: Marc Kelly: Xilinx Post Place & Route VHDL output.
    53348: 03/03/11: Marc Patrick Kelly: Re: Xilinx Post Place & Route VHDL output.
53331: 03/03/11: Gaga: digikey d2e microblaze help
    53346: 03/03/11: Erik Widding: Re: digikey d2e microblaze help
53332: 03/03/11: Bram van de Kerkhof: DDR example designs of xilinx or altera
    53342: 03/03/11: Håkon Lislebų: Re: DDR example designs of xilinx or altera
53333: 03/03/11: Liang-Kai Wang: question to generate three clock
53335: 03/03/11: Jason Lade: Interested in FPGA programming using systemc
    53349: 03/03/11: john jakson: Re: Interested in FPGA programming using systemc
53345: 03/03/11: <m>: Can you recommend a text on...?
    53347: 03/03/11: Erik Widding: Re: Can you recommend a text on...?
    53351: 03/03/11: Peter Alfke: Re: Can you recommend a text on...?
    53359: 03/03/11: Ray Andraka: Re: Can you recommend a text on...?
53354: 03/03/11: Niranjandas: Help understanding 7408 and gate chip
    53366: 03/03/11: john jakson: Re: Help understanding 7408 and gate chip
        53411: 03/03/13: Glen Herrmannsfeldt: Re: Help understanding 7408 and gate chip
            53439: 03/03/13: Brian Drummond: Re: Help understanding 7408 and gate chip
                53440: 03/03/13: Austin Lesea: Re: Help understanding 7408 and gate chip
                53558: 03/03/16: Glen Herrmannsfeldt: Re: Help understanding 7408 and gate chip
                    53583: 03/03/17: Brian Drummond: Re: Help understanding 7408 and gate chip
                        53584: 03/03/17: Ray Andraka: Re: Help understanding 7408 and gate chip
        53472: 03/03/13: Niranjandas: Re: Help understanding 7408 and gate chip
            53529: 03/03/14: john jakson: Re: Help understanding 7408 and gate chip
    53587: 03/03/17: B. Joshua Rosen: Re: Help understanding 7408 and gate chip
        53599: 03/03/17: john jakson: Re: Help understanding 7408 and gate chip
        53600: 03/03/17: John Eaton: Re: Help understanding 7408 and gate chip
            53603: 03/03/18: Jim Granville: Re: Help understanding 7408 and gate chip
            53604: 03/03/17: B. Joshua Rosen: Re: Help understanding 7408 and gate chip
                53690: 03/03/19: Niranjandas: Re: Help understanding 7408 and gate chip
                    53697: 03/03/20: Glen Herrmannsfeldt: Re: Help understanding 7408 and gate chip
                        53705: 03/03/20: Pete Fenelon: Re: Help understanding 7408 and gate chip
                    53708: 03/03/20: B. Joshua Rosen: Re: Help understanding 7408 and gate chip
53355: 03/03/11: Konrad Eisele: Leon processor + MMU + linux port
53363: 03/03/11: db: FPGA new problems.
    53382: 03/03/12: Spam Hater 7: Re: FPGA new problems.
53369: 03/03/12: Utku Ozcan: unsupported switches of PAR
    53653: 03/03/19: Lars Unger: Re: unsupported switches of PAR
    53655: 03/03/19: Petter Gustad: Re: unsupported switches of PAR
        53667: 03/03/19: Utku Ozcan: Re: unsupported switches of PAR
            53672: 03/03/19: Petter Gustad: Re: unsupported switches of PAR
        53683: 03/03/19: Steve Lass: Re: unsupported switches of PAR
            53695: 03/03/20: Petter Gustad: Re: unsupported switches of PAR
53370: 03/03/12: LIJO: RESET --- Synchronous Vs Asynchronous
    53380: 03/03/12: Peter Alfke: Re: RESET --- Synchronous Vs Asynchronous
        53424: 03/03/13: Thomas Stanka: Re: RESET --- Synchronous Vs Asynchronous
            53435: 03/03/13: Ray Andraka: Re: RESET --- Synchronous Vs Asynchronous
            53447: 03/03/13: Peter Alfke: Re: RESET --- Synchronous Vs Asynchronous
                53487: 03/03/14: Thomas Stanka: Re: RESET --- Synchronous Vs Asynchronous
                    53489: 03/03/14: Allan Herriman: Re: RESET --- Synchronous Vs Asynchronous
                    53490: 03/03/14: j: Re: RESET --- Synchronous Vs Asynchronous
                        53496: 03/03/14: Allan Herriman: Re: RESET --- Synchronous Vs Asynchronous
                    53580: 03/03/17: Hal Murray: Re: RESET --- Synchronous Vs Asynchronous
        53455: 03/03/13: Marc Randolph: Re: RESET --- Synchronous Vs Asynchronous
            53459: 03/03/13: Ray Andraka: Re: RESET --- Synchronous Vs Asynchronous
            53461: 03/03/13: Peter Alfke: Re: RESET --- Synchronous Vs Asynchronous
                53463: 03/03/13: Hal Murray: Re: RESET --- Synchronous Vs Asynchronous
    53381: 03/03/12: Pieter Hulshoff: Re: RESET --- Synchronous Vs Asynchronous
    53388: 03/03/12: Mike Treseler: Re: RESET --- Synchronous Vs Asynchronous
        53414: 03/03/12: Clyde R. Shappee: Re: RESET --- Synchronous Vs Asynchronous
            53445: 03/03/13: Mike Treseler: Re: RESET --- Synchronous Vs Asynchronous
                53481: 03/03/13: Clyde R. Shappee: Re: RESET --- Synchronous Vs Asynchronous
    53404: 03/03/12: alba nohi: Re: RESET --- Synchronous Vs Asynchronous
        53421: 03/03/13: Jens Huettemann: Re: RESET --- Synchronous Vs Asynchronous
    53562: 03/03/16: Vijayvithal Jahagirdar: Re: RESET --- Synchronous Vs Asynchronous
        53634: 03/03/18: John Eaton: Re: RESET --- Synchronous Vs Asynchronous
            53638: 03/03/18: Peter Alfke: Re: RESET --- Synchronous Vs Asynchronous
53371: 03/03/12: LIJO: DRC/ LVS
    53385: 03/03/12: Alexander Gnusin: Re: DRC/ LVS
    53386: 03/03/12: Muzaffer Kal: Re: DRC/ LVS
53372: 03/03/12: Kostas: FPGA BitStream
    54889: 03/04/21: Weifeng Xu: Re: FPGA BitStream
53375: 03/03/12: Patrick MacGregor: Development boards with optics
    53542: 03/03/15: Andreas Kugel: Re: Development boards with optics
53377: 03/03/12: Mike Hubert: footprints
    53379: 03/03/12: John Larkin: Re: footprints
        53384: 03/03/12: Mike Hubert: Re: footprints
            53405: 03/03/12: Powermos: Re: footprints
            53451: 03/03/13: Boris Mohar: Re: footprints
    53436: 03/03/13: Lizard Blizzard: Re: footprints
    53454: 03/03/13: ånųn’mųu§: footprints
    53570: 03/03/17: Experiment 5: Re: footprints
53389: 03/03/12: Utku Ozcan: TEMPERATURE constraint in UCF
    53642: 03/03/18: Falk Brunner: Re: TEMPERATURE constraint in UCF
        53666: 03/03/19: Utku Ozcan: Re: TEMPERATURE constraint in UCF
53390: 03/03/12: Eduardo Wenzel Brićo: Modular Design: Dangerous warnings..
53392: 03/03/12: CC Nguyen: PCI parity question
    53396: 03/03/12: Kevin Brace: Re: PCI parity question
    53402: 03/03/12: CC Nguyen: Re: PCI parity question
        53408: 03/03/12: Kevin Brace: Re: PCI parity question
    53410: 03/03/12: CC Nguyen: Re: PCI parity question
53395: 03/03/12: Pepito Perez: Buying memory for FPGA...
    53403: 03/03/12: Martin Schoeberl: Re: Buying memory for FPGA...
    53406: 03/03/12: Theron Hicks: Re: Buying memory for FPGA...
    53442: 03/03/13: Kolja Sulimma: Re: Buying memory for FPGA...
        53462: 03/03/13: Pepito Perez: Re: Buying memory for FPGA...
        53493: 03/03/14: Rene Tschaggelar: Re: Buying memory for FPGA...
53400: 03/03/12: alba nohi: line counter
    53407: 03/03/13: John Williams: Re: line counter
        53409: 03/03/13: John Williams: Re: line counter
53413: 03/03/13: Igor Orlovich: Adding delay to a signal?
    53419: 03/03/13: Noddy: Re: Adding delay to a signal?
        53475: 03/03/14: Igor Orlovich: Re: Adding delay to a signal?
            53478: 03/03/13: Peter Alfke: Re: Adding delay to a signal?
                53497: 03/03/14: Brian Drummond: Re: Adding delay to a signal?
                    53527: 03/03/15: Igor Orlovich: Re: Adding delay to a signal?
                53501: 03/03/14: Ray Andraka: Re: Adding delay to a signal?
        53492: 03/03/14: Rene Tschaggelar: Re: Adding delay to a signal?
    53446: 03/03/13: Peter Alfke: Re: Adding delay to a signal?
        53474: 03/03/14: Igor Orlovich: Re: Adding delay to a signal?
            53482: 03/03/14: Ray Andraka: Re: Adding delay to a signal?
                53485: 03/03/14: Igor Orlovich: Re: Adding delay to a signal?
                    53502: 03/03/14: Ray Andraka: Re: Adding delay to a signal?
                    53532: 03/03/14: Duane Clark: Re: Adding delay to a signal?
                        53535: 03/03/15: Igor Orlovich: Re: Adding delay to a signal?
                            53539: 03/03/15: Duane Clark: Re: Adding delay to a signal?
                                53548: 03/03/16: Ray Andraka: Re: Adding delay to a signal?
    53491: 03/03/14: Rene Tschaggelar: Re: Adding delay to a signal?
53415: 03/03/13: Basuki Endah Priyanto: Re: VHDL & FPGA Design tools
53417: 03/03/13: zhengyu: write a single byte in to DRAM
    53438: 03/03/13: Brian Drummond: Re: write a single byte in to DRAM
    53557: 03/03/16: Glen Herrmannsfeldt: Re: write a single byte in to DRAM
        53691: 03/03/20: Stan Lackey: Re: write a single byte in to DRAM
            53699: 03/03/20: Glen Herrmannsfeldt: Re: write a single byte in to DRAM
53418: 03/03/13: Markus Meng: [Xilinx] Looking for Parallel Cable III ...
    53420: 03/03/13: Noddy: Re: [Xilinx] Looking for Parallel Cable III ...
        53428: 03/03/13: Pat G.: Re: [Xilinx] Looking for Parallel Cable III ...
            53430: 03/03/13: Noddy: Re: [Xilinx] Looking for Parallel Cable III ...
                53444: 03/03/13: Falk Brunner: Re: [Xilinx] Looking for Parallel Cable III ...
                53452: 03/03/13: Pat G.: Re: [Xilinx] Looking for Parallel Cable III ...
    53429: 03/03/13: Jens Hildebrandt: Re: [Xilinx] Looking for Parallel Cable III ...
    53441: 03/03/13: Kolja Sulimma: Re: [Xilinx] Looking for Parallel Cable III ...
    53456: 03/03/13: Laurent Gauch, Amontec: Re: [Xilinx] Looking for Parallel Cable III ...
53422: 03/03/13: Peng Cong: The structure of the multiplier
    53434: 03/03/13: Ray Andraka: Re: The structure of the multiplier
53425: 03/03/13: Andreas Purde: Xilinx ISE sometimes seems to use old edf-file
53431: 03/03/13: Pat G.: Homemade Xilinx Parallel JTAG Download Cable
    53432: 03/03/13: Giuseppe³: Re: Homemade Xilinx Parallel JTAG Download Cable
        53443: 03/03/13: Falk Brunner: Re: Homemade Xilinx Parallel JTAG Download Cable
            53457: 03/03/13: Laurent Gauch, Amontec: Re: Homemade Xilinx Parallel JTAG Download Cable
            53495: 03/03/14: Pat G.: Question about the schematic?
53448: 03/03/13: KB: Altera Sourcing
    53522: 03/03/14: Pepito Perez: Re: Altera Sourcing
53449: 03/03/13: Santa: What is the diff between FPGA and CPLD?
    53503: 03/03/14: Dan: Re: What is the diff between FPGA and CPLD?
        53511: 03/03/14: Neeraj Varma: Re: What is the diff between FPGA and CPLD?
        53515: 03/03/14: Dave: Re: What is the diff between FPGA and CPLD?
        53556: 03/03/16: Alex Gibson: Re: What is the diff between FPGA and CPLD?
            53564: 03/03/16: Stuart Brorson: Re: What is the diff between FPGA and CPLD?
                53565: 03/03/16: Nicholas C. Weaver: Re: What is the diff between FPGA and CPLD?
    53537: 03/03/15: Kolja Sulimma: Re: What is the diff between FPGA and CPLD?
    53706: 03/03/20: Turgut Abacioglu: Re: What is the diff between FPGA and CPLD?
53464: 03/03/13: JDS: Path delay and timer question
    53477: 03/03/14: Ray Andraka: Re: Path delay and timer question
        53518: 03/03/14: JDS: Re: Path delay and timer question
53473: 03/03/13: Niranjandas: About VLCT
    53531: 03/03/14: john jakson: Re: About VLCT
        53555: 03/03/15: Niranjandas: Re: About VLCT
53476: 03/03/13: Gerardo Sosa: Integrating an VHDL component in a project in Handel-C
    53533: 03/03/14: john jakson: Re: Integrating an VHDL component in a project in Handel-C
    53619: 03/03/18: Alan Fitch: Re: Integrating an VHDL component in a project in Handel-C
        53651: 03/03/18: Gerardo Sosa: Re: Integrating an VHDL component in a project in Handel-C
            53745: 03/03/21: Alan Fitch: Re: Integrating an VHDL component in a project in Handel-C
                53766: 03/03/21: Gerardo Sosa: Re: Integrating an VHDL component in a project in Handel-C --- it works!!!!
53483: 03/03/13: Josh Pfrimmer: IFDs in Xilinx Foundation 4.1i
    53510: 03/03/14: Mike Treseler: Re: IFDs in Xilinx Foundation 4.1i
        53519: 03/03/14: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
            53521: 03/03/14: Mike Treseler: Re: IFDs in Xilinx Foundation 4.1i
                53525: 03/03/14: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
                    53530: 03/03/14: Duane Clark: Re: IFDs in Xilinx Foundation 4.1i
                        53534: 03/03/14: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
                            53538: 03/03/15: Brian Drummond: Re: IFDs in Xilinx Foundation 4.1i
                                53545: 03/03/15: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
    53598: 03/03/17: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
        53614: 03/03/17: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
    53609: 03/03/17: Robert Myers: Re: IFDs in Xilinx Foundation 4.1i
        53615: 03/03/17: Josh Pfrimmer: Re: IFDs in Xilinx Foundation 4.1i
            53617: 03/03/17: Duane Clark: Re: IFDs in Xilinx Foundation 4.1i
    53659: 03/03/19: Ray Andraka: Re: IFDs in Xilinx Foundation 4.1i
53484: 03/03/13: Hari: ROM containing complex numbers
    53494: 03/03/14: Falk Brunner: Re: ROM containing complex numbers
    53500: 03/03/14: Ray Andraka: Re: ROM containing complex numbers
53498: 03/03/14: moukai: NIOS problem
53504: 03/03/14: Mike Hubert: more footprints...
    53509: 03/03/14: Bob Perlman: Re: more footprints...
    53572: 03/03/16: Keith R. Williams: Re: more footprints...
        53577: 03/03/17: Ken: Re: more footprints...
            53579: 03/03/17: Jonathan Bromley: Re: more footprints...
                53596: 03/03/17: Keith R. Williams: Re: more footprints...
            53595: 03/03/17: Keith R. Williams: Re: more footprints...
            53612: 03/03/17: Walter Harley: Re: more footprints...
                53616: 03/03/18: Ray Andraka: Re: more footprints...
                53618: 03/03/17: Keith R. Williams: Re: more footprints...
                    53620: 03/03/18: Ken: Re: more footprints...
53508: 03/03/14: Peter Sommerfeld: LogicLock and SOPC Builder
53517: 03/03/14: Larry Doolittle: Xilinx WebPACK on WINE -- getting close
    53520: 03/03/14: Roy White: Re: Xilinx WebPACK on WINE -- getting close
        53524: 03/03/15: Larry Doolittle: Re: Xilinx WebPACK on WINE -- getting close
            53635: 03/03/18: Roy White: Re: Xilinx WebPACK on WINE -- getting close
    53523: 03/03/14: Duane Clark: Re: Xilinx WebPACK on WINE -- getting close
53526: 03/03/15: Rick: JPEG encoder implementation
53528: 03/03/14: Brad Smallridge: Cypress Users Anyone?
    53536: 03/03/15: leon qin: Re: Cypress Users Anyone?
    53897: 03/03/26: Eric Smith: Re: Cypress Users Anyone?
53540: 03/03/15: houman: serial transmission between altera's fpga board and PALM?
53541: 03/03/15: qlyus: Quality of Xilinx Document
53543: 03/03/15: Chip: blockram optimized away
    53544: 03/03/15: B. Joshua Rosen: Re: blockram optimized away
        53554: 03/03/15: Chip: Re: blockram optimized away
            53559: 03/03/16: Glen Herrmannsfeldt: Re: blockram optimized away
            53563: 03/03/16: Peter Wallace: Re: blockram optimized away
53551: 03/03/16: Jimmy Zhang: 16 adder latency
53561: 03/03/16: naveen: on chip components
53566: 03/03/16: Buddy Smith: FPGA dev boards
    53567: 03/03/16: Martin Schoeberl: Re: FPGA dev boards
    53568: 03/03/16: Brad Smallridge: Re: FPGA dev boards
    53569: 03/03/17: Alex Gibson: Re: FPGA dev boards
    53571: 03/03/16: Jerry: Re: FPGA dev boards
        53574: 03/03/17: Martin Schoeberl: Re: FPGA dev boards
        53588: 03/03/17: Ken McElvain: Re: FPGA dev boards
        53591: 03/03/17: Paul Baxter: Re: FPGA dev boards
        53594: 03/03/17: john jakson: Re: FPGA dev boards
            53601: 03/03/18: Neeraj Varma: Re: FPGA dev boards
        53711: 03/03/20: Jonas Nilsson: Re: FPGA dev boards
53576: 03/03/17: Stamatis Sotiropoulos: FPGA based PCB
53581: 03/03/17: hswnetin: Non-integer ratio interpolation and decimation
    53597: 03/03/17: Kevin Neilson: Re: Non-integer ratio interpolation and decimation
53582: 03/03/17: Eduardo Wenzel Brićo: Modular Design:Fatal error issued by PAR
53586: 03/03/17: Peter Sommerfeld: LogicLock and SOPC Builder
    53636: 03/03/18: Jesse Kempa: Re: LogicLock and SOPC Builder
53589: 03/03/17: Stamatis Sotiropoulos: PROM for SpartanII Configuration
53590: 03/03/17: =?ISO-8859-1?Q?Ralf_Oberl=E4nder?=: new XC95xx global clock
    53592: 03/03/17: Falk Brunner: Re: new XC95xx global clock
        53602: 03/03/18: Ralph Mason: Re: new XC95xx global clock
            53608: 03/03/17: Falk Brunner: Re: new XC95xx global clock
                53610: 03/03/18: Ralph Mason: Re: new XC95xx global clock
                    53613: 03/03/18: Jim Granville: Re: new XC95xx global clock
                53611: 03/03/17: Karl Olsen: Re: new XC95xx global clock
53605: 03/03/17: Peter C. Wallace: Cheapest Spartan II/IIE configuration flash EEPROM!
    53606: 03/03/18: Jim Granville: Re: Cheapest Spartan II/IIE configuration flash EEPROM!
        53607: 03/03/17: Peter C. Wallace: Re: Cheapest Spartan II/IIE configuration flash EEPROM!
        53627: 03/03/18: Markus Meng: Re: Cheapest Spartan II/IIE configuration flash EEPROM!
    53665: 03/03/19: Tobias Stumber: Re: Cheapest Spartan II/IIE configuration flash EEPROM!
        53688: 03/03/19: Peter Wallace: Re: Cheapest Spartan II/IIE configuration flash EEPROM!
53621: 03/03/18: Benoit: how to calculate many CRC in FPGA ?
    53648: 03/03/18: john jakson: Re: how to calculate many CRC in FPGA ?
53622: 03/03/18: Jeniffer: Conversion of Xilinx bit file
    53640: 03/03/18: Philip Freidin: Re: Conversion of Xilinx bit file
        53641: 03/03/18: Peter Alfke: Re: Conversion of Xilinx bit file
    53700: 03/03/20: Glen Herrmannsfeldt: Re: Conversion of Xilinx bit file
    53633: 03/03/18: Ray Andraka: Re: Modelsim - FPGA - Simulink integration
53624: 03/03/18: Michael Gauckler: Modelsim - FPGA - Simulink integration
    53639: 03/03/18: Nabeel Shirazi: Re: Modelsim - FPGA - Simulink integration
        54516: 03/04/12: Charles: Re: Modelsim - FPGA - Simulink integration
53625: 03/03/18: newdevkit: usb spartan dev board
53626: 03/03/18: newdevkit: usb spartan prototype
    53628: 03/03/18: Neeraj Varma: Re: usb spartan prototype
    53661: 03/03/19: Theron Hicks: Re: usb spartan prototype
        53702: 03/03/20: dsf: Re: usb spartan prototype
53629: 03/03/18: James Flanagan: Low Power CPLD suggestion request...
    53631: 03/03/18: Peter Alfke: Re: Low Power CPLD suggestion request...
    53637: 03/03/19: Jim Granville: Re: Low Power CPLD suggestion request...
53630: 03/03/18: Apollo: Strict Priority scheduling
    53632: 03/03/18: Patrick Mullarky: Re: Strict Priority scheduling
53643: 03/03/18: Eduardo Wenzel Brićo: Modular Design: FATAL_ERROR
53644: 03/03/18: Prasanth Anbalagan: Implementation error in Xilinx FS 3.1i
53645: 03/03/18: john jakson: Increased Wafer yield by row adjusted placement
    53646: 03/03/19: John Williams: Re: Increased Wafer yield by row adjusted placement
        53701: 03/03/20: Glen Herrmannsfeldt: Re: Increased Wafer yield by row adjusted placement
            53731: 03/03/21: John Williams: Re: Increased Wafer yield by row adjusted placement
    53849: 03/03/25: Achim Gratz: Re: Increased Wafer yield by row adjusted placement
        53861: 03/03/25: john jakson: Re: Increased Wafer yield by row adjusted placement
            53890: 03/03/26: Achim Gratz: Re: Increased Wafer yield by row adjusted placement
                53905: 03/03/26: john jakson: Re: Increased Wafer yield by row adjusted placement
                    53998: 03/03/30: john jakson: Re: Increased Wafer yield by row adjusted placement
53647: 03/03/18: zerang shah: fpga implementation problems
    53649: 03/03/19: Hal Murray: Re: fpga implementation problems
        53692: 03/03/19: Anjan: Re: fpga implementation problems
    53727: 03/03/20: Vishker: Re: fpga implementation problems
        53751: 03/03/21: Robert Myers: Re: fpga implementation problems
53652: 03/03/19: geeko: FPGA specs
    53668: 03/03/19: Alien Zord: Re: FPGA specs
    53677: 03/03/19: Graeme: Re: FPGA specs
        53787: 03/03/23: Andre Powell: Re: FPGA specs
    53874: 03/03/26: rickman: Re: FPGA specs
        53876: 03/03/26: Glen Herrmannsfeldt: Re: FPGA specs
            53886: 03/03/26: Kolja Sulimma: Re: FPGA specs
                53893: 03/03/26: Peter Alfke: Re: FPGA specs
                    53911: 03/03/27: Bernd Paysan: Re: FPGA specs
                    53938: 03/03/27: Kolja Sulimma: Re: FPGA specs
                53934: 03/03/27: Glen Herrmannsfeldt: Re: FPGA specs
53654: 03/03/19: geeko: Excalibur bus functional model
    53720: 03/03/20: Sabrina: Re: Excalibur bus functional model
53656: 03/03/19: Eduardo Wenzel Brićo: NGDBuild: LUT1 Error
53657: 03/03/19: Maxx: spartan-2 clocking problem
    53669: 03/03/19: Falk Brunner: Re: spartan-2 clocking problem
        53696: 03/03/20: Maxx: Re: spartan-2 clocking problem
            53719: 03/03/20: Falk Brunner: Re: spartan-2 clocking problem
53658: 03/03/19: Rene Tschaggelar: Quartus2 : assigning I/O pins
    53660: 03/03/19: James Srinivasan: Re: Quartus2 : assigning I/O pins
    53670: 03/03/19: Prager Roman: Re: Quartus2 : assigning I/O pins
    53676: 03/03/19: Sean: Re: Quartus2 : assigning I/O pins
        53680: 03/03/19: jonno: Re: Quartus2 : assigning I/O pins
        53681: 03/03/19: Prager Roman: Re: Quartus2 : assigning I/O pins
    53682: 03/03/19: gallenm: Re: Quartus2 : assigning I/O pins
        53685: 03/03/20: James Srinivasan: Re: Quartus2 : assigning I/O pins
53662: 03/03/19: adarsh arora: free downloadable VLSI softwares
    53664: 03/03/19: Jonas Otter: Re: free downloadable VLSI softwares
    58068: 03/07/14: a: Re: free downloadable VLSI softwares
        58100: 03/07/14: Ajeetha Kumari: Re: free downloadable VLSI softwares
            58140: 03/07/15: Pedro Claro: Re: free downloadable VLSI softwares
53671: 03/03/19: Koen Van Renterghem: Bit patching of Xilinx VIRTEX-II devicex?
    53679: 03/03/19: Ray Andraka: Re: Bit patching of Xilinx VIRTEX-II devicex?
53673: 03/03/19: CB: Altera ACEX 1K
    53703: 03/03/20: Martin Schoeberl: Re: Altera ACEX 1K
    53728: 03/03/20: Dave Greenfield: Re: Altera ACEX 1K
        53730: 03/03/21: Jim Granville: Re: Altera ACEX 1K
            53732: 03/03/20: Nicholas C. Weaver: Re: Altera ACEX 1K
53674: 03/03/19: Patrick: GCK, GTS and GSR pins on Xilinx XC9500 devices
53675: 03/03/19: roy hansen: Using FPGAs as coprocessors in a PC
    53678: 03/03/19: Ray Andraka: Re: Using FPGAs as coprocessors in a PC
    53687: 03/03/19: Tom Hawkins: Re: Using FPGAs as coprocessors in a PC
        53733: 03/03/20: Fernando: Re: Using FPGAs as coprocessors in a PC
            53750: 03/03/21: Tom Hawkins: Re: Using FPGAs as coprocessors in a PC
                53768: 03/03/22: Glen Herrmannsfeldt: Re: Using FPGAs as coprocessors in a PC
            53759: 03/03/21: James Srinivasan: Re: Using FPGAs as coprocessors in a PC
            53763: 03/03/21: Goran Bilski: Re: Using FPGAs as coprocessors in a PC
    53694: 03/03/20: newb: Re: Using FPGAs as coprocessors in a PC
    53726: 03/03/20: john jakson: Re: Using FPGAs as coprocessors in a PC
    53734: 03/03/20: Michael S: Re: Using FPGAs as coprocessors in a PC
        53735: 03/03/21: Hal Murray: Re: Using FPGAs as coprocessors in a PC
    53752: 03/03/21: Jan Gray: Re: Using FPGAs as coprocessors in a PC
    53786: 03/03/23: roy hansen: Re: Using FPGAs as coprocessors in a PC - findings
        53788: 03/03/23: john jakson: Re: Using FPGAs as coprocessors in a PC - findings
        53792: 03/03/23: Michael S: Re: Using FPGAs as coprocessors in a PC - findings
            53823: 03/03/24: roy hansen: Re: Using FPGAs as coprocessors in a PC - findings
        53799: 03/03/24: Roger Larsson: Re: Using FPGAs as coprocessors in a PC - findings
53686: 03/03/20: Verilog USER: Generic SoundCard Driver/API for FPGA Device
    53689: 03/03/20: Hal Murray: Re: Generic SoundCard Driver/API for FPGA Device
53693: 03/03/20: Austin Franklin: Using DDR placed on the PCB with a Virted II...
    53729: 03/03/20: Austin Franklin: Re: Using DDR placed on the PCB with a Virted II...
        53737: 03/03/21: Bob: Re: Using DDR placed on the PCB with a Virted II...
53698: 03/03/20: praveen: PCI target design
    53709: 03/03/20: Laurent Gauch, Amontec: Re: PCI target design
        53714: 03/03/20: Erik Widding: Re: PCI target design
    53724: 03/03/20: Kevin Brace: Re: PCI target design
53710: 03/03/20: Mauro Fiorini: programmer adapter for Xilinx XC9572
    53739: 03/03/21: Falser Klaus: Re: programmer adapter for Xilinx XC9572
        53742: 03/03/21: Neeraj Varma: Re: programmer adapter for Xilinx XC9572
            53746: 03/03/21: Petter Gustad: Re: programmer adapter for Xilinx XC9572
                53756: 03/03/21: Neeraj Varma: Re: programmer adapter for Xilinx XC9572
53712: 03/03/20: Eduardo Wenzel Brićo: Partial Reconfiguration: The use of BUS MACRO
53713: 03/03/20: JSingh: PrimeTime
    53717: 03/03/20: Neeraj Varma: Re: PrimeTime
        53718: 03/03/20: JSingh: Re: PrimeTime
53715: 03/03/20: Jock: Configuration of data and clock lines on Flex6016
53721: 03/03/20: jools: FPGA choice (UK)
    53722: 03/03/20: Peter Alfke: Re: FPGA choice (UK)
    53723: 03/03/20: MK: Re: FPGA choice (UK)
    53740: 03/03/21: Alex Gibson: Re: FPGA choice (UK)
53736: 03/03/20: Prasanth Anbalagan: Implementation error ?
53738: 03/03/20: Apollo: how do implement the exponential algorithm in fpga?
53741: 03/03/21: Timothée GROS: Glue logic beetween an Xscale PXA250 and PC104 Bus
53743: 03/03/21: Benoit: source code for crc
    53747: 03/03/21: Petter Gustad: Re: source code for crc
    53762: 03/03/21: Ray Andraka: Re: source code for crc
53744: 03/03/21: Apollo: how do implement the exponential algorithm in fpga?
53748: 03/03/21: Bob: FPGA FFT Questions
    53754: 03/03/21: Ray Andraka: Re: FPGA FFT Questions
        53767: 03/03/22: Glen Herrmannsfeldt: Re: FPGA FFT Questions
            53769: 03/03/22: Ray Andraka: Re: FPGA FFT Questions
                53778: 03/03/22: Glen Herrmannsfeldt: Re: FPGA FFT Questions
                    53780: 03/03/22: Ray Andraka: Re: FPGA FFT Questions
                        53801: 03/03/24: Michael S: Re: FPGA FFT Questions
                            53826: 03/03/24: Tom Hawkins: Re: FPGA FFT Questions
                                53836: 03/03/25: Michael S: Re: FPGA FFT Questions
                                    53857: 03/03/25: Tom Hawkins: Re: FPGA FFT Questions
                                        53885: 03/03/26: Michael S: Re: FPGA FFT Questions
                                            53903: 03/03/27: Hal Murray: Re: FPGA FFT Questions
                            53848: 03/03/25: john jakson: Re: FPGA FFT Questions
                        53853: 03/03/25: Bob: Re: FPGA FFT Questions
53749: 03/03/21: Franz Hollerer: EPXA1 Development Kit Getting Started
    53758: 03/03/21: Thomas Siebert: Re: EPXA1 Development Kit Getting Started
        53838: 03/03/25: Franz Hollerer: Re: EPXA1 Development Kit Getting Started
53753: 03/03/21: Buddy Smith: schematics/layouts for basic PCB circuit w/ an FPGA?
    53761: 03/03/21: Spam Hater: Re: schematics/layouts for basic PCB circuit w/ an FPGA?
53755: 03/03/21: Theron Hicks: troubleshooting programming of spartan2e
    53760: 03/03/21: Hal Murray: Re: troubleshooting programming of spartan2e
        53770: 03/03/21: Theron Hicks (Terry): Re: troubleshooting programming of spartan2e
53757: 03/03/21: tom curran: need vhdl sequential divider
53764: 03/03/21: Eduardo Wenzel Brićo: Leonardo Spectrum: Synthesis without optimization
    53784: 03/03/23: TigerMole: Re: Leonardo Spectrum: Synthesis without optimization
53765: 03/03/21: David: Xpower problems - can't load vcd
    53782: 03/03/22: Mike Treseler: Re: Xpower problems - can't load vcd
        53790: 03/03/23: David: Re: Xpower problems - can't load vcd
53771: 03/03/21: Apollo: how do implement the algorithm in verilog?
    53775: 03/03/22: john jakson: Re: how do implement the algorithm in verilog?
        53779: 03/03/22: Ray Andraka: Re: how do implement the algorithm in verilog?
            53783: 03/03/22: Apollo: Re: how do implement the algorithm in verilog?
                53789: 03/03/23: john jakson: Re: how do implement the algorithm in verilog?
53772: 03/03/21: Shridhar Patil: Altera FLEX10K100E voltage?
    53776: 03/03/22: Pete Ormsby: Re: Altera FLEX10K100E voltage?
53773: 03/03/22: Jian Ju: how to implement the bidir in Altera AHDL?
    53777: 03/03/22: Muzaffer Kal: Re: how to implement the bidir in Altera AHDL?
53774: 03/03/22: kryten_droid: Xilinx WebPack 4.2 not compiling code that compiled on 3.3
53781: 03/03/22: Jimmy Zhang: synthesizability question
    53797: 03/03/23: Assaf Sarfati: Re: synthesizability question
    53804: 03/03/24: Martin Euredjian: Re: synthesizability question
        53809: 03/03/24: zhengyu: Re: synthesizability question
            53812: 03/03/24: Martin Euredjian: Re: synthesizability question
53785: 03/03/23: Kang Liat Chuan: Need Advice on using Orcad 9.2 with Xilinx ISE 4.2
53791: 03/03/23: Ken Morrow: Can ModelSim PE/SE and XE coexist?
    53856: 03/03/25: Xilinx FAE from Insight SANKET: Re: Can ModelSim PE/SE and XE coexist?
    53946: 03/03/27: Andy Peters: Re: Can ModelSim PE/SE and XE coexist?
53793: 03/03/23: Prashant: Rake receiver IP core
53794: 03/03/23: ron: Chipscope pro Tools
    53796: 03/03/24: Neeraj Varma: Re: Chipscope pro Tools
53795: 03/03/23: Wilhelm Klink: quartus II error/warning: cannot generate netlist output file -- unsupported port type (std_logic_2d)
53798: 03/03/24: Rainer Schmidt: Difference between static and active partial reconfiguration of Xilinx
    53806: 03/03/24: Peter Alfke: Re: Difference between static and active partial reconfiguration of
53800: 03/03/24: Sean: Quartus-II, how to use a user package
    53835: 03/03/25: Ryan: Re: Quartus-II, how to use a user package
    53850: 03/03/25: Subroto Datta: Re: Quartus-II, how to use a user package
53802: 03/03/24: tote: CLKDLL synthesized with synplify pro
    53817: 03/03/24: Avrum: Re: CLKDLL synthesized with synplify pro
        53834: 03/03/25: tote: Re: CLKDLL synthesized with synplify pro
            53844: 03/03/25: Barry Brown: Re: CLKDLL synthesized with synplify pro
                53977: 03/03/29: <hamish@cloud.net.au>: Re: CLKDLL synthesized with synplify pro
            53852: 03/03/25: Avrum: Re: CLKDLL synthesized with synplify pro
                53952: 03/03/28: tote: Re: CLKDLL synthesized with synplify pro
                    53954: 03/03/28: Ray Andraka: Re: CLKDLL synthesized with synplify pro
53803: 03/03/24: Stefan Schulte: Which Prom for Spartan-II?
53805: 03/03/24: Brendan Lynskey: Xilinx FPGAs available?
    53807: 03/03/24: Uwe Bonnes: Re: Xilinx FPGAs available?
    53808: 03/03/24: Peter Alfke: Re: Xilinx FPGAs available?
        53813: 03/03/24: nospam: Re: Xilinx FPGAs available?
            53820: 03/03/25: Ralph Mason: Re: Xilinx FPGAs available?
        53822: 03/03/24: Peter Alfke: Re: Xilinx FPGAs available?
53814: 03/03/24: Michael Garvie: Permanent Local Damage to FPGA
    53840: 03/03/25: Ray Andraka: Re: Permanent Local Damage to FPGA
        53842: 03/03/25: Michael Garvie: Re: Permanent Local Damage to FPGA
            53845: 03/03/25: <jb@nospam.com>: Re: Permanent Local Damage to FPGA
    53846: 03/03/25: Spam Hater 7: Re: Permanent Local Damage to FPGA
        53855: 03/03/25: Krzysztof Olesiejuk: Re: Permanent Local Damage to FPGA
        53858: 03/03/25: John_H: Re: Permanent Local Damage to FPGA
            53862: 03/03/25: Austin Lesea: How failures happen, and how they don't
                53918: 03/03/27: Michael Garvie: Re: How failures happen, and how they don't
                    53928: 03/03/27: Austin Lesea: Re: How failures happen, and how they don't
                        55417: 03/05/07: Weifeng Xu: Re: How failures happen, and how they don't
                            55419: 03/05/07: Austin Lesea: Re: How failures happen, and how they don't
                                55426: 03/05/07: Weifeng Xu: Re: How failures happen, and how they don't
                                    55432: 03/05/07: Austin Lesea: Re: How failures happen, and how they don't
        53868: 03/03/26: Ray Andraka: Re: Permanent Local Damage to FPGA
            53873: 03/03/26: Hal Murray: Re: Permanent Local Damage to FPGA
    54780: 03/04/17: rk: Re: Permanent Local Damage to FPGA
        54784: 03/04/17: Peter Alfke: Re: Permanent Local Damage to FPGA
            54790: 03/04/18: rk: Re: Permanent Local Damage to FPGA
53815: 03/03/24: Brad Smallridge: Does Xilinx have self-boot option like Cypress?
    53816: 03/03/24: Nicholas C. Weaver: Re: Does Xilinx have self-boot option like Cypress?
        53818: 03/03/24: Brad Smallridge: Re: Does Xilinx have self-boot option like Cypress?
            53819: 03/03/24: Nicholas C. Weaver: Re: Does Xilinx have self-boot option like Cypress?
                53821: 03/03/24: Steve Casselman: Re: Does Xilinx have self-boot option like Cypress?
                    53824: 03/03/24: Nicholas C. Weaver: Re: Does Xilinx have self-boot option like Cypress?
                    53825: 03/03/25: John Williams: Re: Does Xilinx have self-boot option like Cypress?
                        53827: 03/03/24: Nicholas C. Weaver: Re: Does Xilinx have self-boot option like Cypress?
53828: 03/03/24: Austin Lesea: triple des
    53829: 03/03/24: Nicholas C. Weaver: Re: triple des
        53898: 03/03/26: Eric Smith: Re: triple des
            53900: 03/03/26: Nicholas C. Weaver: Re: triple des
    53830: 03/03/25: John Williams: Re: triple des
53831: 03/03/25: ¼Õ±āæµ: where is SMC34c60 similar IP ?
    53899: 03/03/26: Eric Smith: Re: where is SMC34c60 similar IP ?
53833: 03/03/24: Ben Nguyen: Synopsys FPGA Compiler 2 (Altera Edition) question
53837: 03/03/25: Lorenzo Lutti: xst removes useful signals
    53851: 03/03/25: Mike Treseler: Re: xst removes useful signals
    53854: 03/03/25: Xilinx FAE from Insight SANKET: Re: xst removes useful signals
        53859: 03/03/25: Mike Treseler: Re: xst removes useful signals
            53869: 03/03/26: Ray Andraka: Re: xst removes useful signals
            53895: 03/03/26: Lorenzo Lutti: Re: xst removes useful signals
53839: 03/03/25: Franz Hollerer: Altera EPXA1 Development Kit - problems with the GNUPro Insight Debugger
    53841: 03/03/25: Franz Hollerer: Re: Altera EPXA1 Development Kit - problems with the GNUPro Insight
        53894: 03/03/26: Nathan Knight: Re: Altera EPXA1 Development Kit - problems with the GNUPro Insight Debugger
            53910: 03/03/27: Franz Hollerer: Re: Altera EPXA1 Development Kit - problems with the GNUPro Insight
53843: 03/03/25: joan rodo: Programming fpga
    53847: 03/03/25: John_H: Re: Programming fpga
    53863: 03/03/25: Laurent Gauch, Amontec: Re: Programming fpga
    53960: 03/03/28: DFT Specialist: Re: Programming fpga
53860: 03/03/25: Frey: Problems with Altera Max Plus II software
    53879: 03/03/26: Martin Thompson: Re: Problems with Altera Max Plus II software
        53882: 03/03/26: Frey: Re: Problems with Altera Max Plus II software
53864: 03/03/25: Alex Rast: Anyone have difficulty downloading this core?
    53909: 03/03/27: Hans: Re: Anyone have difficulty downloading this core?
        53966: 03/03/28: Alex Rast: Re: Anyone have difficulty downloading this core?
    53967: 03/03/28: Arie de Muynck: Re: Anyone have difficulty downloading this core?
        53970: 03/03/28: Alex Rast: Re: Anyone have difficulty downloading this core?
            53991: 03/03/30: Arie de Muynck: Re: Anyone have difficulty downloading this core?
    54006: 03/03/31: Sam Walton: Re: Anyone have difficulty downloading this core?
    54127: 03/04/02: Rudolf Usselmann: Re: Anyone have difficulty downloading this core?
53865: 03/03/26: John Williams: Microblaze:Timing constraints
    53866: 03/03/26: John Williams: Re: Microblaze:Timing constraints
        53867: 03/03/25: Paulo Dutra: Re: Microblaze:Timing constraints
            53872: 03/03/26: John Williams: Re: Microblaze:Timing constraints
    53870: 03/03/26: Phil Hays: Re: Microblaze:Timing constraints
        53871: 03/03/26: John Williams: Re: Microblaze:Timing constraints
53875: 03/03/26: Lijo: How to avoid this Latch
    53877: 03/03/26: Jens Hildebrandt: Re: How to avoid this Latch
    53878: 03/03/26: Pieter Hulshoff: Re: How to avoid this Latch
    53881: 03/03/26: Anand Ramakrishna: Re: How to avoid this Latch
    53896: 03/03/26: Glen Herrmannsfeldt: Re: How to avoid this Latch
53880: 03/03/26: CSchuster: Translating 2 CLKDLLs for SpartanII architecture
    53907: 03/03/27: sanjay: Re: Translating 2 CLKDLLs for SpartanII architecture
        53913: 03/03/27: Xilinx FAE from Insight SANKET: Re: Translating 2 CLKDLLs for SpartanII architecture
        53916: 03/03/27: CSchuster: Re: Translating 2 CLKDLLs for SpartanII architecture
53883: 03/03/26: Mauro Fiorini: Virtex board schematics
53884: 03/03/26: sderien@liacs.nl: Virtex II pro board design question
    53887: 03/03/26: Marc Randolph: Re: Virtex II pro board design question
        53891: 03/03/26: Theron Hicks: Re: Virtex II pro board design question
            53892: 03/03/26: Nicholas C. Weaver: Re: Virtex II pro board design question
            53914: 03/03/27: Marc Randolph: Re: Virtex II pro board design question
    53889: 03/03/26: Austin Lesea: Re: Virtex II pro board design question
53888: 03/03/26: Taka: Programming algorithm of Altera EPC1
53901: 03/03/26: Eric: xilinx/modelsim simulate a subsystem ?
    53908: 03/03/27: Spam Hater: Re: xilinx/modelsim simulate a subsystem ?
53902: 03/03/27: Wang Xiao-yun: Differential LVPECL Inteface of Spartan IIE
    53906: 03/03/27: sanjay: Re: Differential LVPECL Inteface of Spartan IIE
        53912: 03/03/27: Wang Xiao-yun: Re: Differential LVPECL Inteface of Spartan IIE
            53930: 03/03/27: Xilinx FAE from Insight SANKET: Re: Differential LVPECL Inteface of Spartan IIE
                53931: 03/03/27: Austin Lesea: Re: Differential LVPECL Inteface of Spartan IIE
                    53933: 03/03/28: Jim Granville: Re: Differential LVPECL Inteface of Spartan IIE
                        53939: 03/03/27: Austin Lesea: Re: Differential LVPECL Inteface of Spartan IIE
                            53944: 03/03/28: Wang Xiao-yun: Re: Differential LVPECL Inteface of Spartan IIE
                            53945: 03/03/28: Jim Granville: Re: Differential LVPECL Inteface of Spartan IIE
53904: 03/03/26: wosiqiu: help! How can I make the messages posted in this group be sent to my E-mail box.
53915: 03/03/27: L. Nguyen: SCSI LVDS and VirtexE
53917: 03/03/27: Eduardo Wenzel Brićo: Modular Design: level of module hierarchy
53919: 03/03/27: Eleonore Bereau: constant on Maxplus2
53920: 03/03/27: Eduardo Wenzel Brićo: Modular Design: level of module hierarchy
53921: 03/03/27: Rajeev: Tristate pins + Inputs => External Pullup ?
    53924: 03/03/28: Allan Herriman: Re: Tristate pins + Inputs => External Pullup ?
        54286: 03/04/07: Rajeev: Re: Tristate pins + Inputs => External Pullup ?
    53925: 03/03/27: Peter Alfke: Re: Tristate pins + Inputs => External Pullup ?
        53937: 03/03/27: Tim: Re: Tristate pins + Inputs => External Pullup ?
            53940: 03/03/27: Austin Lesea: Re: Tristate pins + Inputs => External Pullup ?
                53950: 03/03/28: Tim: Re: Tristate pins + Inputs => External Pullup ?
                    53961: 03/03/28: Austin Lesea: Re: Tristate pins + Inputs => External Pullup ?
53922: 03/03/27: ii: DSP-FPGA interface
    53923: 03/03/27: Mike Shonle: Re: DSP-FPGA interface
        53932: 03/03/27: Lorenzo Lutti: Re: DSP-FPGA interface
            54033: 03/03/31: Tony McKay: Re: DSP-FPGA interface
                54063: 03/04/01: Lorenzo Lutti: Re: DSP-FPGA interface
            54070: 03/04/01: Michael S: Re: DSP-FPGA interface
                54099: 03/04/02: Lorenzo Lutti: Re: DSP-FPGA interface
    53951: 03/03/28: Martin Thompson: Re: DSP-FPGA interface
    53981: 03/03/29: Joe: Re: DSP-FPGA interface
    53984: 03/03/29: Mike Treseler: Re: DSP-FPGA interface
53926: 03/03/27: Mohammed Hamed: Can input rate change internal programming ?
53927: 03/03/27: Mohammed Hamed: How can I fix module inputs
    53962: 03/03/28: Spam Hater 7: Re: How can I fix module inputs
        53993: 03/03/30: Mohammed Hamed: Re: How can I fix module inputs
            53994: 03/03/30: Uwe Bonnes: Re: How can I fix module inputs
53929: 03/03/27: Dave Colson: Mixed VHDL and Verilog with Xilinx ISE
    53948: 03/03/27: Kevin Brace: Re: Mixed VHDL and Verilog with Xilinx ISE
        53949: 03/03/27: Kevin Brace: Re: Mixed VHDL and Verilog with Xilinx ISE
            53956: 03/03/28: Dave Colson: Re: Mixed VHDL and Verilog with Xilinx ISE
53941: 03/03/27: Sriram: XILINX FPGA as SUN Sparc coprocessor
    53942: 03/03/28: John Williams: Re: XILINX FPGA as SUN Sparc coprocessor
    53968: 03/03/28: Glen Herrmannsfeldt: Re: XILINX FPGA as SUN Sparc coprocessor
    53973: 03/03/28: john jakson: Re: XILINX FPGA as SUN Sparc coprocessor
53943: 03/03/28: Jan Panteltje: Question about case statement in XilinX webpack
    53947: 03/03/27: Kevin Brace: Re: Question about case statement in XilinX webpack
        53974: 03/03/28: Vikram: Re: Question about case statement in XilinX webpack
            53988: 03/03/30: Jan Panteltje: Re: Question about case statement in XilinX webpack
53953: 03/03/28: Dave Wilson: Leonardo problem
    53965: 03/03/28: Mike Treseler: Re: Leonardo problem
    53972: 03/03/28: Subroto Datta: Re: Leonardo problem
53955: 03/03/28: Joze Dedic: Pin failure detection
    53957: 03/03/28: Gordon Hollingworth: Re: Pin failure detection
        53964: 03/03/28: Joze Dedic: Re: Pin failure detection
            54015: 03/03/31: David Kinsell: Re: Pin failure detection
53958: 03/03/28: Tom Hawkins: Recursion and First Class Components
53959: 03/03/28: CB: Quartus Synthesis
    53963: 03/03/28: Jonathan Bromley: Re: Quartus Synthesis
    53969: 03/03/28: john jakson: Re: Quartus Synthesis
53971: 03/03/28: Matt Ettus: Spartan vs. Cyclone for arithmetic functions
    53976: 03/03/29: Ray Andraka: Re: Spartan vs. Cyclone for arithmetic functions
        53979: 03/03/29: sanjay: Re: Spartan vs. Cyclone for arithmetic functions
            54048: 03/04/01: Paul Leventis (at home): Re: Spartan vs. Cyclone for arithmetic functions
            54057: 03/04/01: Ray Andraka: Re: Spartan vs. Cyclone for arithmetic functions
    53978: 03/03/28: Marc Randolph: Re: Spartan vs. Cyclone for arithmetic functions
        54049: 03/04/01: Paul Leventis (at home): Re: Spartan vs. Cyclone for arithmetic functions
            54071: 03/04/01: Marc Randolph: Re: Spartan vs. Cyclone for arithmetic functions
    54045: 03/04/01: Paul Leventis (at home): Re: Spartan vs. Cyclone for arithmetic functions
        54169: 03/04/03: Matt Ettus: Re: Spartan vs. Cyclone for arithmetic functions
            54171: 03/04/04: Nicholas C. Weaver: Re: Spartan vs. Cyclone for arithmetic functions
                54189: 03/04/04: Peter Wallace: Re: Spartan vs. Cyclone for arithmetic functions
                    54219: 03/04/05: Simon: Re: Spartan vs. Cyclone for arithmetic functions
            54200: 03/04/04: Rajeev: Re: Spartan vs. Cyclone for arithmetic functions
53975: 03/03/28: DeSheng Li: Problems useing ISE4.2
53980: 03/03/29: Muzaffer Kal: microblaze gnu tool info ?
    53999: 03/03/31: John Williams: Re: microblaze gnu tool info ?
        54000: 03/03/31: John Williams: Re: microblaze gnu tool info ?
        54007: 03/03/31: Muzaffer Kal: Re: microblaze gnu tool info ?
        54023: 03/03/31: Petter Gustad: Re: microblaze gnu tool info ?
            54030: 03/03/31: Steve Lass: Re: microblaze gnu tool info ?
53982: 03/03/29: Jan Panteltje: More xilinx webpack verilog questions: always @(clock) legal?
    53983: 03/03/29: Stan Zaborowski: Re: More xilinx webpack verilog questions: always @(clock) legal?
        53986: 03/03/30: Jan Panteltje: Re: More xilinx webpack verilog questions: always @(clock) legal?
    53985: 03/03/29: Bob Perlman: Re: More xilinx webpack verilog questions: always @(clock) legal?
        53987: 03/03/30: Jan Panteltje: Re: More xilinx webpack verilog questions: always @(clock) legal?
            53989: 03/03/30: Bob Perlman: Re: More xilinx webpack verilog questions: always @(clock) legal?
    54036: 03/03/31: Andy Peters: Re: More xilinx webpack verilog questions: always @(clock) legal?
        54064: 03/04/01: Steven Sharp: Re: More xilinx webpack verilog questions: always @(clock) legal?
53990: 03/03/30: Garrett Mace: [Question] FPGA/PLX9054
    53995: 03/03/30: Peter Wallace: Re: [Question] FPGA/PLX9054
        53997: 03/03/30: Garrett Mace: Re: [Question] FPGA/PLX9054
    54035: 03/03/31: Andy Peters: Re: [Question] FPGA/PLX9054
        54047: 03/03/31: Garrett Mace: Re: [Question] FPGA/PLX9054
            54058: 03/04/01: Garrett Mace: Re: [Question] FPGA/PLX9054
                54059: 03/04/01: Garrett Mace: Re: [Question] FPGA/PLX9054
        54054: 03/04/01: Michael S: Re: [Question] FPGA/PLX9054
            54061: 03/04/01: Andy Peters: Re: [Question] FPGA/PLX9054
                54068: 03/04/01: Michael S: Re: [Question] FPGA/PLX9054
                    54096: 03/04/02: Garrett Mace: Re: [Question] FPGA/PLX9054
                        54109: 03/04/02: Peter C. Wallace: Re: [Question] FPGA/PLX9054
                    54111: 03/04/02: Carter Buck: Re: [Question] FPGA/PLX9054
                        54120: 03/04/02: Garrett Mace: Re: [Question] FPGA/PLX9054
53992: 03/03/30: Arie de Muynck: Re: Anyone have difficulty downloading this core?
53996: 03/03/30: Prasanth Anbalagan: Help reg Target device & synthesis
    54012: 03/03/31: Laurent Gauch, Amontec: Re: Help reg Target device & synthesis
54001: 03/03/31: Khim Bittle: $4000 FPGAs
    54002: 03/03/30: Jerry: Re: $4000 FPGAs
    54003: 03/03/31: Phil Hays: Re: $4000 FPGAs
        54010: 03/03/31: Mike Harrison: Re: $4000 FPGAs
    54004: 03/03/31: Hal Murray: Re: $4000 FPGAs
    54005: 03/03/30: john jakson: Re: $4000 FPGAs
    54014: 03/03/31: B. Joshua Rosen: Re: $4000 FPGAs
        54019: 03/03/31: Austin Lesea: Xilinx announces 90nm sampling today!
            54020: 03/03/31: Nicholas C. Weaver: Re: Xilinx announces 90nm sampling today!
                54022: 03/03/31: Austin Lesea: Re: Xilinx announces 90nm sampling today!
                    54028: 03/03/31: Nicholas C. Weaver: Re: Xilinx announces 90nm sampling today!
                    54034: 03/03/31: raymund hofmann: Re: Xilinx announces 90nm sampling today!
                        54038: 03/03/31: Austin Lesea: Re: Xilinx announces 90nm sampling today!
                            54040: 03/04/01: Jim Granville: Re: Xilinx announces 90nm sampling today!
                            55861: 03/05/22: Xanatos: Re: Xilinx announces 90nm sampling today!
                    54133: 03/04/03: Rudolf Usselmann: Re: Xilinx announces 90nm sampling today!
                    54170: 03/04/03: Ljubisa Bajic: Re: Xilinx announces 90nm sampling today!
                        54211: 03/04/04: Peter Alfke: Re: Xilinx announces 90nm sampling today!
                            54225: 03/04/04: Ljubisa Bajic: Re: Xilinx announces 90nm sampling today!
                                54256: 03/04/06: Michael S: Re: Xilinx announces 90nm sampling today!
                            54232: 03/04/05: Hal Murray: Re: Xilinx announces 90nm sampling today!
                                54240: 03/04/05: Rudolf Usselmann: Re: Xilinx announces 90nm sampling today!
                                    54241: 03/04/05: Nicholas C. Weaver: Re: Xilinx announces 90nm sampling today!
                                        54255: 03/04/06: Rudolf Usselmann: Re: Xilinx announces 90nm sampling today!
                            54233: 03/04/05: Rudolf Usselmann: Re: Xilinx announces 90nm sampling today!
            54025: 03/03/31: Tim: Re: Xilinx announces 90nm sampling today!
                54027: 03/03/31: Austin Lesea: Re: Xilinx announces 90nm sampling today!
                    54062: 03/04/01: Kolja Sulimma: Re: Xilinx announces 90nm sampling today!
                    54212: 03/04/05: Tim: Re: Xilinx announces 90nm sampling today!
                        54215: 03/04/04: Austin Lesea: Re: Xilinx announces 90nm sampling today!
                            54217: 03/04/05: Larry Doolittle: Re: Xilinx announces 90nm sampling today!
                                54221: 03/04/04: Peter Alfke: Re: Xilinx announces 90nm sampling today!
                                    54222: 03/04/05: Larry Doolittle: Re: Xilinx announces 90nm sampling today!
                                        54224: 03/04/05: Simon: Re: Xilinx announces 90nm sampling today!
                                            54226: 03/04/05: Larry Doolittle: Re: Xilinx announces 90nm sampling today!
                                        54228: 03/04/05: Hal Murray: Re: Xilinx announces 90nm sampling today!
                                            54274: 03/04/07: Uwe Bonnes: Re: Xilinx announces 90nm sampling today!
                                                55742: 03/05/18: Marius Vollmer: Re: Xilinx announces 90nm sampling today!
                                                    55880: 03/05/22: Austin Lesea: Re: Xilinx announces 90nm sampling today!
    54130: 03/04/02: Rudolf Usselmann: Re: $4000 FPGAs
    54398: 03/04/10: Thomas Stanka: Re: $4000 FPGAs
        54407: 03/04/10: Paul Leventis: Re: $4000 FPGAs
            54411: 03/04/10: Austin Lesea: Balanced Presentation
                54434: 03/04/10: Hal Murray: Re: Balanced Presentation
                    54442: 03/04/10: Larry Doolittle: Re: Balanced Presentation
                        54445: 03/04/10: John_H: Re: Balanced Presentation
            54423: 03/04/10: Neeraj Varma: Re: $4000 FPGAs
54008: 03/03/31: Florian-Wolfgang Stock: JBits & Tristate
    54887: 03/04/21: Weifeng Xu: Re: JBits & Tristate
54009: 03/03/31: Michael Nicklas: ModelSIM XE wave files
    54011: 03/03/31: Laurent Gauch, Amontec: Re: ModelSIM XE wave files
        54016: 03/03/31: Michael Nicklas: Re: ModelSIM XE wave files
    54018: 03/03/31: Michael Rhotert: Re: ModelSIM XE wave files
    54029: 03/03/31: Kevin Neilson: Re: ModelSIM XE wave files
        54055: 03/04/01: Michael Nicklas: Re: ModelSIM XE wave files
    54031: 03/04/01: kero: Re: ModelSIM XE wave files
54013: 03/03/31: Andreas Wortmann: connecting 2 FPGAs
    54017: 03/03/31: Uwe Bonnes: Re: connecting 2 FPGAs
    54021: 03/03/31: Theron Hicks: Re: connecting 2 FPGAs
    54032: 03/03/31: John_H: Re: connecting 2 FPGAs
54024: 03/03/31: Martin Euredjian: uP interface question
    54053: 03/04/01: Jonathan Bromley: Re: uP interface question
        54081: 03/04/02: Martin Euredjian: Re: uP interface question
            54098: 03/04/02: Jonathan Bromley: Re: uP interface question
                54102: 03/04/02: Martin Euredjian: Re: uP interface question
                    54105: 03/04/02: Mike Treseler: Re: uP interface question
                    54135: 03/04/03: Jonathan Bromley: Re: uP interface question
                        54137: 03/04/03: Martin Euredjian: Re: uP interface question
                            54141: 03/04/03: Jonathan Bromley: Re: uP interface question
                                54145: 03/04/03: nospam: Re: uP interface question
                                    54150: 03/04/03: Austin Lesea: Re: uP interface question
                                        54162: 03/04/03: Eric Smith: Re: uP interface question
                        54689: 03/04/16: louis: Re: uP interface question
                54107: 03/04/02: Nial Stewart: Re: uP interface question
54026: 03/03/31: Charles Barnes: Input Characteristics : HCMOS vs TTL
    54037: 03/04/01: Gregory C. Read: Re: Input Characteristics : HCMOS vs TTL
        54043: 03/03/31: Theron Hicks (Terry): Re: Input Characteristics : HCMOS vs TTL
            54044: 03/04/01: Bob Perlman: Re: Input Characteristics : HCMOS vs TTL
54039: 03/03/31: Jerry: What would it take?
    54041: 03/04/01: Jim Granville: Re: What would it take?
    54042: 03/03/31: Robert Finch: Re: What would it take?
        54046: 03/03/31: Jerry: Re: What would it take?
            54050: 03/04/01: Paul Leventis (at home): Re: What would it take?
            54051: 03/04/01: Jim Granville: Re: What would it take?
                54052: 03/04/01: Robert Finch: Re: What would it take?
                    54072: 03/04/01: Jerry: Re: What would it take?
                        54074: 03/04/02: Steve Casselman: Re: What would it take?
                            54085: 03/04/02: john jakson: Re: What would it take?


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