Site Home   Archive Home   FAQ Home   How to search the Archive   How to Navigate the Archive   
Compare FPGA features and resources   

Threads starting:
1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015Jan2015

Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Custom Search

Threads Starting Mar 2010

145944: 10/03/01: -jg: Spice simulation of IBIS details - model examples
    145946: 10/03/01: Jared Casper: Re: Spice simulation of IBIS details - model examples
        145968: 10/03/02: Kim Enkovaara: Re: Spice simulation of IBIS details - model examples
    145947: 10/03/01: -jg: Re: Spice simulation of IBIS details - model examples
    145956: 10/03/01: rickman: Re: Spice simulation of IBIS details - model examples
    145957: 10/03/01: -jg: Re: Spice simulation of IBIS details - model examples
    145958: 10/03/01: rickman: Re: Spice simulation of IBIS details - model examples
    145960: 10/03/01: -jg: Re: Spice simulation of IBIS details - model examples
    145962: 10/03/01: rickman: Re: Spice simulation of IBIS details - model examples
    145963: 10/03/01: -jg: Re: Spice simulation of IBIS details - model examples
    145972: 10/03/02: rickman: Re: Spice simulation of IBIS details - model examples
    145991: 10/03/02: -jg: Re: Spice simulation of IBIS details - model examples
145951: 10/03/01: timinganalyzer: Re: free waveform drawing tool
145959: 10/03/01: fpgabuilder: LVDS i/o in a SystemVerilog Interface block
    145964: 10/03/02: Jonathan Bromley: Re: LVDS i/o in a SystemVerilog Interface block
    145980: 10/03/02: fpgabuilder: Re: LVDS i/o in a SystemVerilog Interface block
145961: 10/03/01: Shant: Need support for differential 1.2V IOStandard on Virtex-6
145966: 10/03/02: digitaljanitor: Help with avoiding ground-loops on my PCB+external
    145971: 10/03/02: rickman: Re: Help with avoiding ground-loops on my PCB+external
        145981: 10/03/02: Tim Wescott: Re: Help with avoiding ground-loops on my PCB+external
    145973: 10/03/03: Joe G (Home): Re: Help with avoiding ground-loops on my PCB+external
    145974: 10/03/02: petrus bitbyter: Re: Help with avoiding ground-loops on my PCB+external
    145982: 10/03/02: Tim Wescott: Re: Help with avoiding ground-loops on my PCB+external
    145983: 10/03/02: Joerg: Re: Help with avoiding ground-loops on my PCB+external
    145984: 10/03/02: Tim Wescott: Re: Help with avoiding ground-loops on my PCB+external
145969: 10/03/02: Symon: Tabula. (FPGA start up)
    145970: 10/03/02: Jonathan Bromley: Re: Tabula. (FPGA start up)
        145979: 10/03/02: austin: Re: Tabula. (FPGA start up)
            145993: 10/03/02: Jonathan Bromley: Re: Tabula. (FPGA start up)
                146069: 10/03/05: Symon: Re: Tabula. (FPGA start up)
                    146079: 10/03/05: Jonathan Bromley: Re: Tabula. (FPGA start up)
                        146082: 10/03/05: Symon: Re: Tabula. (FPGA start up)
                146230: 10/03/09: Symon: Re: Tabula. (FPGA start up)
            146070: 10/03/05: Symon: Re: Tabula. (FPGA start up)
        145992: 10/03/02: Eric Smith: Re: Tabula. (FPGA start up)
        146026: 10/03/04: Eric Smith: Re: Tabula. (FPGA start up)
        146062: 10/03/04: rickman: Re: Tabula. (FPGA start up)
        146105: 10/03/05: rickman: Re: Tabula. (FPGA start up)
    145994: 10/03/02: jacko: Re: Tabula. (FPGA start up)
    145995: 10/03/02: -jg: Re: Tabula. (FPGA start up)
        146065: 10/03/04: rickman: Re: Tabula. (FPGA start up)
        146087: 10/03/05: Raymund Hofmann: Re: Tabula. (FPGA start up)
    146000: 10/03/02: -jg: Re: Tabula. (FPGA start up)
        146066: 10/03/04: rickman: Re: Tabula. (FPGA start up)
        146068: 10/03/04: -jg: Re: Tabula. (FPGA start up)
        146204: 10/03/08: Jon Elson: Re: Tabula. (FPGA start up)
            146288: 10/03/10: Jon Elson: Re: Tabula. (FPGA start up)
            146289: 10/03/10: Jon Elson: Re: Tabula. (FPGA start up)
        146206: 10/03/08: -jg: Re: Tabula. (FPGA start up)
        146209: 10/03/08: rickman: Re: Tabula. (FPGA start up)
        146296: 10/03/10: John_H: Re: Tabula. (FPGA start up)
    146437: 10/03/18: -jg: Re: Tabula. (FPGA start up)
145975: 10/03/02: Nial Stewart: Antti....
    146040: 10/03/04: Antti: Re: Antti....
145996: 10/03/02: Mike Santarini: Xcell Journal Issue 70: FPGAs in the TV Broadcast market
146001: 10/03/03: Pete Fraser: Modelsim PE vs. Aldec Active-HDL (PE)
    146002: 10/03/03: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146004: 10/03/03: Dave: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146011: 10/03/03: Rob Gaddi: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146012: 10/03/03: cfelton: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146018: 10/03/03: d_s_klein: Re: Modelsim PE vs. Aldec Active-HDL (PE)
        146022: 10/03/04: HT-Lab: Re: Modelsim PE vs. Aldec Active-HDL (PE)
        146083: 10/03/05: Martin Thompson: Re: Modelsim PE vs. Aldec Active-HDL (PE)
            146089: 10/03/05: Petter Gustad: Re: Modelsim PE vs. Aldec Active-HDL (PE)
            146148: 10/03/07: Brian Drummond: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                146168: 10/03/07: Brian Drummond: Re: Modelsim PE vs. Aldec Active-HDL (PE)
            146195: 10/03/08: Martin Thompson: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                146218: 10/03/09: Petter Gustad: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                    146251: 10/03/10: glen herrmannsfeldt: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                    146514: 10/03/21: Petter Gustad: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                        146529: 10/03/22: Petter Gustad: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                146220: 10/03/09: Martin Thompson: Re: Modelsim PE vs. Aldec Active-HDL (PE)
                146221: 10/03/09: Nial Stewart: Re: Modelsim PE vs. Aldec Active-HDL (PE)
            146196: 10/03/08: Martin Thompson: Re: Modelsim PE vs. Aldec Active-HDL (PE)
        146964: 10/04/05: Anssi Saari: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146021: 10/03/03: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146029: 10/03/04: Raymund Hofmann: Re: Modelsim PE vs. Aldec Active-HDL (PE)
        146030: 10/03/04: cfelton: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146032: 10/03/04: d_s_klein: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146034: 10/03/04: Nick: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146046: 10/03/04: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146048: 10/03/04: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146084: 10/03/05: Dave: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146102: 10/03/05: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146117: 10/03/05: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146133: 10/03/06: KJ: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146134: 10/03/06: KJ: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146153: 10/03/06: KJ: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146205: 10/03/08: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146207: 10/03/08: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146208: 10/03/08: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146210: 10/03/08: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146214: 10/03/08: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146235: 10/03/09: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146236: 10/03/09: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146239: 10/03/09: Andy Peters: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146250: 10/03/09: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
    146515: 10/03/21: rickman: Re: Modelsim PE vs. Aldec Active-HDL (PE)
146003: 10/03/03: Pete Fraser: Laptop for FPGA design?
    146006: 10/03/03: John_H: Re: Laptop for FPGA design?
    146007: 10/03/03: General Schvantzkoph: Re: Laptop for FPGA design?
    146008: 10/03/03: emeb: Re: Laptop for FPGA design?
        146015: 10/03/03: Jason Thibodeau: Re: Laptop for FPGA design?
            146017: 10/03/03: Pete Fraser: Re: Laptop for FPGA design?
        146072: 10/03/05: mac: Re: Laptop for FPGA design?
    146020: 10/03/03: rickman: Re: Laptop for FPGA design?
    146025: 10/03/04: =?ISO-8859-2?Q?Adam_G=F3rski?=: Re: Laptop for FPGA design?
        146088: 10/03/05: =?ISO-8859-1?Q?Adam_G=F3rski?=: Re: Laptop for FPGA design?
            146121: 10/03/06: HT-Lab: Re: Laptop for FPGA design?
    146028: 10/03/04: kkoorndyk: Re: Laptop for FPGA design?
    146061: 10/03/04: rickman: Re: Laptop for FPGA design?
    146096: 10/03/05: rickman: Re: Laptop for FPGA design?
    146098: 10/03/05: rickman: Re: Laptop for FPGA design?
    146132: 10/03/06: John Adair: Re: Laptop for FPGA design?
    146140: 10/03/06: Michael S: Re: Laptop for FPGA design?
    146141: 10/03/06: Michael S: Re: Laptop for FPGA design?
    146164: 10/03/07: John Adair: Re: Laptop for FPGA design?
    146172: 10/03/07: Michael S: Re: Laptop for FPGA design?
    146174: 10/03/07: General Schvantzkoph: Re: Laptop for FPGA design?
    146178: 10/03/07: Michael S: Re: Laptop for FPGA design?
    146179: 10/03/07: General Schvantzkoph: Re: Laptop for FPGA design?
146009: 10/03/03: Hunter: Xilinx IOBUF - operation Q (virtex4 chip)
    146010: 10/03/03: maxascent: Re: Xilinx IOBUF - operation Q (virtex4 chip)
    146014: 10/03/03: Ed McGettigan: Re: Xilinx IOBUF - operation Q (virtex4 chip)
146013: 10/03/03: Giorgos Tzampanakis: Using bidirectional pins in Verilog
    146016: 10/03/03: Gabor: Re: Using bidirectional pins in Verilog
146023: 10/03/04: Nial Stewart: Announce: 1 Pin Interface - FPGA and HW debug tool
    146024: 10/03/04: Nial Stewart: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146031: 10/03/04: emeb: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
            146033: 10/03/04: Nial Stewart: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
                146053: 10/03/04: Nial Stewart: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
                    146076: 10/03/05: whygee: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
                    146080: 10/03/05: Nial Stewart: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
                146055: 10/03/04: Nial Stewart: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146039: 10/03/04: emeb: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146042: 10/03/04: -jg: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146058: 10/03/04: -jg: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146059: 10/03/04: -jg: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146060: 10/03/04: NialS: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146063: 10/03/04: -jg: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146064: 10/03/04: NialS: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146067: 10/03/04: -jg: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
        146075: 10/03/04: -jg: Re: Announce: 1 Pin Interface - FPGA and HW debug tool
146027: 10/03/04: Kastil Jan: Ethernet development kit
    146037: 10/03/04: austin: Re: Ethernet development kit
    146038: 10/03/04: d_s_klein: Re: Ethernet development kit
    146047: 10/03/04: vanepp: Re: Ethernet development kit
    146131: 10/03/06: John Adair: Re: Ethernet development kit
    147437: 10/04/27: pini_45: Re: Ethernet development kit
    147438: 10/04/27: pini_45: Re: Ethernet development kit
146041: 10/03/04: Antti: Actel is now the only FPGA vendor with hard-core processor in the
    146044: 10/03/04: -jg: Re: Actel is now the only FPGA vendor with hard-core processor in the
    146049: 10/03/04: Andy Peters: Re: Actel is now the only FPGA vendor with hard-core processor in the
    146052: 10/03/04: -jg: Re: Actel is now the only FPGA vendor with hard-core processor in the
    146081: 10/03/05: Antti: Re: Actel is now the only FPGA vendor with hard-core processor in the
    146107: 10/03/05: rickman: Re: Actel is now the only FPGA vendor with hard-core processor in the
    146118: 10/03/05: -jg: Re: Actel is now the only FPGA vendor with hard-core processor in the
    146158: 10/03/06: radarman: Re: Actel is now the only FPGA vendor with hard-core processor in the
146051: 10/03/04: Jason Thibodeau: Looking for a USB JTAG cable
    146128: 10/03/06: John Adair: Re: Looking for a USB JTAG cable
    146191: 10/03/07: GrizzlySteve: Re: Looking for a USB JTAG cable
146073: 10/03/05: Giorgos Tzampanakis: Is an inout reg allowed
    146078: 10/03/05: Jonathan Bromley: Re: Is an inout reg allowed
        146109: 10/03/05: Jonathan Bromley: Re: Is an inout reg allowed
        146110: 10/03/05: Anssi Saari: Re: Is an inout reg allowed
    146106: 10/03/05: Nathan Bialke: Re: Is an inout reg allowed
146085: 10/03/05: de4: FSM in BlockRAM
    146086: 10/03/05: Symon: Re: FSM in BlockRAM
        146093: 10/03/05: Symon: Re: FSM in BlockRAM
        146113: 10/03/05: glen herrmannsfeldt: Re: FSM in BlockRAM
            146123: 10/03/06: whygee: Re: FSM in BlockRAM
            146142: 10/03/06: glen herrmannsfeldt: Re: FSM in BlockRAM
    146092: 10/03/05: Antti: Re: FSM in BlockRAM
    146094: 10/03/05: Andy Peters: Re: FSM in BlockRAM
    146100: 10/03/05: Peter Alfke: Re: FSM in BlockRAM
    146116: 10/03/05: Peter Alfke: Re: FSM in BlockRAM
    146135: 10/03/06: Peter Alfke: Re: FSM in BlockRAM
    146137: 10/03/06: -jg: Re: FSM in BlockRAM
    146138: 10/03/06: Antti: Re: FSM in BlockRAM
    146146: 10/03/06: -jg: Re: FSM in BlockRAM
146090: 10/03/05: Maurice Branson: Display Control Application Using Spartan FPGA
    146091: 10/03/05: Gabor: Re: Display Control Application Using Spartan FPGA
    146108: 10/03/05: rickman: Re: Display Control Application Using Spartan FPGA
    146120: 10/03/05: Raymund Hofmann: Re: Display Control Application Using Spartan FPGA
    146130: 10/03/06: John Adair: Re: Display Control Application Using Spartan FPGA
146163: 10/03/07: Frank: Question in verilog testbench
    146165: 10/03/07: Jon Beniston: Re: Question in verilog testbench
    146166: 10/03/07: Jonathan Bromley: Re: Question in verilog testbench
    146171: 10/03/07: Frank: Re: Question in verilog testbench
146170: 10/03/07: Andrew Holme: Spartan 3 minimum clock pulse width
    146173: 10/03/07: Nico Coesel: Re: Spartan 3 minimum clock pulse width
146197: 10/03/08: pinkisntwell: Using the SignalTap Logic Analyzer
    146202: 10/03/08: fpgabuilder: Re: Using the SignalTap Logic Analyzer
146198: 10/03/08: Pete Fraser: Some Active-HDL questions
    146199: 10/03/08: Muzaffer Kal: Re: Some Active-HDL questions
    146200: 10/03/08: Alan Fitch: Re: Some Active-HDL questions
    146201: 10/03/08: Charles Gardiner: Re: Some Active-HDL questions
        146211: 10/03/08: Pete Fraser: Re: Some Active-HDL questions
            146252: 10/03/10: Magne Munkejord: Re: Some Active-HDL questions
                146253: 10/03/10: Magne Munkejord: Re: Some Active-HDL questions
                146301: 10/03/11: Nial Stewart: Re: Some Active-HDL questions
            146254: 10/03/10: Nial Stewart: Re: Some Active-HDL questions
                146255: 10/03/10: Jonathan Bromley: Re: Some Active-HDL questions
                    146257: 10/03/10: Nial Stewart: Re: Some Active-HDL questions
                        146258: 10/03/10: Jonathan Bromley: Re: Some Active-HDL questions
                        146259: 10/03/10: Alan Fitch: Re: Some Active-HDL questions
    146215: 10/03/08: rickman: Re: Some Active-HDL questions
    146238: 10/03/09: Andy Peters: Re: Some Active-HDL questions
    146241: 10/03/09: rickman: Re: Some Active-HDL questions
    146262: 10/03/10: rickman: Re: Some Active-HDL questions
146216: 10/03/08: Weng Tianxiang: Why doesn't this situation generate a latch?
    146217: 10/03/08: Ed McGettigan: Re: Why doesn't this situation generate a latch?
    146219: 10/03/09: Tricky: Re: Why doesn't this situation generate a latch?
        146274: 10/03/10: glen herrmannsfeldt: Re: Why doesn't this situation generate a latch?
            146278: 10/03/10: glen herrmannsfeldt: Re: Why doesn't this situation generate a latch?
            146302: 10/03/11: Martin Thompson: Re: Why doesn't this situation generate a latch?
    146224: 10/03/09: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
    146226: 10/03/09: Ed McGettigan: Re: Why doesn't this situation generate a latch?
    146229: 10/03/09: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
    146265: 10/03/10: Andy: Re: Why doesn't this situation generate a latch?
    146266: 10/03/10: Andy: Re: Why doesn't this situation generate a latch?
    146272: 10/03/10: Peter Alfke: Re: Why doesn't this situation generate a latch?
    146276: 10/03/10: Peter Alfke: Re: Why doesn't this situation generate a latch?
    146280: 10/03/10: Peter Alfke: Re: Why doesn't this situation generate a latch?
146237: 10/03/09: lusch: Spartan3AN DDR2 - bad writing zeros
    146243: 10/03/09: Gabor: Re: Spartan3AN DDR2 - bad writing zeros
    146249: 10/03/09: lusch: Re: Spartan3AN DDR2 - bad writing zeros
    146256: 10/03/10: Nial Stewart: Re: Spartan3AN DDR2 - bad writing zeros
        146284: 10/03/10: Nico Coesel: Re: Spartan3AN DDR2 - bad writing zeros
        146300: 10/03/11: Nial Stewart: Re: Spartan3AN DDR2 - bad writing zeros
    146282: 10/03/10: lusch: Re: Spartan3AN DDR2 - bad writing zeros
    146285: 10/03/10: Ed McGettigan: Re: Spartan3AN DDR2 - bad writing zeros
146260: 10/03/10: Pallavi: Translate Error: ngd build 604
    146287: 10/03/10: Alan Fitch: Re: Translate Error: ngd build 604
        146340: 10/03/12: Pallavi: Re: Translate Error: ngd build 604
            146341: 10/03/13: Alan Fitch: Re: Translate Error: ngd build 604
146261: 10/03/10: Tier Logic: Tier Logic introduces the world's first 3D FPGA
    146263: 10/03/10: austin: Re: Tier Logic introduces the world's first 3D FPGA
        146297: 10/03/11: Kim Enkovaara: Re: Tier Logic introduces the world's first 3D FPGA
    146264: 10/03/10: Antti: Re: Tier Logic introduces the world's first 3D FPGA
    146267: 10/03/10: John_H: Re: Tier Logic introduces the world's first 3D FPGA
        146312: 10/03/11: Nico Coesel: Re: Tier Logic introduces the world's first 3D FPGA
    146268: 10/03/10: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146270: 10/03/10: Symon: Re: Tier Logic introduces the world's first 3D FPGA
        146273: 10/03/10: Josh Model: Re: Tier Logic introduces the world's first 3D FPGA
        146298: 10/03/11: Kim Enkovaara: Re: Tier Logic introduces the world's first 3D FPGA
            146327: 10/03/12: Kim Enkovaara: Re: Tier Logic introduces the world's first 3D FPGA
    146275: 10/03/10: -jg: Re: Tier Logic introduces the world's first 3D FPGA
    146277: 10/03/10: -jg: Re: Tier Logic introduces the world's first 3D FPGA
    146279: 10/03/10: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146281: 10/03/10: -jg: Re: Tier Logic introduces the world's first 3D FPGA
    146283: 10/03/10: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146286: 10/03/10: -jg: Re: Tier Logic introduces the world's first 3D FPGA
    146299: 10/03/10: Tier Logic: Re: Tier Logic introduces the world's first 3D FPGA
    146303: 10/03/11: John_H: Re: Tier Logic introduces the world's first 3D FPGA
    146304: 10/03/11: John_H: Re: Tier Logic introduces the world's first 3D FPGA
    146308: 10/03/11: austin: Re: Tier Logic introduces the world's first 3D FPGA
    146313: 10/03/11: -jg: Re: Tier Logic introduces the world's first 3D FPGA
    146339: 10/03/12: Peter Alfke: Re: Tier Logic introduces the world's first 3D FPGA
    146342: 10/03/12: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146343: 10/03/12: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146344: 10/03/12: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146352: 10/03/13: Raymund Hofmann: Re: Tier Logic introduces the world's first 3D FPGA
    146384: 10/03/15: Andy Peters: Re: Tier Logic introduces the world's first 3D FPGA
    146387: 10/03/15: rickman: Re: Tier Logic introduces the world's first 3D FPGA
146269: 10/03/10: Ed McGettigan: Re: Why doesn't this situation generate a latch?
    146380: 10/03/15: Magne Munkejord: Re: Why doesn't this situation generate a latch?
        146401: 10/03/16: Magne Munkejord: Re: Why doesn't this situation generate a latch?
            146420: 10/03/17: Magne Munkejord: Re: Why doesn't this situation generate a latch?
146290: 10/03/10: TudaPellini: Xilinx ISE Webpack Schematics
    146334: 10/03/12: d_s_klein: Re: Xilinx ISE Webpack Schematics
146291: 10/03/10: Andy: Re: Why doesn't this situation generate a latch?
146292: 10/03/10: Ed McGettigan: Re: Why doesn't this situation generate a latch?
146293: 10/03/10: -jg: Re: Why doesn't this situation generate a latch?
146294: 10/03/10: Ed McGettigan: Re: Why doesn't this situation generate a latch?
146295: 10/03/10: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
146305: 10/03/11: General Schvantzkoph: Compiling a design in Quartus that doesn't fit
    146306: 10/03/11: Nial Stewart: Re: Compiling a design in Quartus that doesn't fit
    146309: 10/03/11: General Schvantzkoph: Re: Compiling a design in Quartus that doesn't fit
146307: 10/03/11: vineeth sukumaran: fastest multiplier for dsps
146310: 10/03/11: Andy: Re: Why doesn't this situation generate a latch?
146311: 10/03/11: Andy: Re: Why doesn't this situation generate a latch?
146314: 10/03/11: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
146315: 10/03/11: Andy: Re: Why doesn't this situation generate a latch?
146316: 10/03/11: Tier Logic: Re: Tier Logic introduces the world's first 3D FPGA
    146317: 10/03/11: whygee: Re: Tier Logic introduces the world's first 3D FPGA
        146322: 10/03/11: whygee: Re: Tier Logic introduces the world's first 3D FPGA
        146349: 10/03/13: whygee: Re: Tier Logic introduces the world's first 3D FPGA
            146359: 10/03/14: whygee: Re: Tier Logic introduces the world's first 3D FPGA
                146366: 10/03/14: Brian Drummond: Re: Tier Logic introduces the world's first 3D FPGA
            146367: 10/03/14: Jeff Cunningham: Re: Tier Logic introduces the world's first 3D FPGA
        146350: 10/03/13: whygee: Re: Tier Logic introduces the world's first 3D FPGA
        146358: 10/03/14: Uwe Bonnes: Re: Tier Logic introduces the world's first 3D FPGA
            146365: 10/03/14: whygee: Re: Tier Logic introduces the world's first 3D FPGA
            146372: 10/03/15: whygee: Re: Tier Logic introduces the world's first 3D FPGA
    146362: 10/03/14: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146364: 10/03/14: -jg: Re: Tier Logic introduces the world's first 3D FPGA
    146370: 10/03/14: rickman: Re: Tier Logic introduces the world's first 3D FPGA
    146381: 10/03/15: Rob Gaddi: Re: Tier Logic introduces the world's first 3D FPGA
    146386: 10/03/15: rickman: Re: Tier Logic introduces the world's first 3D FPGA
146318: 10/03/11: Raymund Hofmann: Re: Tier Logic introduces the world's first 3D FPGA
146319: 10/03/11: Peter Alfke: Re: Tier Logic introduces the world's first 3D FPGA
146320: 10/03/11: -jg: Re: Tier Logic introduces the world's first 3D FPGA
146321: 10/03/11: -jg: Re: Tier Logic introduces the world's first 3D FPGA
146323: 10/03/12: Marcus: Comparing FPGA with ASIC implementations
    146324: 10/03/11: Rob Gaddi: Re: Comparing FPGA with ASIC implementations
    146325: 10/03/12: glen herrmannsfeldt: Re: Comparing FPGA with ASIC implementations
        146351: 10/03/13: Jon Beniston: Re: Comparing FPGA with ASIC implementations
    146328: 10/03/11: Muzaffer Kal: Re: Comparing FPGA with ASIC implementations
    146333: 10/03/12: d_s_klein: Re: Comparing FPGA with ASIC implementations
146326: 10/03/11: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
146329: 10/03/12: saras: Question Rdging xilinx chipscope pro triggering
    146331: 10/03/12: John McCaskill: Re: Question Rdging xilinx chipscope pro triggering
    146412: 10/03/16: saras: Re: Question Rdging xilinx chipscope pro triggering
146330: 10/03/12: weldat: how can i add memory
    146332: 10/03/12: Magne Munkejord: Re: how can i add memory
    146338: 10/03/12: Andy Peters: Re: how can i add memory
        146373: 10/03/15: weldat: Re: how can i add memory
            146378: 10/03/15: Brian Drummond: Re: how can i add memory
146335: 10/03/12: Rob Gaddi: When do you pin out?
    146336: 10/03/12: John_H: Re: When do you pin out?
    146337: 10/03/12: Symon: Re: When do you pin out?
146345: 10/03/12: rickman: Re: Tier Logic introduces the world's first 3D FPGA
146346: 10/03/12: rickman: Re: Why doesn't this situation generate a latch?
146347: 10/03/12: rickman: Re: Why doesn't this situation generate a latch?
146348: 10/03/13: John_H: Re: Tier Logic introduces the world's first 3D FPGA
146353: 10/03/13: rickman: Re: Tier Logic introduces the world's first 3D FPGA
146354: 10/03/13: rickman: Re: Tier Logic introduces the world's first 3D FPGA
146355: 10/03/13: =?windows-1252?Q?GaLaKtIkUs=99?=: Looking for a G.723.1 codec IP core for Xilinx FPGA
    146385: 10/03/15: d_s_klein: Re: Looking for a G.723.1 codec IP core for Xilinx FPGA
    146398: 10/03/15: =?windows-1252?Q?GaLaKtIkUs=99?=: Re: Looking for a G.723.1 codec IP core for Xilinx FPGA
    146400: 10/03/15: luudee: Re: Looking for a G.723.1 codec IP core for Xilinx FPGA
    146405: 10/03/16: d_s_klein: Re: Looking for a G.723.1 codec IP core for Xilinx FPGA
146356: 10/03/14: summer: usb device driver for ISP1362(in windows xp)
    146357: 10/03/14: Andy Botterill: Re: usb device driver for ISP1362(in windows xp)
        146440: 10/03/18: summer: Re: usb device driver for ISP1362(in windows xp)
            146454: 10/03/18: Andy Botterill: Re: usb device driver for ISP1362(in windows xp)
146360: 10/03/14: Sharath Raju: Nu Horizons Spartan 3A DSP board
    146361: 10/03/14: Antti: Re: Nu Horizons Spartan 3A DSP board
        146368: 10/03/14: james: Re: Nu Horizons Spartan 3A DSP board
            146389: 10/03/15: james: Re: Nu Horizons Spartan 3A DSP board
                146448: 10/03/18: james: Re: Nu Horizons Spartan 3A DSP board
    146369: 10/03/14: Antti: Re: Nu Horizons Spartan 3A DSP board
    146375: 10/03/15: Sharath Raju: Re: Nu Horizons Spartan 3A DSP board
    146382: 10/03/15: Rob Gaddi: Re: Nu Horizons Spartan 3A DSP board
    146390: 10/03/15: Antti: Re: Nu Horizons Spartan 3A DSP board
146363: 10/03/14: rickman: Re: Tier Logic introduces the world's first 3D FPGA
146376: 10/03/15: lolita grenoble: how to use the design results of the vhdl code for a program in C
    146379: 10/03/15: Brian Drummond: Re: how to use the design results of the vhdl code for a program in C code
        146396: 10/03/16: Brian Drummond: Re: how to use the design results of the vhdl code for a program in C code
    146383: 10/03/15: Rob Gaddi: Re: how to use the design results of the vhdl code for a program in
146377: 10/03/15: srikanth srikanth: Memory Blocks in Arria II GX Devices - mixed port read during write
    146618: 10/03/23: Vaughn: Re: Memory Blocks in Arria II GX Devices - mixed port read during
146388: 10/03/15: rickman: Re: Why doesn't this situation generate a latch?
146391: 10/03/15: rickman: Awkward Arithmetic
    146392: 10/03/15: glen herrmannsfeldt: Re: Awkward Arithmetic
    146393: 10/03/15: Andy: Re: Awkward Arithmetic
    146394: 10/03/15: rickman: Re: Awkward Arithmetic
    146402: 10/03/16: Andy: Re: Awkward Arithmetic
    146413: 10/03/16: rickman: Re: Awkward Arithmetic
    146422: 10/03/17: jacko: Re: Awkward Arithmetic
    146466: 10/03/19: rickman: Re: Awkward Arithmetic
    146526: 10/03/22: jacko: Re: Awkward Arithmetic
    146537: 10/03/22: rickman: Re: Awkward Arithmetic
146395: 10/03/15: dwerdna: VHDL-2008 'protect
146397: 10/03/15: =?ISO-8859-1?Q?Te=F3filo_Monteiro?=: FPGA Board and a adc working between 20MHz and 100MHz
    146445: 10/03/18: Francesco: Re: FPGA Board and a adc working between 20MHz and 100MHz
        146453: 10/03/18: Al Clark: Re: FPGA Board and a adc working between 20MHz and 100MHz
146399: 10/03/15: jfh: Nested interrupts in Nios system and hung system
    146419: 10/03/17: =?ISO-8859-1?Q?Adam_G=F3rski?=: Re: Nested interrupts in Nios system and hung system
    146423: 10/03/17: jacko: Re: Nested interrupts in Nios system and hung system
146403: 10/03/16: HS: ISE speed determined by console output?
    146404: 10/03/16: d_s_klein: Re: ISE speed determined by console output?
        146406: 10/03/16: Sean Durkin: Re: ISE speed determined by console output?
146407: 10/03/16: Weng Tianxiang: Any advice on which is the best book on CMOS digital circuit design?
    146416: 10/03/17: Kim Enkovaara: Re: Any advice on which is the best book on CMOS digital circuit
        146727: 10/03/26: glen herrmannsfeldt: Re: Any advice on which is the best book on CMOS digital circuit ?design?
    146427: 10/03/17: Weng Tianxiang: Re: Any advice on which is the best book on CMOS digital circuit
    146679: 10/03/25: Weng Tianxiang: Re: Any advice on which is the best book on CMOS digital circuit
    146722: 10/03/26: Thomas Entner: Re: Any advice on which is the best book on CMOS digital circuit
    146733: 10/03/26: Patrick Maupin: Re: Any advice on which is the best book on CMOS digital circuit
    146762: 10/03/27: Weng Tianxiang: Re: Any advice on which is the best book on CMOS digital circuit
    146882: 10/03/30: pallav: Re: Any advice on which is the best book on CMOS digital circuit
    146898: 10/03/31: Weng Tianxiang: Re: Any advice on which is the best book on CMOS digital circuit
146408: 10/03/16: Brad Smallridge: Xilinx Spartan6 Virtex6 Rollout
    146409: 10/03/16: austin: Re: Xilinx Spartan6 Virtex6 Rollout
        146673: 10/03/25: Brad Smallridge: Re: Xilinx Spartan6 Virtex6 Rollout
            146697: 10/03/26: Kim Enkovaara: Re: Xilinx Spartan6 Virtex6 Rollout
        146711: 10/03/26: Aaron: Re: Xilinx Spartan6 Virtex6 Rollout
    146415: 10/03/16: John Larkin: Re: Xilinx Spartan6 Virtex6 Rollout
        146417: 10/03/17: Antti: Re: Xilinx Spartan6 Virtex6 Rollout
            146421: 10/03/17: John Larkin: Re: Xilinx Spartan6 Virtex6 Rollout
        146418: 10/03/17: HT-Lab: Re: Xilinx Spartan6 Virtex6 Rollout
            146433: 10/03/18: Symon: Re: Xilinx Spartan6 Virtex6 Rollout
            146434: 10/03/17: John Larkin: Re: Xilinx Spartan6 Virtex6 Rollout
            146436: 10/03/18: Kim Enkovaara: Re: Xilinx Spartan6 Virtex6 Rollout
                146469: 10/03/19: Muzaffer Kal: Re: Xilinx Spartan6 Virtex6 Rollout
            146455: 10/03/18: Nico Coesel: Re: Xilinx Spartan6 Virtex6 Rollout
            146456: 10/03/18: Nico Coesel: Re: Xilinx Spartan6 Virtex6 Rollout
        146428: 10/03/17: austin: Re: Xilinx Spartan6 Virtex6 Rollout
        146429: 10/03/17: Peter Alfke: Re: Xilinx Spartan6 Virtex6 Rollout
        146431: 10/03/17: -jg: Re: Xilinx Spartan6 Virtex6 Rollout
        146449: 10/03/18: austin: Re: Xilinx Spartan6 Virtex6 Rollout
        146457: 10/03/18: -jg: Re: Xilinx Spartan6 Virtex6 Rollout
        146458: 10/03/18: austin: Re: Xilinx Spartan6 Virtex6 Rollout
        146461: 10/03/18: -jg: Re: Xilinx Spartan6 Virtex6 Rollout
        146463: 10/03/18: -jg: Re: Xilinx Spartan6 Virtex6 Rollout
        146467: 10/03/19: austin: Re: Xilinx Spartan6 Virtex6 Rollout
        146531: 10/03/22: austin: Re: Xilinx Spartan6 Virtex6 Rollout
        146622: 10/03/24: luudee: Re: Xilinx Spartan6 Virtex6 Rollout
    146425: 10/03/17: Rob Gaddi: Re: Xilinx Spartan6 Virtex6 Rollout
    146459: 10/03/18: Rob Gaddi: Re: Xilinx Spartan6 Virtex6 Rollout
    146462: 10/03/18: Rob Gaddi: Re: Xilinx Spartan6 Virtex6 Rollout
146410: 10/03/16: Andrew Holme: Spartan 3 LVDS - current mode outputs?
    146424: 10/03/17: austin: Re: Spartan 3 LVDS - current mode outputs?
    146432: 10/03/18: Symon: Re: Spartan 3 LVDS - current mode outputs?
146411: 10/03/16: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
146414: 10/03/16: rickman: Re: Why doesn't this situation generate a latch?
146426: 10/03/17: fpgabuilder: Re: Why doesn't this situation generate a latch?
    146482: 10/03/19: Jonathan Bromley: Re: Why doesn't this situation generate a latch?
    146487: 10/03/19: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
    146501: 10/03/20: rickman: Re: Why doesn't this situation generate a latch?
146430: 10/03/17: Aditi: FPGA's with on-chip PROM?
    146438: 10/03/18: Nial Stewart: Re: FPGA's with on-chip PROM?
    146439: 10/03/18: Antti: Re: FPGA's with on-chip PROM?
    146483: 10/03/19: Prevailing over Technology: Re: FPGA's with on-chip PROM?
    146484: 10/03/19: Rob Gaddi: Re: FPGA's with on-chip PROM?
146435: 10/03/17: jt_eaton: Digilent Nexys2 board
    146518: 10/03/21: Patrick Maupin: Re: Digilent Nexys2 board
        146520: 10/03/21: glen herrmannsfeldt: Re: Digilent Nexys2 board
        146523: 10/03/22: whygee: Re: Digilent Nexys2 board
    146522: 10/03/21: Patrick Maupin: Re: Digilent Nexys2 board
    146648: 10/03/25: jmiles@pop.net: Re: Digilent Nexys2 board
146442: 10/03/18: Jk: Bus Master DMA with PCI Express
    146443: 10/03/18: Charles Gardiner: Re: Bus Master DMA with PCI Express
146444: 10/03/18: Francesco: Xilinx only on Avnet now
    146446: 10/03/18: Antti: Re: Xilinx only on Avnet now
    146451: 10/03/18: DJ Delorie: Re: Xilinx only on Avnet now
        146495: 10/03/20: james: Re: Xilinx only on Avnet now
    146452: 10/03/18: John Larkin: Re: Xilinx only on Avnet now
        146497: 10/03/20: Nico Coesel: Re: Xilinx only on Avnet now
    146494: 10/03/20: Jon Beniston: Re: Xilinx only on Avnet now
    146498: 10/03/20: George Jefferson: Re: Xilinx only on Avnet now
    146500: 10/03/20: Leon: Re: Xilinx only on Avnet now
146447: 10/03/18: Andy: Re: Why doesn't this situation generate a latch?
146450: 10/03/18: Weng Tianxiang: Re: Why doesn't this situation generate a latch?
146460: 10/03/18: Thorsten Kiefer: Spartan 3 Starter Kit Example
    146473: 10/03/19: HT-Lab: Re: Spartan 3 Starter Kit Example
        146480: 10/03/19: Thorsten Kiefer: Re: Spartan 3 Starter Kit Example
            146481: 10/03/19: Thorsten Kiefer: Re: Spartan 3 Starter Kit Example
                146493: 10/03/20: HT-Lab: Re: Spartan 3 Starter Kit Example
                    146628: 10/03/24: Thorsten Kiefer: Re: Spartan 3 Starter Kit Example
        147066: 10/04/12: Anssi Saari: Re: Spartan 3 Starter Kit Example
146464: 10/03/19: rickman: Re: Why doesn't this situation generate a latch?
146465: 10/03/19: rickman: Re: Why doesn't this situation generate a latch?
146468: 10/03/19: Alessandro Basili: wishbone
    146470: 10/03/19: Rob Gaddi: Re: wishbone
    146471: 10/03/19: d_s_klein: Re: wishbone
    146472: 10/03/19: HT-Lab: Re: wishbone
        146475: 10/03/19: Alessandro Basili: Re: wishbone
    146496: 10/03/20: jt_eaton: Re: wishbone
        146509: 10/03/21: Alessandro Basili: Re: wishbone
146474: 10/03/19: fpgabuilder: Re: Why doesn't this situation generate a latch?
146477: 10/03/19: Mawa_fugo: Update init data in dualport BRAM without re-run anything?
    146478: 10/03/19: John_H: Re: Update init data in dualport BRAM without re-run anything?
    146479: 10/03/19: Mawa_fugo: Re: Update init data in dualport BRAM without re-run anything?
    146488: 10/03/19: John_H: Re: Update init data in dualport BRAM without re-run anything?
    146489: 10/03/19: Mawa_fugo: Re: Update init data in dualport BRAM without re-run anything?
    146490: 10/03/20: modimo: Re: Update init data in dualport BRAM without re-run anything?
    146491: 10/03/20: Eric Smith: Re: Update init data in dualport BRAM without re-run anything?
    146499: 10/03/20: Mawa_fugo: Re: Update init data in dualport BRAM without re-run anything?
    146516: 10/03/21: Patrick Maupin: Re: Update init data in dualport BRAM without re-run anything?
    146592: 10/03/23: Mawa_fugo: Re: Update init data in dualport BRAM without re-run anything?
146485: 10/03/19: LittleAlex: Re: wishbone
    146492: 10/03/20: HT-Lab: Re: wishbone
        146512: 10/03/21: Alessandro Basili: Re: wishbone
            146627: 10/03/24: Alessandro Basili: Re: wishbone
    146621: 10/03/24: luudee: Re: wishbone
146486: 10/03/19: LittleAlex: Re: Xilinx Spartan6 Virtex6 Rollout
146502: 10/03/20: rickman: Active-HDL Strange Waveform Display
    146503: 10/03/20: Pete Fraser: Re: Active-HDL Strange Waveform Display
146504: 10/03/21: Peter: Finally, selling my old Xilinx/Viewlogic software package
    146505: 10/03/21: Mawa_fugo: Re: Finally, selling my old Xilinx/Viewlogic software package
        146506: 10/03/21: Helmut Sennewald: Re: Finally, selling my old Xilinx/Viewlogic software package
            146511: 10/03/21: Charles Gardiner: Re: Finally, selling my old Xilinx/Viewlogic software package
            146533: 10/03/22: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
                146536: 10/03/22: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
                    146543: 10/03/22: glen herrmannsfeldt: Re: Finally, selling my old Xilinx/Viewlogic software package
                        146546: 10/03/22: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
                            146554: 10/03/22: Jonathan Bromley: Re: Finally, selling my old Xilinx/Viewlogic software package
                                146565: 10/03/23: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
                146539: 10/03/22: Jim Stewart: Re: Finally, selling my old Xilinx/Viewlogic software package
                    146544: 10/03/22: glen herrmannsfeldt: Re: Finally, selling my old Xilinx/Viewlogic software package
                    146615: 10/03/24: Gerhard Hoffmann: Re: Finally, selling my old Xilinx/Viewlogic software package
                146542: 10/03/22: glen herrmannsfeldt: Re: Finally, selling my old Xilinx/Viewlogic software package
                    146550: 10/03/22: Petter Gustad: Re: Finally, selling my old Xilinx/Viewlogic software package
        146510: 10/03/21: rickman: Re: Finally, selling my old Xilinx/Viewlogic software package
        146535: 10/03/22: rickman: Re: Finally, selling my old Xilinx/Viewlogic software package
        146540: 10/03/22: rickman: Re: Finally, selling my old Xilinx/Viewlogic software package
    146513: 10/03/21: D Yuniskis: Re: Finally, selling my old Xilinx/Viewlogic software package
        146519: 10/03/21: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
            146594: 10/03/23: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
                146614: 10/03/24: Gerhard Hoffmann: Re: Finally, selling my old Xilinx/Viewlogic software package
                    146620: 10/03/24: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
                        146631: 10/03/24: Gerhard Hoffmann: Re: Finally, selling my old Xilinx/Viewlogic software package
                            146634: 10/03/24: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
    146623: 10/03/24: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
    146765: 10/03/28: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
    146940: 10/04/03: Peter: Re: Finally, selling my old Xilinx/Viewlogic software package
    147203: 10/04/18: Peter: Finally, selling my old Xilinx/Viewlogic software package
146507: 10/03/21: maxascent: Virtex 5 GTP
146508: 10/03/21: maxascent: Virtex 5 GTP
146517: 10/03/21: rickman: Changing Generics in Simulation
    146521: 10/03/21: Jonathan Bromley: Re: Changing Generics in Simulation
        146525: 10/03/22: Charles Gardiner: Re: Changing Generics in Simulation
    146524: 10/03/21: rickman: Re: Changing Generics in Simulation
    146534: 10/03/22: rickman: Re: Changing Generics in Simulation
    146538: 10/03/22: Andy Peters: Re: Changing Generics in Simulation
146527: 10/03/22: Paolo Roberto Grassi: Core8051s on Actel IGLOO AGL-DEV-KIT-SCS-SA
146528: 10/03/22: Petter Gustad: Quartus: rpm: Command not found.
    146532: 10/03/22: d_s_klein: Re: Quartus: rpm: Command not found.
        146548: 10/03/22: Petter Gustad: Re: Quartus: rpm: Command not found.
        146603: 10/03/23: d_s_klein: Re: Quartus: rpm: Command not found.
        147040: 10/04/11: Anssi Saari: Re: Quartus: rpm: Command not found.
            147509: 10/04/29: Petter Gustad: Re: Quartus: rpm: Command not found.
        147121: 10/04/14: d_s_klein: Re: Quartus: rpm: Command not found.
146530: 10/03/22: Seeker: Confusion in address generation for MIG generated DDR2 interface
    146572: 10/03/23: Magne Munkejord: Re: Confusion in address generation for MIG generated DDR2 interface
        146580: 10/03/23: Magne Munkejord: Re: Confusion in address generation for MIG generated DDR2 interface
    146577: 10/03/23: Seeker: Re: Confusion in address generation for MIG generated DDR2 interface
    146591: 10/03/23: Gabor: Re: Confusion in address generation for MIG generated DDR2 interface
    146619: 10/03/23: Seeker: Re: Confusion in address generation for MIG generated DDR2 interface
146541: 10/03/22: Andy Peters: Re: Why doesn't this situation generate a latch?
146545: 10/03/22: Philippe: Why hardware designers should switch to Eclipse
    146547: 10/03/22: General Schvantzkoph: Re: Why hardware designers should switch to Eclipse
        146551: 10/03/22: Petter Gustad: Re: Why hardware designers should switch to Eclipse
            146552: 10/03/22: Alan Fitch: Re: Why hardware designers should switch to Eclipse
                146553: 10/03/22: Jason Thibodeau: Re: Why hardware designers should switch to Eclipse
                    146611: 10/03/23: whygee: Re: Why hardware designers should switch to Eclipse
                146568: 10/03/23: Kim Enkovaara: Re: Why hardware designers should switch to Eclipse
                146571: 10/03/23: Petter Gustad: Re: Why hardware designers should switch to Eclipse
                    146575: 10/03/23: Petter Gustad: Re: Why hardware designers should switch to Eclipse
                        146581: 10/03/23: Petter Gustad: Re: Why hardware designers should switch to Eclipse
                    146584: 10/03/23: Marcus Harnisch: Re: Why hardware designers should switch to Eclipse
                    146609: 10/03/23: Nico Coesel: Re: Why hardware designers should switch to Eclipse
            146561: 10/03/22: Chris Abele: Re: Why hardware designers should switch to Eclipse
    146549: 10/03/22: M. Norton: Re: Why hardware designers should switch to Eclipse
    146555: 10/03/23: Charles Gardiner: Re: Why hardware designers should switch to Eclipse
        146579: 10/03/23: Nial Stewart: Re: Why hardware designers should switch to Eclipse
    146556: 10/03/22: Eric Smith: Re: Why hardware designers should switch to Eclipse
    146557: 10/03/22: Eric Smith: Re: Why hardware designers should switch to Eclipse
    146558: 10/03/22: Michael S: Re: Why hardware designers should switch to Eclipse
    146564: 10/03/22: rickman: Re: Why hardware designers should switch to Eclipse
    146567: 10/03/22: Eric Smith: Re: Why hardware designers should switch to Eclipse
    146574: 10/03/23: Philippe: Re: Why hardware designers should switch to Eclipse
    146578: 10/03/23: Hendrik: Re: Why hardware designers should switch to Eclipse
    146595: 10/03/23: M. Norton: Re: Why hardware designers should switch to Eclipse
    146597: 10/03/23: John_H: Re: Why hardware designers should switch to Eclipse
    146598: 10/03/23: Gabor: Re: Why hardware designers should switch to Eclipse
    146604: 10/03/23: Philippe: Re: Why hardware designers should switch to Eclipse
    146605: 10/03/23: Andy Peters: Re: Why hardware designers should switch to Eclipse
    146607: 10/03/23: Nico Coesel: Re: Why hardware designers should switch to Eclipse
        146626: 10/03/24: Nico Coesel: Re: Why hardware designers should switch to Eclipse
            146636: 10/03/24: Nico Coesel: Re: Why hardware designers should switch to Eclipse
                146637: 10/03/25: whygee: Re: Why hardware designers should switch to Eclipse
                146659: 10/03/25: Nico Coesel: Re: Why hardware designers should switch to Eclipse
    146610: 10/03/23: whygee: Re: Why hardware designers should stick to command line tools
    146613: 10/03/23: Patrick Maupin: Re: Why hardware designers should switch to Eclipse
    146632: 10/03/24: Patrick Maupin: Re: Why hardware designers should switch to Eclipse
    146642: 10/03/24: Patrick Maupin: Re: Why hardware designers should switch to Eclipse
146559: 10/03/22: Jason Thibodeau: Standard cell library help
    146560: 10/03/22: Ed McGettigan: Re: Standard cell library help
        146566: 10/03/22: Muzaffer Kal: Re: Standard cell library help
            146588: 10/03/23: Jason Thibodeau: Re: Standard cell library help
                146599: 10/03/23: Jason Thibodeau: Re: Standard cell library help
                146602: 10/03/23: Jason Thibodeau: Re: Standard cell library help
                    146606: 10/03/23: Jason Thibodeau: Re: Standard cell library help
                        146612: 10/03/23: Jason Thibodeau: Re: Standard cell library help
        146596: 10/03/23: jkljljklk: Re: Standard cell library help
        146601: 10/03/23: Ed McGettigan: Re: Standard cell library help
146562: 10/03/22: Pete Fraser: Writing Hex values to file in VHDL?
    146569: 10/03/22: backhus: Re: Writing Hex values to file in VHDL?
        146583: 10/03/23: Pete Fraser: Re: Writing Hex values to file in VHDL?
    146570: 10/03/23: he: Re: Writing Hex values to file in VHDL?
        146585: 10/03/23: Pete Fraser: Re: Writing Hex values to file in VHDL?
    146573: 10/03/23: Magne Munkejord: Re: Writing Hex values to file in VHDL?
        146586: 10/03/23: Pete Fraser: Re: Writing Hex values to file in VHDL?
            146590: 10/03/23: Magne Munkejord: Re: Writing Hex values to file in VHDL?
                146593: 10/03/23: Pete Fraser: Re: Writing Hex values to file in VHDL?
    146576: 10/03/23: Tricky: Re: Writing Hex values to file in VHDL?
        146587: 10/03/23: Pete Fraser: Re: Writing Hex values to file in VHDL?
    147434: 10/04/27: pini_45: Re: Writing Hex values to file in VHDL?
146563: 10/03/22: Patrick Maupin: Re: Why hardware designers should switch to Eclipse
146582: 10/03/23: Hendrik: Re: Why hardware designers should switch to Eclipse
    147510: 10/04/29: Petter Gustad: Re: Why hardware designers should switch to Eclipse
146589: 10/03/23: jjplaw: Xilinx ISE Tcl Script Error
    146608: 10/03/23: Alan Fitch: Re: Xilinx ISE Tcl Script Error
        146617: 10/03/23: jjplaw: Re: Xilinx ISE Tcl Script Error
    146624: 10/03/24: Paul: Re: Xilinx ISE Tcl Script Error
    146629: 10/03/24: Alan Fitch: Re: Xilinx ISE Tcl Script Error
        146651: 10/03/25: jjplaw: Re: Xilinx ISE Tcl Script Error
146600: 10/03/23: Mawa_fugo: Re: Update init data in dualport BRAM without re-run anything?
146616: 10/03/23: Jason Thibodeau: Implementation of IWLS benchmark- Manual place and route
    146625: 10/03/24: Jason Thibodeau: Re: Implementation of IWLS benchmark- Manual place and route
146630: 10/03/24: Aditi: PROM for Spartan 6 FPGA
    146633: 10/03/24: Aditi: Re: PROM for Spartan 6 FPGA
    146635: 10/03/24: Uwe Bonnes: Re: PROM for Spartan 6 FPGA
    146643: 10/03/24: John Larkin: Re: PROM for Spartan 6 FPGA
        146649: 10/03/25: Uwe Bonnes: Re: PROM for Spartan 6 FPGA
    146674: 10/03/25: Aditi: Re: PROM for Spartan 6 FPGA
    146720: 10/03/26: Jon Elson: Re: PROM for Spartan 6 FPGA
    146721: 10/03/26: Jon Elson: Re: PROM for Spartan 6 FPGA
    146740: 10/03/26: Bryan: Re: PROM for Spartan 6 FPGA
        146745: 10/03/27: Uwe Bonnes: Re: PROM for Spartan 6 FPGA
146638: 10/03/24: Thomas Entner: EMC discussion
    146641: 10/03/25: Symon: Re: EMC discussion
        146655: 10/03/25: Symon: Re: EMC discussion
            146670: 10/03/25: Symon: Re: EMC discussion
        146664: 10/03/25: glen herrmannsfeldt: Re: EMC discussion
            146668: 10/03/25: glen herrmannsfeldt: Re: EMC discussion
            146723: 10/03/26: Jonathan Bromley: Re: EMC discussion
                146728: 10/03/26: glen herrmannsfeldt: Re: EMC discussion
        146669: 10/03/25: Symon: Re: EMC discussion
            146676: 10/03/25: glen herrmannsfeldt: Re: EMC discussion
                146677: 10/03/26: Symon: Re: EMC discussion
                146688: 10/03/26: glen herrmannsfeldt: Re: EMC discussion
        146675: 10/03/25: Nico Coesel: Re: EMC discussion
    146645: 10/03/24: John_H: Re: EMC discussion
    146650: 10/03/25: Andy: Re: EMC discussion
    146652: 10/03/25: austin: Re: EMC discussion
        146653: 10/03/25: Symon: Re: EMC discussion
    146660: 10/03/25: Andy: Re: EMC discussion
    146661: 10/03/25: John_H: Re: EMC discussion
    146662: 10/03/25: Kolja Sulimma: Re: EMC discussion
        146678: 10/03/26: Symon: Re: EMC discussion
    146663: 10/03/25: Kolja Sulimma: Re: EMC discussion
    146665: 10/03/25: James Salisbury: Re: EMC discussion
    146666: 10/03/25: John_H: Re: EMC discussion
    146671: 10/03/25: Thomas Entner: Re: EMC discussion
    146672: 10/03/25: Andy: Re: EMC discussion
    146681: 10/03/25: John_H: Re: EMC discussion
146639: 10/03/24: Jason Thibodeau: Ring Oscillator -> counter differences
    146640: 10/03/25: whygee: Re: Ring Oscillator -> counter differences
    146644: 10/03/25: glen herrmannsfeldt: Re: Ring Oscillator -> counter differences
    146646: 10/03/24: John_H: Re: Ring Oscillator -> counter differences
    146647: 10/03/24: -jg: Re: Ring Oscillator -> counter differences
        146654: 10/03/25: Jason Thibodeau: Re: Ring Oscillator -> counter differences
            146713: 10/03/26: Jason Thibodeau: Re: Ring Oscillator -> counter differences
                146716: 10/03/26: glen herrmannsfeldt: Re: Ring Oscillator -> counter differences
            146735: 10/03/27: Symon: Re: Ring Oscillator -> counter differences
        146710: 10/03/26: Thomas Stanka: Re: Ring Oscillator -> counter differences
        146715: 10/03/26: Antti: Re: Ring Oscillator -> counter differences
        146717: 10/03/26: Chris Maryan: Re: Ring Oscillator -> counter differences
        146724: 10/03/26: John_H: Re: Ring Oscillator -> counter differences
        146725: 10/03/26: Gabor: Re: Ring Oscillator -> counter differences
        146729: 10/03/26: -jg: Re: Ring Oscillator -> counter differences
        146737: 10/03/26: John_H: Re: Ring Oscillator -> counter differences
        146742: 10/03/26: -jg: Re: Ring Oscillator -> counter differences
146656: 10/03/25: Maurice Branson: USB 3.0 implementation on FPGA
    146657: 10/03/25: MK: Re: USB 3.0 implementation on FPGA
        146658: 10/03/25: Maurice Branson: Re: USB 3.0 implementation on FPGA
            146691: 10/03/26: Peter: Re: USB 3.0 implementation on FPGA
            146692: 10/03/26: Andrew Jackson: Re: USB 3.0 implementation on FPGA
                146696: 10/03/26: Maurice Branson: Re: USB 3.0 implementation on FPGA
                    146793: 10/03/29: Andrew Jackson: Re: USB 3.0 implementation on FPGA
    146690: 10/03/26: wojtek: Re: USB 3.0 implementation on FPGA
    146703: 10/03/26: wojtek: Re: USB 3.0 implementation on FPGA
    146705: 10/03/26: Antti: Re: USB 3.0 implementation on FPGA
    146708: 10/03/26: wojtek: Re: USB 3.0 implementation on FPGA
    146790: 10/03/28: luudee: Re: USB 3.0 implementation on FPGA
    146791: 10/03/28: Patrick Maupin: Re: USB 3.0 implementation on FPGA
146667: 10/03/25: Jason Thibodeau: XST optimization
    146685: 10/03/25: David Wiltshire: Re: XST optimization
        146712: 10/03/26: Jason Thibodeau: Re: XST optimization
            146769: 10/03/28: Jason Thibodeau: Re: XST optimization
                146775: 10/03/28: whygee: Re: XST optimization
                146776: 10/03/28: whygee: Re: XST optimization
                    146782: 10/03/28: Alan Fitch: Re: XST optimization
                        146785: 10/03/28: Jason Thibodeau: Re: XST optimization
                            146813: 10/03/29: Muzaffer Kal: Re: XST optimization
                                146814: 10/03/29: Jason Thibodeau: Re: XST optimization
                                    146819: 10/03/29: Jason Thibodeau: Re: XST optimization
                                        146826: 10/03/29: Jason Thibodeau: Re: XST optimization
                                        146845: 10/03/30: Alan Fitch: Re: XST optimization
                                            146852: 10/03/30: Jason Thibodeau: Re: XST optimization
                                    146844: 10/03/30: Muzaffer Kal: Re: XST optimization
        146783: 10/03/28: modimo: Re: XST optimization
        146811: 10/03/29: Jason Thibodeau: Re: XST optimization
        146817: 10/03/29: Ed McGettigan: Re: XST optimization
        146824: 10/03/29: Patrick Maupin: Re: XST optimization
        146836: 10/03/29: Patrick Maupin: Re: XST optimization
    146818: 10/03/29: Rob Gaddi: Re: XST optimization
146680: 10/03/25: David Wiltshire: Newbie Coding Question
    146682: 10/03/25: Muzaffer Kal: Re: Newbie Coding Question
        146695: 10/03/26: Alan Fitch: Re: Newbie Coding Question
            146718: 10/03/26: glen herrmannsfeldt: Re: Newbie Coding Question
    146684: 10/03/25: David Wiltshire: Re: Newbie Coding Question
    146689: 10/03/26: glen herrmannsfeldt: Re: Newbie Coding Question
    146699: 10/03/26: Marc Jet: Re: Newbie Coding Question
    146700: 10/03/26: David Wiltshire: Re: Newbie Coding Question
146683: 10/03/26: whygee: where is VHDL-POSIX ?
    146686: 10/03/25: Amal: Re: where is VHDL-POSIX ?
        146687: 10/03/26: whygee: Re: where is VHDL-POSIX ?
            146764: 10/03/28: whygee: Re: where is VHDL-POSIX ?
        146757: 10/03/27: Amal: Re: where is VHDL-POSIX ?
146693: 10/03/26: <da_wils@hotmail.com>: baud rates etc
    146698: 10/03/26: glen herrmannsfeldt: Re: baud rates etc
    146701: 10/03/26: David Brown: Re: baud rates etc
    146706: 10/03/26: John_H: Re: baud rates etc
        146719: 10/03/26: glen herrmannsfeldt: Re: baud rates etc
    146709: 10/03/26: dave: Re: baud rates etc
146694: 10/03/26: weldat: result on hyperterminal is not displayed
    146702: 10/03/26: David Brown: Re: result on hyperterminal is not displayed
        146884: 10/03/30: weldat: Re: result on hyperterminal is not displayed
            146968: 10/04/05: weldat: Re: result on hyperterminal is not displayed
    146707: 10/03/26: John_H: Re: result on hyperterminal is not displayed
    146714: 10/03/26: Nico Coesel: Re: result on hyperterminal is not displayed
146704: 10/03/26: Pierpaolo: Wrong DDR communication
    146799: 10/03/29: George: Re: Wrong DDR communication
        146890: 10/03/31: Pierpaolo: Re: Wrong DDR communication
146726: 10/03/26: radarman: PCB routing issues for sync SRAM
    146730: 10/03/26: -jg: Re: PCB routing issues for sync SRAM
    146734: 10/03/26: KJ: Re: PCB routing issues for sync SRAM
    146736: 10/03/26: John_H: Re: PCB routing issues for sync SRAM
    146753: 10/03/27: John Adair: Re: PCB routing issues for sync SRAM
    146760: 10/03/27: KJ: Re: PCB routing issues for sync SRAM
    146761: 10/03/27: radarman: Re: PCB routing issues for sync SRAM
    146763: 10/03/27: John_H: Re: PCB routing issues for sync SRAM
    146771: 10/03/28: KJ: Re: PCB routing issues for sync SRAM
    146772: 10/03/28: KJ: Re: PCB routing issues for sync SRAM
    146774: 10/03/28: Symon: Re: PCB routing issues for sync SRAM
        146780: 10/03/28: Symon: Re: PCB routing issues for sync SRAM
            146795: 10/03/29: Symon: Re: PCB routing issues for sync SRAM
            146815: 10/03/29: Symon: Re: PCB routing issues for sync SRAM
        146805: 10/03/29: Symon: Re: PCB routing issues for sync SRAM
    146778: 10/03/28: John_H: Re: PCB routing issues for sync SRAM
    146779: 10/03/28: John_H: Re: PCB routing issues for sync SRAM
    146788: 10/03/28: John_H: Re: PCB routing issues for sync SRAM
    146803: 10/03/29: radarman: Re: PCB routing issues for sync SRAM
    146808: 10/03/29: Ed McGettigan: Re: PCB routing issues for sync SRAM
    146809: 10/03/29: radarman: Re: PCB routing issues for sync SRAM
    146832: 10/03/29: KJ: Re: PCB routing issues for sync SRAM
    146841: 10/03/29: John_H: Re: PCB routing issues for sync SRAM
    146847: 10/03/30: Nial Stewart: Re: PCB routing issues for sync SRAM
    146848: 10/03/30: KJ: Re: PCB routing issues for sync SRAM
146731: 10/03/26: Aditi: Version of Xilinx ISE for Spartan 6 FPGAs
    146732: 10/03/26: Ed McGettigan: Re: Version of Xilinx ISE for Spartan 6 FPGAs
146738: 10/03/26: Randy Yates: Multipliers in CoolRunner Series?
    146739: 10/03/26: Randy Yates: Re: Multipliers in CoolRunner Series?
    146741: 10/03/27: glen herrmannsfeldt: Re: Multipliers in CoolRunner Series?
    146743: 10/03/26: -jg: Re: Multipliers in CoolRunner Series?
    146744: 10/03/27: Nico Coesel: Re: Multipliers in CoolRunner Series?
    146746: 10/03/27: John_H: Re: Multipliers in CoolRunner Series?
        146749: 10/03/27: John_H: Re: Multipliers in CoolRunner Series?
        146752: 10/03/27: glen herrmannsfeldt: Re: Multipliers in CoolRunner Series?
        146756: 10/03/27: glen herrmannsfeldt: Re: Multipliers in CoolRunner Series?
        146758: 10/03/27: -jg: Re: Multipliers in CoolRunner Series?
    146747: 10/03/27: Randy Yates: Re: Multipliers in CoolRunner Series?
        146748: 10/03/27: Symon: Re: Multipliers in CoolRunner Series?
    146750: 10/03/27: John Adair: Re: Multipliers in CoolRunner Series?
    146754: 10/03/27: Randy Yates: Re: Multipliers in CoolRunner Series?
    146755: 10/03/27: Randy Yates: Re: Multipliers in CoolRunner Series?
    146759: 10/03/27: Randy Yates: Re: Multipliers in CoolRunner Series?
146751: 10/03/27: John Adair: Re: Version of Xilinx ISE for Spartan 6 FPGAs
146766: 10/03/28: Randy Yates: Maximum output rate
    146767: 10/03/28: Symon: Re: Maximum output rate
        146768: 10/03/28: Phil Jessop: Re: Maximum output rate
    146770: 10/03/28: Michael S: Re: Maximum output rate
        146773: 10/03/28: Symon: Re: Maximum output rate
        146781: 10/03/28: Michael S: Re: Maximum output rate
        146789: 10/03/28: John_H: Re: Maximum output rate
        146800: 10/03/29: Michael S: Re: Maximum output rate
    146777: 10/03/28: John_H: Re: Maximum output rate
    146784: 10/03/28: Randy Yates: Re: Maximum output rate
    146816: 10/03/29: Randy Yates: Re: Maximum output rate
146786: 10/03/28: Weng Tianxiang: Which is the most beautiful and memorable hardware structure in a
    146797: 10/03/29: Sandro: Re: Which is the most beautiful and memorable hardware structure in a
        146798: 10/03/29: whygee: Re: Which is the most beautiful and memorable hardware structure
    146807: 10/03/29: jacko: Re: Which is the most beautiful and memorable hardware structure in a
        146846: 10/03/30: <nmm1@cam.ac.uk>: Re: Which is the most beautiful and memorable hardware structure in a
            146862: 10/03/30: Tim McCaffrey: Re: Which is the most beautiful and memorable hardware structure in a
            146879: 10/03/30: Rob Warnock: Re: Which is the most beautiful and memorable hardware structure in a
        146880: 10/03/30: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
            146883: 10/03/31: glen herrmannsfeldt: Re: Which is the most beautiful and memorable hardware structure in a CPU?
                146887: 10/03/31: <nmm1@cam.ac.uk>: Re: Which is the most beautiful and memorable hardware structure in a CPU?
                    146905: 10/04/01: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
                146904: 10/04/01: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
                    146907: 10/04/01: glen herrmannsfeldt: Re: Which is the most beautiful and memorable hardware structure in a CPU?
                        146918: 10/04/01: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
                            146923: 10/04/02: glen herrmannsfeldt: Re: Which is the most beautiful and memorable hardware structure in a CPU?
                                146945: 10/04/03: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
                            146944: 10/04/03: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
                                146948: 10/04/03: glen herrmannsfeldt: Re: Which is the most beautiful and memorable hardware structure in a ?CPU?
                                    146966: 10/04/05: Tim McCaffrey: Re: Which is the most beautiful and memorable hardware structure in a ?CPU?
        146881: 10/03/30: Andy "Krazy" Glew: Re: Which is the most beautiful and memorable hardware structure
        146928: 10/04/02: mac: Re: Which is the most beautiful and memorable hardware structure in a CPU?
    146827: 10/03/29: Jonathan Bromley: Re: Which is the most beautiful and memorable hardware structure in a CPU?
        146833: 10/03/30: whygee: Re: Which is the most beautiful and memorable hardware structure
    146838: 10/03/29: MitchAlsup: Re: Which is the most beautiful and memorable hardware structure in a
    146843: 10/03/30: Andrew Reilly: Re: Which is the most beautiful and memorable hardware structure in a
    146853: 10/03/30: Jonathan Bromley: Re: Which is the most beautiful and memorable hardware structure in a
    146864: 10/03/30: Jason Zheng: Re: Which is the most beautiful and memorable hardware structure in
        146868: 10/03/30: glen herrmannsfeldt: Re: Which is the most beautiful and memorable hardware structure in a CPU?
    146867: 10/03/30: Weng Tianxiang: Re: Which is the most beautiful and memorable hardware structure in a
    146885: 10/03/30: James Harris: Re: Which is the most beautiful and memorable hardware structure in a
    146912: 10/04/01: MitchAlsup: Re: Which is the most beautiful and memorable hardware structure in a
    146919: 10/04/01: Robert Myers: Re: Which is the most beautiful and memorable hardware structure in a
    146920: 10/04/01: MitchAlsup: Re: Which is the most beautiful and memorable hardware structure in a
    146922: 10/04/01: KJ: Re: Which is the most beautiful and memorable hardware structure in a
    146929: 10/04/02: Weng Tianxiang: Re: Which is the most beautiful and memorable hardware structure in a
    146946: 10/04/03: MitchAlsup: Re: Which is the most beautiful and memorable hardware structure in a
146787: 10/03/28: Aditi: Re: Version of Xilinx ISE for Spartan 6 FPGAs
146792: 10/03/28: life.is.best: desgin suspended
    146796: 10/03/29: Symon: Re: desgin suspended
        146874: 10/03/31: Symon: Re: desgin suspended
    146855: 10/03/30: Gabor: Re: desgin suspended
146794: 10/03/29: adiles: Great Public and Private undergraduate/graduate schools for Comp Arch
146801: 10/03/29: vragukumar: Xilinx Webpack v11.4 availability
    146806: 10/03/29: Ed McGettigan: Re: Xilinx Webpack v11.4 availability
        146857: 10/03/30: vragukumar: Re: Xilinx Webpack v11.4 availability
            146863: 10/03/30: cfelton: Re: Xilinx Webpack v11.4 availability
        146858: 10/03/30: vragukumar: Re: Xilinx Webpack v11.4 availability
    146860: 10/03/30: Ed McGettigan: Re: Xilinx Webpack v11.4 availability
    146870: 10/03/30: Ed McGettigan: Re: Xilinx Webpack v11.4 availability
146802: 10/03/29: colin: upgrading to ISE 11.x
    146804: 10/03/29: jt_eaton: Re: upgrading to ISE 11.x
    146810: 10/03/29: d_s_klein: Re: upgrading to ISE 11.x
    146837: 10/03/29: Patrick Maupin: Re: upgrading to ISE 11.x
    146856: 10/03/30: Gabor: Re: upgrading to ISE 11.x
146812: 10/03/29: PureSine: infering BRAM for a FIFO in XST(spartan 3)
    146825: 10/03/29: Patrick Maupin: Re: infering BRAM for a FIFO in XST(spartan 3)
        146835: 10/03/30: PureSine: Re: infering BRAM for a FIFO in XST(spartan 3)
        146839: 10/03/30: PureSine: Re: infering BRAM for a FIFO in XST(spartan 3)
        146842: 10/03/29: Patrick Maupin: Re: infering BRAM for a FIFO in XST(spartan 3)
146820: 10/03/29: Abby Brown: Free VHDL or Verilog Simulator
    146823: 10/03/29: Patrick Maupin: Re: Free VHDL or Verilog Simulator
    146831: 10/03/30: Alan Fitch: Re: Free VHDL or Verilog Simulator
        146930: 10/04/02: Abby Brown: Re: Free VHDL or Verilog Simulator
            146942: 10/04/03: Jeff Cunningham: Re: Free VHDL or Verilog Simulator
                146943: 10/04/03: whygee: Re: Free VHDL or Verilog Simulator
                    147433: 10/04/27: pini_45: Re: Free VHDL or Verilog Simulator
    157048: 14/09/13: pini_kr: Re: Free VHDL or Verilog Simulator
        157049: 14/09/13: mnentwig: Re: Free VHDL or Verilog Simulator
146821: 10/03/29: Bill Valores: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146822: 10/03/29: Patrick Maupin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146828: 10/03/29: austin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
        146830: 10/03/29: glen herrmannsfeldt: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146829: 10/03/29: austin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146840: 10/03/29: John_H: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146849: 10/03/30: Bill Valores: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146854: 10/03/30: Patrick Maupin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146859: 10/03/30: Bill Valores: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146893: 10/03/31: Bill Valores: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146894: 10/03/31: Patrick Maupin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146895: 10/03/31: John_H: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146896: 10/03/31: Patrick Maupin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146897: 10/03/31: -jg: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146899: 10/03/31: Patrick Maupin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146902: 10/04/01: austin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146908: 10/04/01: John_H: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
    146911: 10/04/01: austin: Re: Spartan 3E: MAX_STEPS as a function of CLKIN frequency
146834: 10/03/29: Andrew FPGA: Spartan 6 PLL - Why such a strict input jitter requirement?
    146865: 10/03/30: austin: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
        146866: 10/03/30: Symon: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
            146876: 10/03/31: Symon: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
                146886: 10/03/31: whygee: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
                    146889: 10/03/31: Muzaffer Kal: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146869: 10/03/30: austin: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146871: 10/03/30: austin: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146872: 10/03/30: John_H: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146873: 10/03/30: -jg: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146877: 10/03/30: Patrick Maupin: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146878: 10/03/30: John_H: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146903: 10/04/01: austin: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146916: 10/04/01: rickman: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146921: 10/04/01: John_H: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
    146931: 10/04/02: rickman: Re: Spartan 6 PLL - Why such a strict input jitter requirement?
146850: 10/03/30: Usama: MSI for BMD design
146851: 10/03/30: Usama: MSI for BMD design
146861: 10/03/30: gaurang4040: Using Verilog Macros with Arguments
    146936: 10/04/02: Jonathan Bromley: Re: Using Verilog Macros with Arguments
        146941: 10/04/03: Jonathan Bromley: Re: Using Verilog Macros with Arguments
146875: 10/03/30: vragukumar: Migrating project from Xilinx ISE v7.1 to v11.1
    146891: 10/03/31: Ed McGettigan: Re: Migrating project from Xilinx ISE v7.1 to v11.1
146888: 10/03/31: luudee: FMC Boards ?
    146892: 10/03/31: Ed McGettigan: Re: FMC Boards ?
    146901: 10/03/31: luudee: Re: FMC Boards ?
    146924: 10/04/01: luudee: Re: FMC Boards ?
    146925: 10/04/02: John Adair: Re: FMC Boards ?
    146939: 10/04/02: john.orlando@gmail.com: Re: FMC Boards ?
    146982: 10/04/07: Yan: Re: FMC Boards ?
    147001: 10/04/09: Ed McGettigan: Re: FMC Boards ?
    147030: 10/04/09: Yan: Re: FMC Boards ?
    147053: 10/04/12: luudee: Re: FMC Boards ?
    147234: 10/04/19: luudee: Re: FMC Boards ?
    147631: 10/05/10: luudee: Re: FMC Boards ?
146900: 10/03/31: Usama: Multiple Interrupts Handling


Site Home   Archive Home   FAQ Home   How to search the Archive   How to Navigate the Archive   
Compare FPGA features and resources   

Threads starting:
1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015Jan2015

Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

Custom Search