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Threads Starting Feb 2006

96230: 06/02/01: Marco T.: Parallel Cable IV does not work with parallel to usb cable
    96237: 06/02/01: Antti Lukats: Re: Parallel Cable IV does not work with parallel to usb cable
    96245: 06/02/01: Sean Durkin: Re: Parallel Cable IV does not work with parallel to usb cable
        96252: 06/02/01: Ray Andraka: Re: Parallel Cable IV does not work with parallel to usb cable
            96368: 06/02/02: antonio bergnoli: Re: Parallel Cable IV does not work with parallel to usb cable
                96474: 06/02/04: Antti Lukats: Re: Parallel Cable IV does not work with parallel to usb cable
        99259: 06/03/22: Andreas Ehliar: Re: Parallel Cable IV does not work with parallel to usb cable
            99320: 06/03/22: Stephen Williams: ACE Formatter for Linux (was Re: Parallel Cable IV...)
                99362: 06/03/23: Duane Clark: Re: ACE Formatter for Linux (was Re: Parallel Cable IV...)
                    99398: 06/03/23: Stephen Williams: Re: ACE Formatter for Linux (was Re: Parallel Cable IV...)
    96250: 06/02/01: Amontec, Larry: Re: Parallel Cable IV does not work with parallel to usb cable
    96270: 06/02/01: quark01: Re: Parallel Cable IV does not work with parallel to usb cable
        96272: 06/02/01: Antti Lukats: Re: Parallel Cable IV does not work with parallel to usb cable
96239: 06/02/01: TigerSatish: For our Study We need STM1, 4 , 16 Block diagram where to get it
    96240: 06/02/01: Symon: Re: For our Study We need STM1, 4 , 16 Block diagram where to get it
    96263: 06/02/01: Francesco: Re: For our Study We need STM1, 4 , 16 Block diagram where to get it
        96265: 06/02/02: Allan Herriman: Re: For our Study We need STM1, 4 , 16 Block diagram where to get it
    96521: 06/02/05: TigerSatish: Re: For our Study We need STM1, 4 , 16 Block diagram where to get it
96243: 06/02/01: nhurley: Die Area
    96253: 06/02/01: Stephen Craven: Re: Die Area
    96269: 06/02/01: Philip Freidin: Re: Die Area
    96278: 06/02/01: Peter Alfke: Re: Die Area
        96279: 06/02/01: Paul Johnson: Re: Die Area
            96300: 06/02/01: Paul Johnson: Re: Die Area
        96335: 06/02/02: Symon: Re: Die Area
            96356: 06/02/02: Ray Andraka: Re: Die Area
            96360: 06/02/03: Jim Granville: Re: Die Area
                96361: 06/02/02: Antti Lukats: Re: Die Area
            96364: 06/02/02: Mike Treseler: Re: Die Area
                96366: 06/02/02: Ray Andraka: Re: Die Area
            96403: 06/02/03: David R Brooks: Re: Die Area
    96288: 06/02/01: Peter Alfke: Re: Die Area
    96319: 06/02/01: Peter Alfke: Re: Die Area
    96327: 06/02/01: johnp: Re: Die Area
    96352: 06/02/02: johnp: Re: Die Area
    96354: 06/02/02: Peter Alfke: Re: Die Area
    96367: 06/02/02: Jerry Coffin: Re: Die Area
    96404: 06/02/03: David R Brooks: Re: Die Area
96244: 06/02/01: Paul Johnson: Gbit technology selection?
96246: 06/02/01: <patrick.melet@dmradiocom.fr>: Quartus Fitter Warning
    96248: 06/02/01: Manfred Balik: Re: Quartus Fitter Warning
96247: 06/02/01: saad: LDPC
96249: 06/02/01: Ben Marpe: BPSK modulation on Xilinx FPGA
    96251: 06/02/01: <cs_posting@hotmail.com>: Re: BPSK modulation on Xilinx FPGA
        96259: 06/02/01: Ray Andraka: Re: BPSK modulation on Xilinx FPGA
            96292: 06/02/01: MikeJ: Re: BPSK modulation on Xilinx FPGA
                96311: 06/02/01: Ray Andraka: Re: BPSK modulation on Xilinx FPGA
    96254: 06/02/01: Ray Andraka: Re: BPSK modulation on Xilinx FPGA
        96322: 06/02/02: Allan Herriman: Re: BPSK modulation on Xilinx FPGA
            96324: 06/02/02: Ray Andraka: Re: BPSK modulation on Xilinx FPGA
    96294: 06/02/01: <cs_posting@hotmail.com>: Re: BPSK modulation on Xilinx FPGA
    96316: 06/02/02: news.verizon.net: Re: BPSK modulation on Xilinx FPGA
        96373: 06/02/02: Benjamin Marpe: Re: BPSK modulation on Xilinx FPGA
    96347: 06/02/02: Jon Beniston: Re: BPSK modulation on Xilinx FPGA
96257: 06/02/01: Raymond: Maximum system frequency on FPGA/CPLD
    96284: 06/02/01: Rene Tschaggelar: Re: Maximum system frequency on FPGA/CPLD
    96286: 06/02/01: John Adair: Re: Maximum system frequency on FPGA/CPLD
    96291: 06/02/01: Larry: Re: Maximum system frequency on FPGA/CPLD
96261: 06/02/01: Pasacco: ISE 8.1.01i does not implement new BUS macro
96275: 06/02/01: tony.p.lee@gmail.com: Strange problem with sysace + linux + Ace on SanDisk.
96282: 06/02/01: Antti Lukats: microblaze GNU tools for win32 binaries (from 8.1 build) for download
    96337: 06/02/02: <Antti.Lukats@xilant.com>: Re: microblaze GNU tools, OutOfTree compile for uClinux on Win32
96283: 06/02/01: John Larkin: Spartan3 pullups
    96323: 06/02/02: Allan Herriman: Re: Spartan3 pullups
        96326: 06/02/01: John Larkin: Re: Spartan3 pullups
            96331: 06/02/02: James Kennedy: Re: Spartan3 pullups
    96330: 06/02/01: johnp: Re: Spartan3 pullups
    96333: 06/02/02: Jim Granville: Re: Spartan3 pullups
    96346: 06/02/02: Brian Davis: Re: Spartan3 pullups
    96369: 06/02/02: Steve Knapp (Xilinx Spartan-3 Generation FPGAs): Re: Spartan3 pullups
96293: 06/02/01: Anonymous: xilinx linux source?
    96348: 06/02/02: tony.p.lee@gmail.com: Re: xilinx linux source?
        96350: 06/02/02: Paul Hartke: Re: xilinx linux source?
    96355: 06/02/02: Peter Ryser: Re: xilinx linux source?
        96357: 06/02/02: Anonymous: Re: xilinx linux source?
            96362: 06/02/02: Anonymous: Re: xilinx linux source?
                96409: 06/02/03: Thomas Gebauer: Re: xilinx linux source?
            96424: 06/02/03: Peter Ryser: Re: xilinx linux source?
    96358: 06/02/02: tony.p.lee@gmail.com: Re: xilinx linux source?
96296: 06/02/01: sandi: don't care condition
    96303: 06/02/01: Paul Johnson: Re: don't care condition
    96359: 06/02/02: Mike Treseler: Re: don't care condition
96302: 06/02/01: Nju Njoroge: PLB DDR Controller : Sl_rearbitrate issue
    96334: 06/02/02: Nju Njoroge: Re: PLB DDR Controller : Sl_rearbitrate issue
96305: 06/02/01: <troy.scott@latticesemi.com>: Lattice Semiconductor, Lattice Forums Go Live
96309: 06/02/02: Tim: BGA central ground matrix
    96315: 06/02/01: austin: Re: BGA central ground matrix
        96339: 06/02/02: Symon: Re: BGA central ground matrix
        96341: 06/02/02: Symon: Re: BGA central ground matrix
        96363: 06/02/02: Austin Lesea: Re: BGA central ground matrix
            96375: 06/02/02: Paul Johnson: Re: BGA central ground matrix
            96380: 06/02/02: austin: Re: BGA central ground matrix
                96381: 06/02/02: austin: Re: BGA central ground matrix
                    96382: 06/02/02: austin: Re: BGA central ground matrix
                        96385: 06/02/02: austin: Re: BGA central ground matrix
                            96387: 06/02/03: Jim Granville: Re: BGA central ground matrix
                                96545: 06/02/06: David Brown: Re: BGA central ground matrix
                            96388: 06/02/02: austin: Re: BGA central ground matrix
                        96401: 06/02/03: Uwe Bonnes: Re: BGA central ground matrix
                            96430: 06/02/03: Austin Lesea: Re: BGA central ground matrix
                        96410: 06/02/03: Brian Drummond: Re: BGA central ground matrix
                            96417: 06/02/03: Phil Hays: Re: BGA central ground matrix
                                96420: 06/02/03: Symon: Re: BGA central ground matrix
                                96422: 06/02/03: Phil Hays: Re: BGA central ground matrix
                                    96425: 06/02/03: Phil Hays: Re: BGA central ground matrix
                            96419: 06/02/03: Symon: Re: BGA central ground matrix
                            96428: 06/02/03: Brian Drummond: Re: BGA central ground matrix
                            96439: 06/02/04: Jim Granville: Re: BGA central ground matrix
                            96447: 06/02/03: Paul Johnson: Re: BGA central ground matrix
                        96493: 06/02/04: Hal Murray: Re: BGA central ground matrix
                            96498: 06/02/04: Hal Murray: Re: BGA central ground matrix
            96405: 06/02/03: Paul Johnson: Re: BGA central ground matrix
            96423: 06/02/03: dp: Re: BGA central ground matrix
        96406: 06/02/03: Paul Johnson: Re: BGA central ground matrix
            96431: 06/02/03: Austin Lesea: Re: BGA central ground matrix
                96442: 06/02/04: Jim Granville: Re: BGA central ground matrix
                    96451: 06/02/03: Austin Lesea: Re: BGA central ground matrix
                        96478: 06/02/04: Falk Brunner: Re: BGA central ground matrix
                            96484: 06/02/04: austin: Re: BGA central ground matrix
                                96485: 06/02/04: Falk Brunner: Re: BGA central ground matrix
                                    96489: 06/02/04: austin: Re: BGA central ground matrix
                        96574: 06/02/07: Jim Granville: Re: BGA central ground matrix
                            96579: 06/02/06: Hal Murray: Re: BGA central ground matrix
                    96702: 06/02/09: Jim Granville: Re: BGA central ground matrix
                    96703: 06/02/09: Jim Granville: Re: BGA central ground matrix
                96445: 06/02/03: Symon: Re: BGA central ground matrix
        96421: 06/02/03: dp: Re: BGA central ground matrix
    96317: 06/02/01: Gabor: Re: BGA central ground matrix
    96340: 06/02/02: colin: Re: BGA central ground matrix
    96377: 06/02/02: dp: Re: BGA central ground matrix
    96384: 06/02/02: dp: Re: BGA central ground matrix
    96386: 06/02/02: dp: Re: BGA central ground matrix
    96389: 06/02/02: dp: Re: BGA central ground matrix
    96390: 06/02/02: dp: Re: BGA central ground matrix
    96393: 06/02/02: Peter Alfke: Re: BGA central ground matrix
    96399: 06/02/03: al82: Re: BGA central ground matrix
    96400: 06/02/03: colin: Re: BGA central ground matrix
    96416: 06/02/03: dp: Re: BGA central ground matrix
    96440: 06/02/03: <fpga_toys@yahoo.com>: Re: BGA central ground matrix
    96693: 06/02/08: <fpga_toys@yahoo.com>: Re: BGA central ground matrix
    96697: 06/02/08: Peter Alfke: Re: BGA central ground matrix
    96701: 06/02/08: <fpga_toys@yahoo.com>: Re: BGA central ground matrix
96318: 06/02/02: Frank: How will synthesizers handle these statements?
    96349: 06/02/02: Mahmoud: Re: How will synthesizers handle these statements?
    96351: 06/02/02: Jason Zheng: Re: How will synthesizers handle these statements?
    96411: 06/02/03: <moogyd@yahoo.co.uk>: Re: How will synthesizers handle these statements?
    96460: 06/02/03: Rob Dekker: Re: How will synthesizers handle these statements?
96320: 06/02/01: Paul Marciano: Mixing and matching related clocks question.
    96328: 06/02/01: johnp: Re: Mixing and matching related clocks question.
    96541: 06/02/06: Gabor: Re: Mixing and matching related clocks question.
    96554: 06/02/06: Paul Marciano: Re: Mixing and matching related clocks question.
96325: 06/02/01: Sonali: high input to CPLD
    96338: 06/02/02: =?ISO-8859-1?Q?Michael_Sch=F6berl?=: Re: high input to CPLD
    96342: 06/02/02: Sonali: Re: high input to CPLD
    96353: 06/02/02: Peter Alfke: Re: high input to CPLD
    96365: 06/02/02: ernie: Re: high input to CPLD
96336: 06/02/02: Lori Lorenser: AC97 Controller
    96343: 06/02/02: Martin Schoeberl: Re: AC97 Controller
96344: 06/02/02: JL: Modelsim error when doing: port map(a => not(b))
    96345: 06/02/02: JL: Re: Modelsim error when doing: port map(a => not(b))
96370: 06/02/02: spammersarevermin: Microblaze question
    96374: 06/02/02: John Adair: Re: Microblaze question
    96383: 06/02/02: Phil Hays: Re: Microblaze question
        96391: 06/02/02: spammersarevermin: Re: Microblaze question
        96392: 06/02/02: spammersarevermin: Re: Microblaze question
        96397: 06/02/03: Simon Peacock: Re: Microblaze question
    96394: 06/02/02: <cs_posting@hotmail.com>: Re: Microblaze question
    96527: 06/02/06: backhus: Re: Microblaze question
96371: 06/02/02: Jeff Shafer: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
    96395: 06/02/02: Joseph: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
        96396: 06/02/03: Jeff Shafer: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
    96446: 06/02/03: Sylvain Munaut: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
        96455: 06/02/03: Jeff Shafer: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
            96463: 06/02/04: Sylvain Munaut: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
                98032: 06/03/03: Jeff Shafer: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
    97995: 06/03/02: Joseph: Re: Sharing BRAM between Xilinx PowerPC's (on data-OCM ports)
96372: 06/02/02: agou: Source address in IPIC
96376: 06/02/02: agou: IP2IP_Addr in IPIF
    96408: 06/02/03: Nju Njoroge: Re: IP2IP_Addr in IPIF
    96448: 06/02/03: agou: Re: IP2IP_Addr in IPIF
    96486: 06/02/04: Nju Njoroge: Re: IP2IP_Addr in IPIF
    97598: 06/02/24: Mich: Re: IP2IP_Addr in IPIF
    97933: 06/03/01: Nju Njoroge: Re: IP2IP_Addr in IPIF
96378: 06/02/02: dolbowent: I need your process pictures
96379: 06/02/02: dolbowent: I need your process pictures
96398: 06/02/03: Caleb Leak: FPGA growth vs. ASIC growth
    96407: 06/02/03: Paul Johnson: Re: FPGA growth vs. ASIC growth
        96453: 06/02/03: Austin Lesea: Re: FPGA growth vs. ASIC growth
            96461: 06/02/03: Paul Johnson: Re: FPGA growth vs. ASIC growth
                96464: 06/02/03: Austin Lesea: Re: FPGA growth vs. ASIC growth
                    96568: 06/02/06: Raymund Hofmann: Re: FPGA growth vs. ASIC growth
                        96569: 06/02/06: Raymund Hofmann: Re: FPGA growth vs. ASIC growth
                96512: 06/02/05: Paul Johnson: Re: FPGA growth vs. ASIC growth
                    96526: 06/02/06: Caleb Leak: Re: FPGA growth vs. ASIC growth
                        96543: 06/02/06: Paul Johnson: Re: FPGA growth vs. ASIC growth
        96454: 06/02/03: Paul Johnson: Re: FPGA growth vs. ASIC growth
    96434: 06/02/03: Peter Alfke: Re: FPGA growth vs. ASIC growth
    96444: 06/02/03: <cs_posting@hotmail.com>: Re: FPGA growth vs. ASIC growth
    96449: 06/02/03: Peter Alfke: Re: FPGA growth vs. ASIC growth
    96452: 06/02/03: <langwadt@ieee.org>: Re: FPGA growth vs. ASIC growth
    96459: 06/02/03: Peter Alfke: Re: FPGA growth vs. ASIC growth
    96465: 06/02/03: Peter Alfke: Re: FPGA growth vs. ASIC growth
    96469: 06/02/03: <cs_posting@hotmail.com>: Re: FPGA growth vs. ASIC growth
    96480: 06/02/04: gac1@ic.ac.uk: Re: FPGA growth vs. ASIC growth
    96552: 06/02/06: Andy Peters: Re: FPGA growth vs. ASIC growth
96402: 06/02/03: urielka: FPGA ogg Vorbis/Theora player
    96468: 06/02/03: Eric Smith: Re: FPGA ogg Vorbis/Theora player
    96515: 06/02/05: Adam Megacz: Re: FPGA ogg Vorbis/Theora player
    96625: 06/02/07: Martin Ellis: Re: FPGA ogg Vorbis/Theora player
96412: 06/02/03: JL: Xilinx: generic tristates and multiplexers
    96429: 06/02/03: Brian Drummond: Re: Xilinx: generic tristates and multiplexers
        96470: 06/02/04: Brian Drummond: Re: Xilinx: generic tristates and multiplexers
    96433: 06/02/03: JL: Re: Xilinx: generic tristates and multiplexers
96414: 06/02/03: Pasacco: [map error] unable to pack a IBUF into the IOB
    96415: 06/02/03: Falk Brunner: Re: [map error] unable to pack a IBUF into the IOB
    96427: 06/02/03: Pasacco: Re: unable to pack a IBUF into the IOB
96418: 06/02/03: <me_2003@walla.co.il>: question for the EDK users out there...
    96495: 06/02/04: Peter Ryser: Re: question for the EDK users out there...
        96514: 06/02/06: John Williams: Re: question for the EDK users out there...
            96695: 06/02/08: Greg Brown: Re: question for the EDK users out there...
            96699: 06/02/08: Peter Ryser: Re: question for the EDK users out there...
                96740: 06/02/10: John Williams: Re: question for the EDK users out there...
    96505: 06/02/05: <me_2003@walla.co.il>: Re: question for the EDK users out there...
    96531: 06/02/06: <me_2003@walla.co.il>: Re: question for the EDK users out there...
96426: 06/02/03: Martin Schoeberl: Quartus programmer problem
    96479: 06/02/04: Petter Gustad: Re: Quartus programmer problem
96435: 06/02/03: Michael Laajanen: quartus and VHDL/Verilog libraries
    96800: 06/02/10: Albert Chang: Re: quartus and VHDL/Verilog libraries
96436: 06/02/03: Michael Hennebry: why such fast placement?
    96437: 06/02/03: Mike Harrison: Re: why such fast placement?
    96438: 06/02/03: <fpga_toys@yahoo.com>: Re: why such fast placement?
    96441: 06/02/03: <fpga_toys@yahoo.com>: Re: why such fast placement?
    96476: 06/02/04: Hal Murray: Re: why such fast placement?
    96620: 06/02/07: Michael Hennebry: Re: why such fast placement?
    96644: 06/02/08: <fpga_toys@yahoo.com>: Re: why such fast placement?
96443: 06/02/03: Paul Marciano: Looking for literature on microprogrammed machines
    96450: 06/02/03: Philip Freidin: Re: Looking for literature on microprogrammed machines
    96456: 06/02/03: Paul Marciano: Re: Looking for literature on microprogrammed machines
    96457: 06/02/03: Paul Johnson: Re: Looking for literature on microprogrammed machines
    96458: 06/02/03: Paul Marciano: Re: Looking for literature on microprogrammed machines
96462: 06/02/03: <shawnn@gmail.com>: fpga hardware "breakpoint"
    96466: 06/02/03: Peter Alfke: Re: fpga hardware "breakpoint"
    96467: 06/02/03: Mike Treseler: Re: fpga hardware "breakpoint"
    96477: 06/02/04: Hans: Re: fpga hardware "breakpoint"
    96551: 06/02/06: <shawnn@gmail.com>: Re: fpga hardware "breakpoint"
        96553: 06/02/06: Antti Lukats: Re: fpga hardware "breakpoint"
96472: 06/02/03: CMOS: core generator
    96473: 06/02/03: Paul Hartke: Re: core generator
        96499: 06/02/05: Simon Peacock: Re: core generator
    96475: 06/02/04: CMOS: Re: core generator
96481: 06/02/04: CMOS: advanced vhdl lerning
    96497: 06/02/04: Pete Fraser: Re: advanced vhdl lerning
    96511: 06/02/05: <wallge@gmail.com>: Re: advanced vhdl lerning
96482: 06/02/04: Michael Laajanen: Xilinx compxlib error using VCS
96483: 06/02/04: Anonymous: multi-processor linux on xilinx
    96487: 06/02/04: Paul Hartke: Re: multi-processor linux on xilinx
        96496: 06/02/05: Anonymous: Re: multi-processor linux on xilinx
    96488: 06/02/04: John McCaskill: Re: multi-processor linux on xilinx
    96494: 06/02/04: Peter Ryser: Re: multi-processor linux on xilinx
    96501: 06/02/05: Sylvain Munaut: Re: multi-processor linux on xilinx
    96509: 06/02/06: John Williams: Re: multi-processor linux on xilinx
96490: 06/02/04: <chessaurus@yahoo.com>: High-density logic with simple, documented architecture ?
    96491: 06/02/04: <fpga_toys@yahoo.com>: Re: High-density logic with simple, documented architecture ?
96492: 06/02/04: davide: handle-c and xilinx
96503: 06/02/05: al99999: NMEA Decoder/Display
    96504: 06/02/05: rickman: Re: NMEA Decoder/Display
    96618: 06/02/07: Rene Tschaggelar: Re: NMEA Decoder/Display
    96627: 06/02/07: <kempaj@yahoo.com>: Re: NMEA Decoder/Display
        96677: 06/02/09: Jim Granville: Re: NMEA Decoder/Display
    96662: 06/02/08: al99999: Re: NMEA Decoder/Display
    96665: 06/02/08: Gabor: Re: NMEA Decoder/Display
    96673: 06/02/08: al99999: Re: NMEA Decoder/Display
    96686: 06/02/08: rickman: Re: NMEA Decoder/Display
96506: 06/02/05: Anonymous: usb gadgets and xilinx
    96510: 06/02/06: John Williams: Re: usb gadgets and xilinx
        96540: 06/02/06: Anonymous: Re: usb gadgets and xilinx
            96564: 06/02/07: John Williams: Re: usb gadgets and xilinx
96507: 06/02/05: rickman: Protected power calculation spread sheets
    96508: 06/02/05: Bill Martin: Re: Protected power calculation spread sheets
    96523: 06/02/05: <v_mirgorodsky@yahoo.com>: Re: Protected power calculation spread sheets
    96542: 06/02/06: James T. White: Re: Protected power calculation spread sheets
    96547: 06/02/06: rickman: Re: Protected power calculation spread sheets
    96688: 06/02/08: <paul.leventis@gmail.com>: Re: Protected power calculation spread sheets
    96690: 06/02/08: rickman: Re: Protected power calculation spread sheets
96513: 06/02/05: Paul Johnson: RocketIO & Infiniband BERs?
    96529: 06/02/06: PeteS: Re: RocketIO & Infiniband BERs?
96516: 06/02/05: Isaac Bosompem: VGA and framebuffer interface (Waste of BlockRAM)
    96517: 06/02/05: Isaac Bosompem: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96518: 06/02/05: <wv9557@yahoo.com>: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96520: 06/02/05: <abgoyal@gmail.com>: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96525: 06/02/05: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96528: 06/02/06: John Adair: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96538: 06/02/06: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96546: 06/02/06: Isaac Bosompem: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96550: 06/02/06: John_H: Re: VGA and framebuffer interface (Waste of BlockRAM)
        96556: 06/02/06: John_H: Re: VGA and framebuffer interface (Waste of BlockRAM)
    96555: 06/02/06: Isaac Bosompem: Re: VGA and framebuffer interface (Waste of BlockRAM)
96519: 06/02/06: Jonathan Schneider: Tefzel or Kynar for PCB mods ?
    96534: 06/02/06: Dave: Re: Tefzel or Kynar for PCB mods ?
    96535: 06/02/06: Leon: Re: Tefzel or Kynar for PCB mods ?
    96560: 06/02/06: Philip Freidin: Re: Tefzel or Kynar for PCB mods ?
        96614: 06/02/07: Peter Harrison: Re: Tefzel or Kynar for PCB mods ?
96522: 06/02/05: GEO: hprep crash with ISE 8.1i, service pack1
96537: 06/02/06: eehinjor: realize pci in fpga
    96544: 06/02/06: Alan Myler: Re: realize pci in fpga
        96576: 06/02/06: H. Peter Anvin: Re: realize pci in fpga
            96704: 06/02/09: Ian Muncaster: Re: realize pci in fpga
                96713: 06/02/09: Ian Muncaster: Re: realize pci in fpga
                    96715: 06/02/09: Ian Muncaster: Re: realize pci in fpga
                        97242: 06/02/19: Hal Murray: Re: realize pci in fpga
                    97721: 06/02/26: Thomas Rudloff: Re: realize pci in fpga
    96596: 06/02/07: Karl: Re: realize pci in fpga
    96659: 06/02/08: eehinjor: Re: realize pci in fpga
    96712: 06/02/09: eehinjor: Re: realize pci in fpga
    96714: 06/02/09: eehinjor: Re: realize pci in fpga
96539: 06/02/06: Sarun: Xilinx Pci Express core and Nital board Issue
96548: 06/02/06: Brad Smallridge: Xilinx MIG
    96549: 06/02/06: Brad Smallridge: Re: Xilinx MIG
96557: 06/02/06: <me_2003@walla.co.il>: microblaze xmd question..
    96563: 06/02/07: John Williams: Re: microblaze xmd question..
        96566: 06/02/07: John Williams: Re: microblaze xmd question..
            96571: 06/02/07: John Williams: Re: microblaze xmd question..
    96565: 06/02/06: <me_2003@walla.co.il>: Re: microblaze xmd question..
    96567: 06/02/06: <me_2003@walla.co.il>: Re: microblaze xmd question..
    96573: 06/02/06: <me_2003@walla.co.il>: Re: microblaze xmd question..
96561: 06/02/06: JL: Arbiter for several wires competing
    96562: 06/02/06: Slurp: Re: Arbiter for several wires competing
    96575: 06/02/06: Peter Alfke: Re: Arbiter for several wires competing
    96593: 06/02/07: JL: Re: Arbiter for several wires competing
    96631: 06/02/07: Peter Alfke: Re: Arbiter for several wires competing
    96651: 06/02/08: JL: Re: Arbiter for several wires competing
96570: 06/02/06: <zhangweidai@gmail.com>: Software Defined Radio Transmitter Demo Board
    96572: 06/02/06: Anonymous: Re: Software Defined Radio Transmitter Demo Board
        96653: 06/02/08: Anonymous: Re: Software Defined Radio Transmitter Demo Board
    96578: 06/02/06: Mike Treseler: Re: Software Defined Radio Transmitter Demo Board
    96640: 06/02/07: <zhangweidai@gmail.com>: Re: Software Defined Radio Transmitter Demo Board
    96641: 06/02/07: <zhangweidai@gmail.com>: Re: Software Defined Radio Transmitter Demo Board
96581: 06/02/06: Davy: Verilog 2's Complement Shifter
    96584: 06/02/07: Spehro Pefhany: Re: Verilog 2's Complement Shifter
    96587: 06/02/07: Alan Nishioka: Re: Verilog 2's Complement Shifter
        96605: 06/02/07: John_H: Re: Verilog 2's Complement Shifter
    96591: 06/02/07: ALuPin@web.de: Re: Verilog 2's Complement Shifter
    96616: 06/02/07: <sharp@cadence.com>: Re: Verilog 2's Complement Shifter
96582: 06/02/06: badari: clock problem --I new to this field so if question is silly don't mind
96583: 06/02/07: Jerome: cheap USB analyzer based on FPGA
    96632: 06/02/07: Eric Smith: Re: cheap USB analyzer based on FPGA
        96639: 06/02/08: Jerome: Re: cheap USB analyzer based on FPGA
            96646: 06/02/08: mk: Re: cheap USB analyzer based on FPGA
                96840: 06/02/11: Jerome: Re: cheap USB analyzer based on FPGA
                    96842: 06/02/11: Sylvain Munaut: Re: cheap USB analyzer based on FPGA
            96669: 06/02/08: Eric Smith: Re: cheap USB analyzer based on FPGA
    96718: 06/02/09: colin: Re: cheap USB analyzer based on FPGA
        96733: 06/02/09: Jerome: Re: cheap USB analyzer based on FPGA
            96944: 06/02/14: Jerome: Re: cheap USB analyzer based on FPGA
                96947: 06/02/14: Jerome: Re: cheap USB analyzer based on FPGA
    96732: 06/02/09: Andy Peters: Re: cheap USB analyzer based on FPGA
    96907: 06/02/13: <cs_posting@hotmail.com>: Re: cheap USB analyzer based on FPGA
96585: 06/02/06: badari: nios II stratix II handling interrrupts from uController
    96592: 06/02/07: avishay: Re: nios II stratix II handling interrrupts from uController
    96594: 06/02/07: badari: Re: nios II stratix II handling interrrupts from uController
96586: 06/02/06: GEO: Re: please let me know what hardware is generated for this piece of verilog code
96589: 06/02/07: venkat: doubt
    96598: 06/02/07: Subroto Datta: Re: doubt
96597: 06/02/07: Antonio Roldao Lopes: Xilinx Spartan 3 LVDS Misbehaving
    96671: 06/02/08: Antonio Roldao Lopes: Re: Xilinx Spartan 3 LVDS Misbehaving
96599: 06/02/07: Dolphin: Microblaze using SPI flash as instruction memory
    96602: 06/02/07: <cs_posting@hotmail.com>: Re: Microblaze using SPI flash as instruction memory
    96649: 06/02/08: Jan Coombs: Re: Microblaze using SPI flash as instruction memory
    96871: 06/02/12: Thomas Entner: Re: Microblaze using SPI flash as instruction memory
        96875: 06/02/13: Jim Granville: Re: Microblaze using SPI flash as instruction memory
            96895: 06/02/13: Thomas Entner: Re: Microblaze using SPI flash as instruction memory
            99678: 06/03/28: Jim Granville: Re: Microblaze using SPI flash as instruction memory
96600: 06/02/07: Karel: Software reset for the MicroBlaze
    96637: 06/02/08: Simon Peacock: Re: Software reset for the MicroBlaze
        96638: 06/02/08: John Williams: Re: Software reset for the MicroBlaze
            96696: 06/02/09: Simon Peacock: Re: Software reset for the MicroBlaze
                96741: 06/02/10: John Williams: Re: Software reset for the MicroBlaze
                    96760: 06/02/10: Simon Peacock: Re: Software reset for the MicroBlaze
    96700: 06/02/09: Zara: Re: Software reset for the MicroBlaze
96601: 06/02/07: Marco: input signals in ISE simulator
    96607: 06/02/07: John_H: Re: input signals in ISE simulator
96603: 06/02/07: Matt Clement: why does speed grade effect VHDL program??
    96606: 06/02/07: John_H: Re: why does speed grade effect VHDL program??
        96609: 06/02/07: Matt Clement: Re: why does speed grade effect VHDL program??
            96610: 06/02/07: Tim Wescott: Re: why does speed grade effect VHDL program??
                96613: 06/02/07: Symon: Re: why does speed grade effect VHDL program??
                    96615: 06/02/07: Tim Wescott: Re: why does speed grade effect VHDL program??
                        96621: 06/02/07: Symon: Re: why does speed grade effect VHDL program??
                            96622: 06/02/07: Matt Clement: Re: why does speed grade effect VHDL program??
            96611: 06/02/07: John Adair: Re: why does speed grade effect VHDL program??
                96617: 06/02/07: Matt Clement: Re: why does speed grade effect VHDL program??
                    96619: 06/02/07: Matt Clement: Re: why does speed grade effect VHDL program??
                        96623: 06/02/07: Symon: Re: why does speed grade effect VHDL program??
                            96624: 06/02/07: Matt Clement: Re: why does speed grade effect VHDL program??
                                96648: 06/02/08: =?ISO-8859-1?Q?Michael_Sch=F6berl?=: Re: why does speed grade effect VHDL program??
                                    96707: 06/02/09: David R Brooks: Re: why does speed grade effect VHDL program??
                    96652: 06/02/08: Matt Clement: Re: why does speed grade effect VHDL program??
                        96657: 06/02/08: =?ISO-8859-15?Q?Michael_Sch=F6berl?=: Re: why does speed grade effect VHDL program??
                            96721: 06/02/09: Matt Clement: Re: why does speed grade effect VHDL program??
    96634: 06/02/07: Andy Peters: Re: why does speed grade effect VHDL program??
    96643: 06/02/07: Thomas Stanka: Re: why does speed grade effect VHDL program??
    96680: 06/02/08: ernie: Re: why does speed grade effect VHDL program??
    96730: 06/02/09: ernie: Re: why does speed grade effect VHDL program??
    96793: 06/02/10: why_don't_you_listen?: Re: why does speed grade effect VHDL program??
        96801: 06/02/10: Symon: Re: why does speed grade effect VHDL program??
96604: 06/02/07: <me_2003@walla.co.il>: Microblaze Virtual platform problem
    96750: 06/02/09: siva.velusamy@gmail.com: Re: Microblaze Virtual platform problem
96608: 06/02/07: richard: latest XILINX WebPack is totally broken
    96628: 06/02/07: Steve Lass: Re: latest XILINX WebPack is totally broken
        96633: 06/02/08: Sylvain Munaut: Re: latest XILINX WebPack is totally broken
            96636: 06/02/08: Simon Peacock: Re: latest XILINX WebPack is totally broken
            96678: 06/02/08: Rich Grise: Re: latest XILINX WebPack is totally broken
        96735: 06/02/09: Steve Lass: Re: latest XILINX WebPack is totally broken
    96629: 06/02/07: Leon: Re: latest XILINX WebPack is totally broken
    96635: 06/02/07: Brian Davis: Re: latest XILINX WebPack is totally broken
    96728: 06/02/09: richard: Re: latest XILINX WebPack is totally broken
    96729: 06/02/09: richard: Re: latest XILINX WebPack is totally broken
    97899: 06/03/01: richard: Re: latest XILINX WebPack is totally broken
96612: 06/02/07: <jaxato@gmail.com>: Spartan3 Live Insertion with XC9572XL chip
96626: 06/02/07: DerekSimmons@FrontierNet.net: Looking for information on SGRAM and GDDR
96630: 06/02/07: Brad Smallridge: ISE Simulator
    96642: 06/02/07: Marco: Re: ISE Simulator
        96674: 06/02/08: Brad Smallridge: Re: ISE Simulator
        96684: 06/02/08: Brad Smallridge: Re: ISE Simulator
96645: 06/02/08: <hyankijitu@gmail.com>: I2C timing problem
    96655: 06/02/08: Gabor: Re: I2C timing problem
96647: 06/02/08: Leow Yuan Yeow: DK: Interfacing Handel C and VHDL
96650: 06/02/08: vssumesh: How to gnerate VCD file with hex outputs.
    96711: 06/02/09: Jon: Re: How to gnerate VCD file with hex outputs.
    97177: 06/02/17: vssumesh: Re: How to gnerate VCD file with hex outputs.
96654: 06/02/08: Davy: Open Verification Libiary Free Download
    96656: 06/02/08: Uncle Noah: Re: Open Verification Libiary Free Download
    96709: 06/02/09: anupam: Re: Open Verification Libiary Free Download
    96710: 06/02/09: anupam: Re: Open Verification Libiary Free Download
96658: 06/02/08: Antti: MicroBlaze in Spartan 3 playing tuxchess :)
    96663: 06/02/09: Jim Granville: Re: MicroBlaze in Spartan 3 playing tuxchess :)
        96670: 06/02/08: Antti Lukats: Re: MicroBlaze in Spartan 3 playing tuxchess :)
            96722: 06/02/09: Hans: Re: MicroBlaze in Spartan 3 playing tuxchess :)
    96664: 06/02/09: Jim Granville: Re: MicroBlaze in Spartan 3 playing tuxchess :)
        96666: 06/02/08: Antti Lukats: Re: MicroBlaze in Spartan 3 playing tuxchess :)
96660: 06/02/08: Michael Laajanen: Re: vhdl to edif
    96672: 06/02/08: Michael Laajanen: Re: vhdl to edif
    96706: 06/02/09: Leow Yuan Yeow: Re: vhdl to edif
96661: 06/02/08: Sean Durkin: Virtex4 Powerdown, Vcco questions
    96667: 06/02/08: austin: Re: Virtex4 Powerdown, Vcco questions
        96698: 06/02/09: Sean Durkin: Re: Virtex4 Powerdown, Vcco questions
96668: 06/02/08: <fpga_toys@yahoo.com>: Re: vhdl to edif
96675: 06/02/08: Duane Clark: Re: vhdl to edif
    96705: 06/02/09: Michael Laajanen: Re: vhdl to edif
    96727: 06/02/09: Duane Clark: Re: vhdl to edif
    96734: 06/02/09: Leow Yuan Yeow: Re: vhdl to edif
96676: 06/02/09: Jim Granville: Async Processors
    96685: 06/02/08: <wtxwtx@gmail.com>: Re: Async Processors
    96689: 06/02/08: rickman: Re: Async Processors
        96691: 06/02/09: Jim Granville: Re: Async Processors
            96743: 06/02/10: Jim Granville: Re: Async Processors
                96753: 06/02/10: Jim Granville: Re: Async Processors
                    96761: 06/02/10: Simon Peacock: Re: Async Processors
                96772: 06/02/10: Paul Johnson: Re: Async Processors
        96773: 06/02/10: Paul Johnson: Re: Async Processors
            96797: 06/02/11: Jim Granville: Re: Async Processors
                96818: 06/02/11: Jim Granville: Re: Async Processors
                    96846: 06/02/12: Jim Granville: Re: Async Processors
    96692: 06/02/08: <fpga_toys@yahoo.com>: Re: Async Processors
    96737: 06/02/09: rickman: Re: Async Processors
    96738: 06/02/09: rickman: Re: Async Processors
        96825: 06/02/11: Allan Herriman: Re: Async Processors
            96841: 06/02/12: Allan Herriman: Re: Async Processors
                96908: 06/02/13: Martin Ellis: Re: Async Processors
                    96913: 06/02/14: Allan Herriman: Re: Async Processors
                        96920: 06/02/14: Allan Herriman: Re: Async Processors
        96826: 06/02/10: <fpga_toys@yahoo.com>: Re: Async Processors
    96742: 06/02/09: <fpga_toys@yahoo.com>: Re: Async Processors
    96744: 06/02/09: rickman: Re: Async Processors
    96746: 06/02/09: rickman: Re: Async Processors
    96751: 06/02/09: <fpga_toys@yahoo.com>: Re: Async Processors
        96917: 06/02/13: <fpga_toys@yahoo.com>: Re: Async Processors
    96759: 06/02/09: rickman: Re: Async Processors
    96765: 06/02/09: rickman: Re: Async Processors
    96767: 06/02/09: <fpga_toys@yahoo.com>: Re: Async Processors
    96775: 06/02/10: rickman: Re: Async Processors
    96795: 06/02/10: rickman: Re: Async Processors
    96803: 06/02/10: Andy Peters: Re: Async Processors
    96805: 06/02/10: rickman: Re: Async Processors
    96807: 06/02/10: <fpga_toys@yahoo.com>: Re: Async Processors
    96809: 06/02/10: <fpga_toys@yahoo.com>: Re: Async Processors
    96811: 06/02/10: <fpga_toys@yahoo.com>: Re: Async Processors
    96812: 06/02/10: rickman: Re: Async Processors
    96814: 06/02/10: <fpga_toys@yahoo.com>: Re: Async Processors
    96819: 06/02/10: <Interfacebus.Engineer@gmail.com>: Re: Async Processors
    96820: 06/02/10: rickman: Re: Async Processors
    96821: 06/02/10: <fpga_toys@yahoo.com>: Re: Async Processors
    96845: 06/02/11: <fpga_toys@yahoo.com>: Re: Async Processors
    96861: 06/02/12: Predictor: Re: Async Processors
    96885: 06/02/12: rickman: Re: Async Processors
    96890: 06/02/12: <fpga_toys@yahoo.com>: Re: Async Processors
    96891: 06/02/12: <fpga_toys@yahoo.com>: Re: Async Processors
    96893: 06/02/13: <fpga_toys@yahoo.com>: Re: Async Processors
    96909: 06/02/13: <fpga_toys@yahoo.com>: Re: Async Processors
96679: 06/02/08: Roel: Which workstation or server should I take to build a state-of-the-art
    96683: 06/02/08: Josh Rosen: Re: Which workstation or server should I take to build a state-of-the-art FPGA CAE tool workstation?
96687: 06/02/08: PeterC: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96708: 06/02/09: Symon: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
        96723: 06/02/09: John_H: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest
            96764: 06/02/10: John_H: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest
            96768: 06/02/09: Daniel Lang: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
                96886: 06/02/13: Jim Granville: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest
    96719: 06/02/09: Raymund Hofmann: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96736: 06/02/10: Jim Granville: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest
        96755: 06/02/10: Jim Granville: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest
            96810: 06/02/10: Brian Drummond: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96739: 06/02/09: PeterC: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96749: 06/02/09: PeterC: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96752: 06/02/09: PeterC: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96754: 06/02/09: PeterC: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96756: 06/02/09: Peter Alfke: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96763: 06/02/09: PeterC: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96855: 06/02/11: Peter Alfke: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
    96880: 06/02/12: PeterC: Re: Parallel NCO (DDS) in Spartan3 for clock synthesis - highest possible speed?
96694: 06/02/08: Leow Yuan Yeow: vhdl to edif
    96726: 06/02/09: Brannon: Re: vhdl to edif
96716: 06/02/09: <me_2003@walla.co.il>: EDK - PLB/OPB Bus questions.
    96770: 06/02/10: Zara: Re: EDK - PLB/OPB Bus questions.
        97051: 06/02/15: Enno Luebbers: Re: EDK - PLB/OPB Bus questions.
    96776: 06/02/10: <me_2003@walla.co.il>: Re: EDK - PLB/OPB Bus questions.
    96781: 06/02/10: John McCaskill: Re: EDK - PLB/OPB Bus questions.
    96784: 06/02/10: <me_2003@walla.co.il>: Re: EDK - PLB/OPB Bus questions.
    96990: 06/02/14: <me_2003@walla.co.il>: Re: EDK - PLB/OPB Bus questions.
    98558: 06/03/12: <me_2003@walla.co.il>: Re: EDK - PLB/OPB Bus questions.
96717: 06/02/09: S.T.: OPB busmaster device
96720: 06/02/09: Gabor: Lattice high-end devices announced after years of rumours...
96724: 06/02/09: methi: Need help with generating video patterns using VHDL
    96725: 06/02/09: John_H: Re: Need help with generating video patterns using VHDL
        97000: 06/02/14: John_H: Re: Need help with generating video patterns using VHDL
    96999: 06/02/14: methi: Re: Need help with generating video patterns using VHDL
    97446: 06/02/22: methi: Re: Need help with generating video patterns using VHDL
96731: 06/02/09: rickman: Lattice new ECP2 parts
96745: 06/02/09: Brad Smallridge: Xilinx ISERDES Q1 issues
    96747: 06/02/09: Brad Smallridge: Re: Xilinx ISERDES Q1 issues
    96748: 06/02/09: Brad Smallridge: Re: Xilinx ISERDES Q1 issues
96757: 06/02/09: mBird: ModelSim # Error loading design
    96771: 06/02/10: Hans: Re: ModelSim # Error loading design
        96780: 06/02/10: mBird: Re: ModelSim # Error loading design
            96782: 06/02/10: Hans: Re: ModelSim # Error loading design
                96790: 06/02/10: mBird: Re: ModelSim # Error loading design
    96786: 06/02/10: VIPS: Re: ModelSim # Error loading design
        96792: 06/02/10: mBird: Re: ModelSim # Error loading design
96758: 06/02/09: motty: Simulation of MicroBlaze embedded system
    96769: 06/02/09: Paul Hartke: Re: Simulation of MicroBlaze embedded system
    96778: 06/02/10: <me_2003@walla.co.il>: Re: Simulation of MicroBlaze embedded system
    96787: 06/02/10: motty: Re: Simulation of MicroBlaze embedded system
    96789: 06/02/10: Paul Hartke: Re: Simulation of MicroBlaze embedded system
    96799: 06/02/10: motty: Re: Simulation of MicroBlaze embedded system
96762: 06/02/09: Isaac Bosompem: Spartan3 embedded synchronous multipliers
    96766: 06/02/09: austin: Re: Spartan3 embedded synchronous multipliers
    96798: 06/02/10: Marlboro: Re: Spartan3 embedded synchronous multipliers
    96804: 06/02/10: Steve Knapp (Xilinx Spartan-3 Generation FPGAs): Re: Spartan3 embedded synchronous multipliers
    96813: 06/02/10: Isaac Bosompem: Re: Spartan3 embedded synchronous multipliers
    96815: 06/02/10: Peter Alfke: Re: Spartan3 embedded synchronous multipliers
96774: 06/02/10: Antti: ANTTI*HAPPY: building MicroBlaze uClinux on WinXP full sucess !!
    96785: 06/02/10: Amontec, Larry: Re: ANTTI*HAPPY: building MicroBlaze uClinux on WinXP full sucess
    96788: 06/02/10: Paul Hartke: Re: ANTTI*HAPPY: building MicroBlaze uClinux on WinXP full sucess !!
    96791: 06/02/10: Antti: Re: ANTTI*HAPPY: building MicroBlaze uClinux on WinXP full sucess !!
96777: 06/02/10: Sky: Altera EPLD
    96779: 06/02/10: Noway2: Re: Altera EPLD
    96794: 06/02/10: Rene Tschaggelar: Re: Altera EPLD
        96802: 06/02/10: Sky: Re: Altera EPLD
            96806: 06/02/10: Rene Tschaggelar: Re: Altera EPLD
            96823: 06/02/11: Carl Smith: Re: Altera EPLD
            96824: 06/02/11: Jim Granville: Re: Altera EPLD
    96796: 06/02/10: Noway2: Re: Altera EPLD
    96817: 06/02/11: Philip Freidin: Re: Altera EPLD
    96883: 06/02/12: Andy Peters: Re: Altera EPLD
    97010: 06/02/14: Teo: Re: Altera EPLD
96783: 06/02/10: Eric: Spartan-3 Serial LVDS max speed?
96808: 06/02/10: Eric: SMP on virtex-ii pro
    96878: 06/02/13: John Williams: Re: SMP on virtex-ii pro
96816: 06/02/10: Ray Andraka: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
    96832: 06/02/11: John Adair: Re: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
    96834: 06/02/11: Roger: Re: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
        96843: 06/02/11: Ray Andraka: Re: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
            96850: 06/02/12: Roger: Re: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
                96854: 06/02/11: Ray Andraka: Re: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
                    97113: 06/02/16: MikeJ: Re: Xilinx 1.5v HSTL-I for QDR-II. Anybody successful with it?
96822: 06/02/11: James Ma: Using Ethernet to control/initialize FPGA
96828: 06/02/11: avishay: Creating low freq. clock on Altera FPGA
    96835: 06/02/11: Peter Alfke: Re: Creating low freq. clock on Altera FPGA
    96866: 06/02/12: PeteS: Re: Creating low freq. clock on Altera FPGA
96829: 06/02/11: maxascent: LVDS
    96837: 06/02/12: Allan Herriman: Re: LVDS
    96838: 06/02/11: dp: Re: LVDS
        96844: 06/02/11: maxascent: Re: LVDS
96830: 06/02/11: chaitu11311@gmail.com: which one among the available FPGAs is best for a fresher?
    96831: 06/02/11: John Adair: Re: which one among the available FPGAs is best for a fresher?
    96847: 06/02/11: <fpga_toys@yahoo.com>: Re: which one among the available FPGAs is best for a fresher?
    96851: 06/02/11: Hal Murray: Re: which one among the available FPGAs is best for a fresher?
    96859: 06/02/11: Jerry Coffin: Re: which one among the available FPGAs is best for a fresher?
        96864: 06/02/12: John Adair: Re: which one among the available FPGAs is best for a fresher?
            96865: 06/02/12: John Adair: Re: which one among the available FPGAs is best for a fresher?
    96867: 06/02/12: Herman Dullink: Re: which one among the available FPGAs is best for a fresher?
96833: 06/02/11: wicky: using FPGA in control field
    96836: 06/02/11: Tim Wescott: Re: using FPGA in control field
    96839: 06/02/11: wicky: Re: using FPGA in control field
    96849: 06/02/11: <fpga_toys@yahoo.com>: Re: using FPGA in control field
    96852: 06/02/12: Gary Pace: Re: using FPGA in control field
        96853: 06/02/11: Ray Andraka: Re: using FPGA in control field
            96857: 06/02/11: Tim Wescott: Re: using FPGA in control field
    96858: 06/02/11: wicky: Re: using FPGA in control field
    96879: 06/02/12: kdfake@spam.com: Re: using FPGA in control field
    96884: 06/02/12: wicky: Re: using FPGA in control field
96848: 06/02/11: Giox: Simulation problem using CONV_INTEGER
    96862: 06/02/12: Dan NITA: Re: Simulation problem using CONV_INTEGER
    96869: 06/02/12: Brian Drummond: Re: Simulation problem using CONV_INTEGER
96856: 06/02/11: Remis Norvilis: Re: SDRAM Controller
96860: 06/02/12: <aiiadict@gmail.com>: schematic capture
96863: 06/02/12: Piotr Wyderski: Spartan3 configuration
96872: 06/02/12: <zhangweidai@gmail.com>: spartan3 starter kit.
    96873: 06/02/12: <aiiadict@gmail.com>: Re: spartan3 starter kit.
    96882: 06/02/12: Hal Murray: Re: spartan3 starter kit.
        96896: 06/02/13: Symon: Re: spartan3 starter kit.
            96897: 06/02/13: Mike Harrison: Re: spartan3 starter kit.
                96898: 06/02/13: Symon: Re: spartan3 starter kit.
                    96901: 06/02/13: Mike Harrison: Re: spartan3 starter kit.
                    96902: 06/02/13: John Adair: Re: spartan3 starter kit.
                        96906: 06/02/13: Symon: Re: spartan3 starter kit.
    96894: 06/02/13: <zhangweidai@gmail.com>: Re: spartan3 starter kit.
96874: 06/02/12: <aiiadict@gmail.com>: digital logic library by 74xxxx part number?
    96876: 06/02/12: Slurp: Re: digital logic library by 74xxxx part number?
    96877: 06/02/12: <aiiadict@gmail.com>: Re: digital logic library by 74xxxx part number?
        96892: 06/02/13: backhus: Re: digital logic library by 74xxxx part number?
            96932: 06/02/13: Mike Treseler: Re: digital logic library by 74xxxx part number?
                96972: 06/02/14: Jan Panteltje: Re: digital logic library by 74xxxx part number?
                    97019: 06/02/14: Jeff Cunningham: Re: digital logic library by 74xxxx part number?
            97004: 06/02/14: Slurp: Re: digital logic library by 74xxxx part number?
                97024: 06/02/15: Hal Murray: Re: digital logic library by 74xxxx part number?
            97096: 06/02/16: Mike Treseler: Re: digital logic library by 74xxxx part number?
    96887: 06/02/12: richard: Re: digital logic library by 74xxxx part number?
    96919: 06/02/13: richard: Re: digital logic library by 74xxxx part number?
    96922: 06/02/13: Andy Peters: Re: digital logic library by 74xxxx part number?
    96930: 06/02/13: Peter Alfke: Re: digital logic library by 74xxxx part number?
    97007: 06/02/14: Peter Alfke: Re: digital logic library by 74xxxx part number?
    97053: 06/02/15: Peter Alfke: Re: digital logic library by 74xxxx part number?
    97057: 06/02/15: <jboothbee@gmail.com>: Re: digital logic library by 74xxxx part number?
    97061: 06/02/15: Andy Peters: Re: digital logic library by 74xxxx part number?
96881: 06/02/13: matt: Xilinx + I2C + PPC -> crash
96888: 06/02/12: Pablo Bleyer Kocik: PacoBlaze updated
    96915: 06/02/14: Allan Herriman: Re: PacoBlaze updated
    96928: 06/02/13: Pablo Bleyer Kocik: Re: PacoBlaze updated
96889: 06/02/13: :-): Newb question about Xilinx Impact and parallel cable III ....
    96899: 06/02/13: PeteS: Re: Newb question about Xilinx Impact and parallel cable III ....
        96952: 06/02/14: :-): Re: Newb question about Xilinx Impact and parallel cable III ....
            96953: 06/02/14: :-): Re: Newb question about Xilinx Impact and parallel cable III ....
                96955: 06/02/14: :-): Re: Newb question about Xilinx Impact and parallel cable III ....
96900: 06/02/13: Bertrand Rousseau: How to decode FAR register in Virtex-4?
    96959: 06/02/14: Stephane: Re: How to decode FAR register in Virtex-4?
    96963: 06/02/14: Bertrand Rousseau: Re: How to decode FAR register in Virtex-4?
    96967: 06/02/14: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: How to decode FAR register in Virtex-4?
    96969: 06/02/14: Bertrand Rousseau: Re: How to decode FAR register in Virtex-4?
    96970: 06/02/14: Bertrand Rousseau: Re: How to decode FAR register in Virtex-4?
    96977: 06/02/14: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: How to decode FAR register in Virtex-4?
96903: 06/02/13: Antti: [ANN] MicroBlaze uClinux FPGA module (with microwindows) at Embedded
    96904: 06/02/13: Uwe Bonnes: Re: [ANN] MicroBlaze uClinux FPGA module (with microwindows) at Embedded
    96905: 06/02/13: Antti: Re: MicroBlaze uClinux FPGA module (with microwindows) at Embedded
96910: 06/02/13: guy: xilinx ise 8.1 mig 1.4 /1.5
96911: 06/02/13: Tom Dahlen: spartan-3e starter kit
    96933: 06/02/13: <elf_ster@hotmail.com>: Re: spartan-3e starter kit
        96941: 06/02/13: Eric Smith: Re: spartan-3e starter kit
        96948: 06/02/14: John_H: Re: spartan-3e starter kit
            97002: 06/02/14: Tom Dahlen: Re: spartan-3e starter kit
                98805: 06/03/16: Uwe Bonnes: Re: spartan-3e starter kit
                    98809: 06/03/16: Uwe Bonnes: Re: spartan-3e starter kit
                        98850: 06/03/17: Uwe Bonnes: Re: spartan-3e starter kit
                            98940: 06/03/17: Uwe Bonnes: Re: spartan-3e starter kit
    97036: 06/02/15: Antti: Re: spartan-3e starter kit
    98770: 06/03/16: henk: Re: spartan-3e starter kit
    98807: 06/03/16: henk: Re: spartan-3e starter kit
    98837: 06/03/16: Antti: Re: spartan-3e starter kit
    98859: 06/03/17: Antti: Re: spartan-3e starter kit
96912: 06/02/13: ndt: Rocketio, modelsim xe
    96924: 06/02/14: Gerhard Hoffmann: Re: Rocketio, modelsim xe
    96996: 06/02/14: beeraka@gmail.com: Re: Rocketio, modelsim xe
96914: 06/02/13: fpga: Question about using LMB to connect BRAM in MicroBlaze
    96916: 06/02/13: Antti Lukats: Re: Question about using LMB to connect BRAM in MicroBlaze
    96918: 06/02/13: fpga: Re: Question about using LMB to connect BRAM in MicroBlaze
96921: 06/02/13: richard: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    96923: 06/02/13: JJ: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    96929: 06/02/13: Mike Treseler: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    96934: 06/02/14: Mark McDougall: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
        96935: 06/02/14: Andrew Ward: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
            96938: 06/02/13: Jeff Cunningham: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                96939: 06/02/14: Andrew Ward: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
            96958: 06/02/14: Symon: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                96982: 06/02/14: Ray Andraka: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                    96987: 06/02/14: Symon: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                        97005: 06/02/15: Jim Granville: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
            97328: 06/02/20: metal: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                97334: 06/02/21: Symon: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                    97468: 06/02/22: metal: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                        97491: 06/02/23: Symon: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
                        97511: 06/02/23: Ben Jones: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
        97118: 06/02/16: Adam Megacz: state-of-the-art schematic generation? [Was: SCHEMATICS ... ]
            97123: 06/02/16: Bob Perlman: Re: state-of-the-art schematic generation? [Was: SCHEMATICS ... ]
            97664: 06/02/26: Alex Gibson: Re: state-of-the-art schematic generation? [Was: SCHEMATICS ... ]
    96964: 06/02/14: PeteS: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    96993: 06/02/14: aan.woodz@gmail.com: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    97329: 06/02/20: <fpga_toys@yahoo.com>: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    97332: 06/02/20: Hendra: Re: SCHEMATICS ... Is anybody as frustrated as I am with the software?
    97333: 06/02/20: JJ: Re: state-of-the-art schematic generation? [Was: SCHEMATICS ... ]
96925: 06/02/13: Al Clark: Altera RoHS Irony
    96926: 06/02/14: Jim Granville: Re: Altera RoHS Irony
    96927: 06/02/13: Hul Tytus: Re: Altera RoHS Irony
        96956: 06/02/14: David Brown: Re: Altera RoHS Irony
            96992: 06/02/14: Al Clark: Re: Altera RoHS Irony
                96995: 06/02/14: Nial Stewart: Re: Altera RoHS Irony
                    97008: 06/02/14: Al Clark: Re: Altera RoHS Irony
                        97016: 06/02/15: Al Clark: Re: Altera RoHS Irony
                            97021: 06/02/15: Jim Granville: Re: Altera RoHS Irony
                                97028: 06/02/15: Al Clark: Re: Altera RoHS Irony
                        97032: 06/02/15: Luc: Re: Altera RoHS Irony
                            97042: 06/02/15: nospam: Re: Altera RoHS Irony
                                97043: 06/02/15: David Brown: Re: Altera RoHS Irony
                                    97052: 06/02/15: nospam: Re: Altera RoHS Irony
                                        97093: 06/02/16: David Brown: Re: Altera RoHS Irony
                        97037: 06/02/15: David Brown: Re: Altera RoHS Irony
                    97009: 06/02/14: Markus Meng: Re: Altera RoHS Irony
    96940: 06/02/13: rickman: Re: Altera RoHS Irony
    96965: 06/02/14: rickman: Re: Altera RoHS Irony
    97013: 06/02/14: Dave Greenfield: Re: Altera RoHS Irony
    97018: 06/02/14: rickman: Re: Altera RoHS Irony
    97022: 06/02/14: PeteS: Re: Altera RoHS Irony
    97027: 06/02/15: Fredrik: Re: Altera RoHS Irony
    97060: 06/02/15: <kevinjwhite@comcast.net>: Re: Altera RoHS Irony
96931: 06/02/13: <shawnn@gmail.com>: "does not fanout" warnings with inouts
96936: 06/02/13: upforever: microblaze with FSL
    96951: 06/02/13: siva.velusamy@gmail.com: Re: microblaze with FSL
        97069: 06/02/15: upforever: Re: microblaze with FSL
96937: 06/02/13: motty: EDK Simulation
96942: 06/02/13: radarman: Problem programming Altera flex 10k100 & EPC2
    96957: 06/02/14: Hal Murray: Re: Problem programming Altera flex 10k100 & EPC2
    96985: 06/02/14: radarman: Re: Problem programming Altera flex 10k100 & EPC2
96943: 06/02/13: <svasus@gmail.com>: I2C and posedge sampling
    96946: 06/02/14: Jim Granville: Re: I2C and posedge sampling
    96949: 06/02/14: John_H: Re: I2C and posedge sampling
    97178: 06/02/18: <svasus@gmail.com>: Re: I2C and posedge sampling
96945: 06/02/13: <Sudhir.Singh@email.com>: Entity with Multiple Architectures
    96954: 06/02/14: backhus: Re: Entity with Multiple Architectures
        98696: 06/03/15: Kolja Sulimma: Re: Entity with Multiple Architectures
96950: 06/02/13: Yaseen Zaidi: Dual Port Block RAM Inference
96960: 06/02/14: <bhatti1127@yahoo.com>: Block vs. Distributed RAMs
    96962: 06/02/14: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: Block vs. Distributed RAMs
96961: 06/02/14: Sonali: ModelSim Licence problem
    96981: 06/02/14: =?iso-8859-1?B?R2FMYUt0SWtVc5k=?=: Re: ModelSim Licence problem
    96984: 06/02/14: Kolja Sulimma: Re: ModelSim Licence problem
96966: 06/02/14: Pete Robinson: Which SelectIO for FPGA <-> FPGA buses?
    96986: 06/02/14: Brannon: Re: Which SelectIO for FPGA <-> FPGA buses?
96968: 06/02/14: <the.gaffar@googlemail.com>: XPower report precision
    96971: 06/02/14: Aurelian Lazarut: Re: XPower report precision
        96991: 06/02/14: Brendan Cullen: Re: XPower report precision
    96988: 06/02/14: <the.gaffar@googlemail.com>: Re: XPower report precision
    96994: 06/02/14: <the.gaffar@googlemail.com>: Re: XPower report precision
    96998: 06/02/14: <the.gaffar@googlemail.com>: Re: XPower report precision
96973: 06/02/14: Matt Clement: is there a way to initialize signals to a value
    96974: 06/02/14: Matt Clement: Re: is there a way to tri-state outputs
    96980: 06/02/14: =?iso-8859-1?B?R2FMYUt0SWtVc5k=?=: Re: is there a way to initialize signals to a value
    96989: 06/02/14: radarman: Re: is there a way to initialize signals to a value
        96997: 06/02/14: Aurelian Lazarut: Re: is there a way to initialize signals to a value
            97006: 06/02/14: Matt Clement: Re: is there a way to initialize signals to a value
                97030: 06/02/15: Aurelian Lazarut: Re: is there a way to initialize signals to a value
96975: 06/02/14: Brian Davis: 8.1i SP2 download problems
    97040: 06/02/15: Antti: Re: 8.1i SP2 download problems
    97073: 06/02/15: Brian Davis: Re: 8.1i SP2 download problems
    97086: 06/02/16: Jon Beniston: Re: 8.1i SP2 download problems
96976: 06/02/14: <zhangxun0501@gmail.com>: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    96978: 06/02/14: Symon: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
        97017: 06/02/14: Steve Lass: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    96979: 06/02/14: Javier Castillo: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
        97025: 06/02/15: Stephane: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
        97026: 06/02/15: Javier Castillo: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
            97923: 06/03/01: Vic Vadi: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                97954: 06/03/02: Frank: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                    97967: 06/03/02: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                    98120: 06/03/06: Frank: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                        98122: 06/03/05: Steve Lass: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98131: 06/03/06: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98190: 06/03/07: Identity Hidden: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                98236: 06/03/07: Steve Lass: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                97957: 06/03/02: Sean Durkin: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                    97971: 06/03/02: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                        98037: 06/03/03: Sean Durkin: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98039: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                98050: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                    98059: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                    98069: 06/03/03: Nick Camilleri: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                        98092: 06/03/04: Rainer Buchty: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98129: 06/03/06: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                    98010: 06/03/03: Steve Lass: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                        98018: 06/03/03: Symon: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98019: 06/03/03: Symon: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98026: 06/03/03: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                98028: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                    98034: 06/03/03: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                98029: 06/03/03: Symon: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                    98036: 06/03/03: Ivan: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98027: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                98031: 06/03/03: Symon: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                    98038: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                        98060: 06/03/03: Austin Lesea: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                            98067: 06/03/04: John_H: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
                                98071: 06/03/04: John_H: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    97014: 06/02/14: Peter Alfke: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    97945: 06/03/02: Love Singhal: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98014: 06/03/03: Love Singhal: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98049: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98054: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98055: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98066: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98068: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98070: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98074: 06/03/03: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98090: 06/03/04: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98098: 06/03/04: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98099: 06/03/04: <fpga_toys@yahoo.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98230: 06/03/07: <zhangxun0501@gmail.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98298: 06/03/08: <zhangxun0501@gmail.com>: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98942: 06/03/17: Valerios: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
    98947: 06/03/17: Paul Hartke: Re: dynamic partial reconfiguration of Xilinx Virtex-4 FPGAs
96983: 06/02/14: mattdykes: Xilinx HDLParsers:810 or HDLParsers:3329
    97001: 06/02/14: Dave Pollum: Re: Xilinx HDLParsers:810 or HDLParsers:3329
        97046: 06/02/15: Symon: Re: Xilinx HDLParsers:810 or HDLParsers:3329
    97011: 06/02/14: mattdykes: Re: Xilinx HDLParsers:810 or HDLParsers:3329
    97065: 06/02/15: Dave Pollum: Re: Xilinx HDLParsers:810 or HDLParsers:3329
97003: 06/02/14: <vedpsingh@gmail.com>: Re: Problem of Initial Value in VHDL code
    97020: 06/02/14: agi: Re: Problem of Initial Value in VHDL code
97012: 06/02/14: <me_2003@walla.co.il>: EDK: OPB Question
    97063: 06/02/15: Paulo Dutra: Re: EDK: OPB Question
97015: 06/02/14: MM: Xilinx EDK BRAM confusion
    97058: 06/02/15: Paulo Dutra: Re: Xilinx EDK BRAM confusion
        97059: 06/02/15: Paulo Dutra: Re: Xilinx EDK BRAM confusion
        97062: 06/02/15: MM: Re: Xilinx EDK BRAM confusion
            97064: 06/02/15: Paulo Dutra: Re: Xilinx EDK BRAM confusion
97023: 06/02/15: Sophie Liu: What is back_annotate?
    97029: 06/02/15: Alan Myler: Re: What is back_annotate?
    97068: 06/02/16: Subroto Datta: Re: What is back_annotate?
97031: 06/02/15: ramesh: can i use gcc of EDK?
    97034: 06/02/15: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: can i use gcc of EDK?
97033: 06/02/15: <v_mirgorodsky@yahoo.com>: Re: What is back_annotate?
    97090: 06/02/16: Jude Wu: Re: What is back_annotate?
97035: 06/02/15: Antti: News from Embedded World in Nurnber
    97038: 06/02/15: Falk Brunner: Re: News from Embedded World in Nurnber
        97044: 06/02/15: David Brown: Re: News from Embedded World in Nurnber
        97045: 06/02/15: Falk Brunner: Re: News from Embedded World in Nurnber
    97039: 06/02/15: Antti: Re: News from Embedded World in Nurnber
    97067: 06/02/15: Uwe Bonnes: Re: News from Embedded World in Nurnber
    97166: 06/02/17: Antti Lukats: Re: News from Embedded World in Nurnber
        97531: 06/02/24: Jim Granville: Re: News from Embedded World in Nurnber
    97522: 06/02/23: Teo: Re: News from Embedded World in Nurnber
97041: 06/02/15: al99999: DDR SDRAM on ML401
97047: 06/02/15: Chris Gammell: EDK Woes and Worries
    97048: 06/02/15: Antti: Re: EDK Woes and Worries
    97049: 06/02/15: MM: Re: EDK Woes and Worries
        97054: 06/02/15: MM: Re: EDK Woes and Worries
        97056: 06/02/15: Symon: Re: EDK Woes and Worries
    97050: 06/02/15: Chris Gammell: Re: EDK Woes and Worries
    97055: 06/02/15: Peter Alfke: Re: EDK Woes and Worries
    97092: 06/02/16: Chris Gammell: Re: EDK Woes and Worries
97066: 06/02/15: Louis Dupont: Altera Stratix EP1S80 DSP Development Board Non-Volatile Configuration
97070: 06/02/15: upforever: system generator : interrupt with FSL
97071: 06/02/15: Brian Davis: DIFF_OUT buffer example
    97079: 06/02/16: Symon: Re: DIFF_OUT buffer example
        97083: 06/02/16: Tim: Re: DIFF_OUT buffer example
            97087: 06/02/16: Symon: Re: DIFF_OUT buffer example
        97084: 06/02/16: Symon: Re: DIFF_OUT buffer example
        97349: 06/02/21: Hal Murray: Re: DIFF_OUT buffer example
    97082: 06/02/16: Brian Davis: Re: DIFF_OUT buffer example
    97091: 06/02/16: Brian Davis: Re: DIFF_OUT buffer example
    97374: 06/02/21: Andy: Re: DIFF_OUT buffer example
    97403: 06/02/21: Brian Davis: Re: DIFF_OUT buffer example
    97405: 06/02/21: Brian Davis: Re: DIFF_OUT buffer example
    97429: 06/02/22: Sandro: Re: DIFF_OUT buffer example
97072: 06/02/15: dsp: system generator : change the default parameters
97074: 06/02/16: ML: What is 1QN and 2QN in Xilinx CORDIC ?
    97172: 06/02/17: Ray Andraka: Re: What is 1QN and 2QN in Xilinx CORDIC ?
97075: 06/02/16: mughat: CPLD-SPI_flash configuration system problem.
    97103: 06/02/16: Gabor: Re: CPLD-SPI_flash configuration system problem.
        97137: 06/02/17: mughat: Re: CPLD-SPI_flash configuration system problem.
    97145: 06/02/17: Gabor: Re: CPLD-SPI_flash configuration system problem.
97076: 06/02/16: zlyh: WebPACK license (and Quartus Web Edition too).
    97078: 06/02/16: Alan Myler: Re: WebPACK license (and Quartus Web Edition too).
        97301: 06/02/20: metal: Re: WebPACK license (and Quartus Web Edition too).
    97081: 06/02/16: Karl: Re: WebPACK license (and Quartus Web Edition too).
    97089: 06/02/16: Alex K: Re: WebPACK license (and Quartus Web Edition too).
        97108: 06/02/16: Ed McGettigan: Re: WebPACK license (and Quartus Web Edition too).
    97135: 06/02/16: zlyh: Re: WebPACK license (and Quartus Web Edition too).
    97319: 06/02/20: <fpga_toys@yahoo.com>: Re: WebPACK license (and Quartus Web Edition too).
    97375: 06/02/21: Steve Lass: Re: WebPACK license (and Quartus Web Edition too).
97077: 06/02/16: John Adair: EDl Lab
97080: 06/02/16: Sonali: delay using integrator
    97099: 06/02/16: Gabor: Re: delay using integrator
97085: 06/02/16: colin: pci express ac coupling
    97095: 06/02/16: Gabor: Re: pci express ac coupling
        97097: 06/02/16: Ian Muncaster: Re: pci express ac coupling
97088: 06/02/16: ada: DDR SDRAM Controller
    97094: 06/02/16: Gabor: Re: DDR SDRAM Controller
        97111: 06/02/16: ada: Re: DDR SDRAM Controller
            97184: 06/02/18: ada: Re: DDR SDRAM Controller
                97185: 06/02/18: Sylvain Munaut: Re: DDR SDRAM Controller
            97190: 06/02/18: boh!: Re: DDR SDRAM Controller
    97144: 06/02/17: Gabor: Re: DDR SDRAM Controller
    97148: 06/02/17: ALuPin@web.de: Re: DDR SDRAM Controller
    97263: 06/02/20: =?ISO-8859-15?Q?Michael_Sch=F6berl?=: Re: DDR SDRAM Controller
        97292: 06/02/20: ada: Re: DDR SDRAM Controller
            97293: 06/02/20: Falk Brunner: Re: DDR SDRAM Controller
                97428: 06/02/22: ada: Re: DDR SDRAM Controller
                    97459: 06/02/22: ada: Re: DDR SDRAM Controller
                        98133: 06/03/06: ada: Re: DDR SDRAM Controller
                            98254: 06/03/07: ada: Re: DDR SDRAM Controller
                                98643: 06/03/14: ada: Re: DDR SDRAM Controller
                                    98658: 06/03/14: ada: Re: DDR SDRAM Controller
                                        98740: 06/03/15: ada: Re: DDR SDRAM Controller
                                            100438: 06/04/09: ada: Re: DDR SDRAM Controller
    97278: 06/02/20: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: DDR SDRAM Controller
    97356: 06/02/21: ALuPin@web.de: Re: DDR SDRAM Controller
    97436: 06/02/22: ALuPin@web.de: Re: DDR SDRAM Controller
    97445: 06/02/22: PeteS: Re: DDR SDRAM Controller
    97478: 06/02/23: PeteS: Re: DDR SDRAM Controller
    97502: 06/02/23: Gabor: Re: DDR SDRAM Controller
    98139: 06/03/06: ALuPin@web.de: Re: DDR SDRAM Controller
    98140: 06/03/06: ALuPin@web.de: Re: DDR SDRAM Controller
    98649: 06/03/14: ALuPin@web.de: Re: DDR SDRAM Controller
    98650: 06/03/14: ALuPin@web.de: Re: DDR SDRAM Controller
    98655: 06/03/14: ALuPin@web.de: Re: DDR SDRAM Controller
    98661: 06/03/14: ALuPin@web.de: Re: DDR SDRAM Controller
97098: 06/02/16: CMOS: VHDL or verilog
    97100: 06/02/16: Dominik Froehlich: Re: VHDL or verilog
    97101: 06/02/16: Joseph Samson: Re: VHDL or verilog
    97102: 06/02/16: Mike Harrison: Re: VHDL or verilog
    97104: 06/02/16: Andy Peters: Re: VHDL or verilog
    97106: 06/02/16: Josh Rosen: Re: VHDL or verilog
        97109: 06/02/16: Dominik Froehlich: Re: VHDL or verilog
    97121: 06/02/16: <eziggurat@gmail.com>: Re: VHDL or verilog
    97130: 06/02/16: CMOS: Re: VHDL or verilog
97105: 06/02/16: Markus Kuhn: Implementing a two-modulus PLL divider in Altera Stratix II
    97107: 06/02/16: Peter Alfke: Re: Implementing a two-modulus PLL divider in Altera Stratix II
        97110: 06/02/16: austin: Re: Implementing a two-modulus PLL divider in Altera Stratix II
    97295: 06/02/20: Hal Murray: Re: Implementing a two-modulus PLL divider in Altera Stratix II
        97323: 06/02/21: Allan Herriman: Re: Implementing a two-modulus PLL divider in Altera Stratix II
        97326: 06/02/20: John_H: Re: Implementing a two-modulus PLL divider in Altera Stratix II
97112: 06/02/16: Shyam: User masks in HardCopy and HardCopy II
    97128: 06/02/16: Paul Hollingworth: Re: User masks in HardCopy and HardCopy II
        97131: 06/02/17: Jim Granville: Re: User masks in HardCopy and HardCopy II
    97132: 06/02/16: Shyam: Re: User masks in HardCopy and HardCopy II
97114: 06/02/16: <benkhalh@hotmail.com>: Need some Advice, please
    97115: 06/02/16: Peter Alfke: Re: Need some Advice, please
    97117: 06/02/16: Tim Wescott: Re: Need some Advice, please
    97124: 06/02/16: Isaac Bosompem: Re: Need some Advice, please
    97162: 06/02/17: <benkhalh@hotmail.com>: Re: Need some Advice, please
    97163: 06/02/17: <benkhalh@hotmail.com>: Re: Need some Advice, please
    97164: 06/02/17: Peter Alfke: Re: Need some Advice, please
    97165: 06/02/17: <benkhalh@hotmail.com>: Re: Need some Advice, please
97116: 06/02/16: <eziggurat@gmail.com>: WIFI Compact Flash
    97119: 06/02/16: Mike Harrison: Re: WIFI Compact Flash
    97126: 06/02/16: Isaac Bosompem: Re: WIFI Compact Flash
97120: 06/02/16: MM: Xilinx EDK GPIO: Can I drive internal logic with it?
    97125: 06/02/17: Joseph Samson: Re: Xilinx EDK GPIO: Can I drive internal logic with it?
        97150: 06/02/17: MM: Re: Xilinx EDK GPIO: Can I drive internal logic with it?
97122: 06/02/16: <pbdelete@spamnuke.ludd.luthdelete.se.invalid>: opencores.org ?
    97149: 06/02/17: GHEDWHCVEAIS@spammotel.com: Re: opencores.org ?
    97186: 06/02/18: Luc: Re: opencores.org ?
    97268: 06/02/20: <v_mirgorodsky@yahoo.com>: Re: opencores.org ?
97127: 06/02/17: Jim Granville: Maxim anounce MAX3421E SPI-USB Host/Peri
    97181: 06/02/18: Sylvain Munaut: Re: Maxim anounce MAX3421E SPI-USB Host/Peri
        97182: 06/02/18: Mike Harrison: Re: Maxim anounce MAX3421E SPI-USB Host/Peri
            97192: 06/02/18: Uwe Bonnes: Re: Maxim anounce MAX3421E SPI-USB Host/Peri
97129: 06/02/16: logjam: VHDL simulation
    97133: 06/02/16: Shyam: Re: VHDL simulation
    97134: 06/02/16: logjam: Re: VHDL simulation
97136: 06/02/17: Roberto: [Handel-C]Interface with C
97138: 06/02/17: Andy Luotto: sdram modeling
97139: 06/02/17: Roger Bourne: Standby current measurement
97140: 06/02/17: Sylvain Munaut: Xilinx Tight packing : Map error, the tools don't get it ...
    97142: 06/02/17: Symon: Re: Xilinx Tight packing : Map error, the tools don't get it ...
        97143: 06/02/17: Sylvain Munaut: Re: Xilinx Tight packing : Map error, the tools don't get it ...
    97154: 06/02/17: John_H: Re: Xilinx Tight packing : Map error, the tools don't get it ...
        97159: 06/02/17: Sylvain Munaut: Re: Xilinx Tight packing : Map error, the tools don't get it ...
            97212: 06/02/19: Sylvain Munaut: Re: Xilinx Tight packing : Map error, the tools don't get it ...
    97210: 06/02/18: JustJohn: Re: Xilinx Tight packing : Map error, the tools don't get it ...
97141: 06/02/17: Roggey: Communication between FPGA and PC with ethernet
    97146: 06/02/17: Noway2: Re: Communication between FPGA and PC with ethernet
        97408: 06/02/22: mk: Re: Communication between FPGA and PC with ethernet card
    97147: 06/02/17: Markus Kuhn: Re: Communication between FPGA and PC with ethernet
    97151: 06/02/17: GHEDWHCVEAIS@spammotel.com: Re: Communication between FPGA and PC with ethernet
        97153: 06/02/17: Mike Harrison: Re: Communication between FPGA and PC with ethernet
        97158: 06/02/17: mk: Re: Communication between FPGA and PC with ethernet
    97174: 06/02/17: hansp: Re: Communication between FPGA and PC with ethernet
    97179: 06/02/18: Roggey: Re: Communication between FPGA and PC with ethernet
    97180: 06/02/18: Roggey: Re: Communication between FPGA and PC with ethernet
    97241: 06/02/19: Hal Murray: Re: Communication between FPGA and PC with ethernet
    97387: 06/02/21: aayush: Communication between FPGA and PC with ethernet card
    97464: 06/02/22: <cs_posting@hotmail.com>: Re: Communication between FPGA and PC with ethernet
97152: 06/02/17: Alfredo: Poll: what's would your requirments be for ESL (Electronic System Level) flows?
    97156: 06/02/17: Symon: Re: what's would your requirments be for ESL (Electronic System Level) flows?
    97157: 06/02/17: John_H: Re: what's would your requirments be for ESL (Electronic System Level) flows?
        97160: 06/02/17: Alfredo: Re: what's would your requirments be for ESL (Electronic System Level) flows?
97155: 06/02/17: Sleep Mode: Memory initialization for synthesis in ISE
97161: 06/02/17: Roger: Xilinx UCF area constraints disappearing
    97171: 06/02/17: MM: Re: Xilinx UCF area constraints disappearing
        97183: 06/02/18: Brian Drummond: Re: Xilinx UCF area constraints disappearing
    97196: 06/02/18: cwoodring: Re: Xilinx UCF area constraints disappearing
    97206: 06/02/18: Roger: Re: Xilinx UCF area constraints disappearing
97167: 06/02/17: maxascent: equivalent time sampling
    97168: 06/02/17: John_H: Re: equivalent time sampling
        97187: 06/02/18: maxascent: Re: equivalent time sampling
            97197: 06/02/19: Allan Herriman: Re: equivalent time sampling
                97203: 06/02/18: John_H: Re: equivalent time sampling
                    97207: 06/02/18: maxascent: Re: equivalent time sampling
                        97209: 06/02/18: John_H: Re: equivalent time sampling
            97214: 06/02/19: Philip Freidin: Re: equivalent time sampling
                97217: 06/02/19: John_H: Re: equivalent time sampling
                    97239: 06/02/19: maxascent: Re: equivalent time sampling
            97265: 06/02/20: metal: Re: equivalent time sampling
97169: 06/02/17: Brendan Illingworth: DDR SDRAM Controller
97170: 06/02/17: Steve Perrin: low level ethernet interface driver
97173: 06/02/17: Hendra: ISE Simulator Price
    97176: 06/02/18: Antti Lukats: Re: ISE Simulator Price
    97201: 06/02/18: Paul Hartke: Re: ISE Simulator Price
    97376: 06/02/21: Steve Lass: Re: ISE Simulator Price
        97418: 06/02/21: Eric Smith: Re: ISE Simulator Price
            97420: 06/02/22: Simon Peacock: Re: ISE Simulator Price
97175: 06/02/17: <nandigits@gmail.com>: Find and fix critical paths in gate level netlist by GOF
97188: 06/02/18: vssumesh: Xilinx development board
    97199: 06/02/18: John Adair: Re: Xilinx development board
        97281: 06/02/20: John Adair: Re: Xilinx development board
    97262: 06/02/20: vssumesh: Re: Xilinx development board
97189: 06/02/18: Antti Lukats: using ISE and GNU tools for Xilinx V2Pro/V4FX PowerPC
97191: 06/02/18: Sylvain Munaut: Xilinx HardMacro "configurable" ?
    97193: 06/02/18: Antti Lukats: Re: Xilinx HardMacro "configurable" ?
        97195: 06/02/18: Sylvain Munaut: Re: Xilinx HardMacro "configurable" ?
            97198: 06/02/18: Antti Lukats: Re: Xilinx HardMacro "configurable" ?
                97202: 06/02/18: Sylvain Munaut: Re: Xilinx HardMacro "configurable" ?
                    97204: 06/02/18: Antti Lukats: Re: Xilinx HardMacro "configurable" ?
                        97205: 06/02/18: Sylvain Munaut: Re: Xilinx HardMacro "configurable" ?
                97259: 06/02/20: Stephane: Re: Xilinx HardMacro "configurable" ?
                    97324: 06/02/21: Allan Herriman: Re: Xilinx HardMacro "configurable" ?
97194: 06/02/18: cwoodring: Xilinx System Generator Black Box
97200: 06/02/18: John Adair: PC104+ Card
97208: 06/02/18: <vivekgarg330@gmail.com>: Approximate power and area values for a 1-bit SRAM cell.
97211: 06/02/18: Brad Smallridge: Xilinx ISE Simulator Arrays
    97219: 06/02/19: Hendra: Re: Xilinx ISE Simulator Arrays
97213: 06/02/18: Osnet: MontaVista Linux and Virtex-II & 4
    97215: 06/02/18: Paul Hartke: Re: MontaVista Linux and Virtex-II & 4
        97221: 06/02/19: Sylvain Munaut: Re: MontaVista Linux and Virtex-II & 4
            97224: 06/02/19: Rainer Buchty: Re: MontaVista Linux and Virtex-II & 4
                97227: 06/02/19: Sylvain Munaut: Re: MontaVista Linux and Virtex-II & 4
                    97234: 06/02/19: Rainer Buchty: Re: MontaVista Linux and Virtex-II & 4
            100141: 06/04/04: Andreas Ehliar: Re: MontaVista Linux and Virtex-II & 4
97216: 06/02/18: rickman: What is the best price you have gotten on for these FPGAs?
    97218: 06/02/19: Simon Peacock: Re: What is the best price you have gotten on for these FPGAs?
    97222: 06/02/19: Uwe Bonnes: Re: What is the best price you have gotten on for these FPGAs?
    97223: 06/02/19: John Adair: Re: What is the best price you have gotten on for these FPGAs?
    97250: 06/02/19: rickman: Re: What is the best price you have gotten on for these FPGAs?
    97251: 06/02/19: rickman: Re: What is the best price you have gotten on for these FPGAs?
    97286: 06/02/20: Antti: Re: What is the best price you have gotten on for these FPGAs?
97220: 06/02/19: kk: Did anyone doing research on power electronics control using FPGA?
97225: 06/02/19: Mich: Addressing BRAM in a V2 pro
    97243: 06/02/19: Isaac Bosompem: Re: Addressing BRAM in a V2 pro
    97249: 06/02/19: Peter Alfke: Re: Addressing BRAM in a V2 pro
    97257: 06/02/20: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: Addressing BRAM in a V2 pro
    97507: 06/02/23: Mich: Re: Addressing BRAM in a V2 pro
    97510: 06/02/23: Antti: Re: Addressing BRAM in a V2 pro
    97512: 06/02/23: Mich: Re: Addressing BRAM in a V2 pro
97226: 06/02/19: Jordi: help with VGA timings
    97229: 06/02/19: Sylvain Munaut: Re: help with VGA timings
    97231: 06/02/19: Paul Hartke: Re: help with VGA timings
    97236: 06/02/19: Jan Panteltje: Re: help with VGA timings
        97238: 06/02/19: Mike Harrison: Re: help with VGA timings
            97240: 06/02/19: Sylvain Munaut: Re: help with VGA timings
                97317: 06/02/20: Jan Panteltje: Re: help with VGA timings
    97247: 06/02/19: Isaac Bosompem: Re: help with VGA timings
    97302: 06/02/20: Jordi: Re: help with VGA timings
    97309: 06/02/20: Isaac Bosompem: Re: help with VGA timings
    97367: 06/02/21: Gabor: Re: help with VGA timings
97228: 06/02/19: John Adair: FPGA Board Competition
97230: 06/02/19: Hub van de Bergh: FPGA - software or hardware?
    97232: 06/02/19: Rich Webb: Re: FPGA - software or hardware?
        97261: 06/02/20: Hans: Re: FPGA - software or hardware?
    97233: 06/02/19: Bob Perlman: Re: FPGA - software or hardware?
    97235: 06/02/19: JJ: Re: FPGA - software or hardware?
    97237: 06/02/19: Phil Hays: Re: FPGA - software or hardware?
        97244: 06/02/19: Philip Freidin: Re: FPGA - software or hardware?
            97252: 06/02/20: kcl: Re: FPGA - software or hardware?
            97266: 06/02/20: Falk Brunner: Re: FPGA - software or hardware?
            97273: 06/02/20: Falk Brunner: Re: Cheating at homework (from "Re: FPGA - software or hardware?")
            97275: 06/02/20: Symon: Re: Cheating at homework (from "Re: FPGA - software or hardware?")
                97280: 06/02/20: Anonymous: Re: Cheating at homework (from "Re: FPGA - software or hardware?")
    97245: 06/02/19: Isaac Bosompem: Re: FPGA - software or hardware?
    97246: 06/02/19: Pleae_do_my_homework: Re: FPGA - software or hardware?
    97248: 06/02/19: JJ: Re: FPGA - software or hardware?
    97254: 06/02/19: Jerry Coffin: Re: FPGA - software or hardware?
    97260: 06/02/20: Thomas Stanka: Re: FPGA - software or hardware?
    97272: 06/02/20: Colin Paul Gloster: Cheating at homework (from "Re: FPGA - software or hardware?")
    97283: 06/02/20: JJ: Re: Cheating at homework (from "Re: FPGA - software or hardware?"t
    97287: 06/02/20: Chris Gammell: Re: Cheating at homework (from "Re: FPGA - software or hardware?"t
    97330: 06/02/21: Hub van de Bergh: FPGA - software or hardware -2-
        97337: 06/02/20: Hal Murray: Re: FPGA - software or hardware -2-
            97364: 06/02/21: se: Re: FPGA - software or hardware -2-
        97341: 06/02/21: Simon Peacock: Re: FPGA - software or hardware -2-
            97343: 06/02/21: Hal Murray: Re: FPGA - software or hardware -2-
                97385: 06/02/22: Jeremy Stringer: Re: FPGA - software or hardware -2-
                    97423: 06/02/22: Simon Peacock: Re: FPGA - software or hardware -2-
                    97425: 06/02/22: Ben Jones: Re: FPGA - software or hardware -2-
                    97430: 06/02/22: Symon: [OT] FPGA - software or hardware -2-
                    97432: 06/02/22: Hal Murray: Re: FPGA - software or hardware -2-
                        97469: 06/02/23: Simon Peacock: Re: FPGA - software or hardware -2-
                97417: 06/02/21: Eric Smith: Re: FPGA - software or hardware -2-
        97345: 06/02/21: Eric Smith: Re: FPGA - software or hardware -2-
            97362: 06/02/21: Brian Drummond: Re: FPGA - software or hardware -2-
        97393: 06/02/22: Jim Granville: Re: FPGA - software or hardware -2-
            98005: 06/03/02: Jerry Coffin: Re: FPGA - software or hardware -2-
                98008: 06/03/02: Jerry Coffin: Re: FPGA - software or hardware -2-
                    98017: 06/03/03: Symon: Re: FPGA - software or hardware -2-
        97631: 06/02/24: Hal Murray: Re: FPGA - software or hardware -2-
    97331: 06/02/20: <fpga_toys@yahoo.com>: Re: FPGA - software or hardware -2-
    97339: 06/02/20: Peter Alfke: Re: FPGA - software or hardware -2-
    97342: 06/02/21: <fpga_toys@yahoo.com>: Re: FPGA - software or hardware -2-
    97388: 06/02/21: <fpga_toys@yahoo.com>: Re: FPGA - software or hardware -2-
    97399: 06/02/21: <fpga_toys@yahoo.com>: Re: FPGA - software or hardware -2-
    97424: 06/02/22: JJ: Re: FPGA - software or hardware -2-
    97433: 06/02/22: <fpga_toys@yahoo.com>: Re: FPGA - software or hardware -2-
    98007: 06/03/02: Alan Nishioka: Re: FPGA - software or hardware -2-
    98011: 06/03/03: pamma: Re: FPGA - software or hardware?
97253: 06/02/19: <Sudhir.Singh@email.com>: Inferring Adder with Carry In and Cary out
97255: 06/02/19: <prasunp@gmail.com>: Parameterized Comparator Verilog Code
    97256: 06/02/20: John_H: Re: Parameterized Comparator Verilog Code
97258: 06/02/20: Sunny: Problem with multple clcok domains
    97277: 06/02/20: Hendra: Re: Problem with multple clcok domains
    97279: 06/02/20: Sylvain Munaut <SomeOne@SomeDomain.com>: Re: Problem with multple clcok domains
    97296: 06/02/20: mk: Re: Problem with multple clcok domains
97264: 06/02/20: Sandro: multiphase data extraction question
    97267: 06/02/20: Philip Freidin: Re: multiphase data extraction question
        97270: 06/02/20: Symon: Re: multiphase data extraction question
        97347: 06/02/21: Symon: Re: multiphase data extraction question
    97269: 06/02/20: Sandro: Re: multiphase data extraction question
    97271: 06/02/20: Sandro: Re: multiphase data extraction question
    97310: 06/02/20: Andy: Re: multiphase data extraction question
97274: 06/02/20: helix: DVI - LVDS controller
    97276: 06/02/20: Antti: Re: DVI - LVDS controller
    97282: 06/02/20: helix: Re: DVI - LVDS controller
    97285: 06/02/20: Antti: Re: DVI - LVDS controller
97284: 06/02/20: PeteS: Re: DDR SDRAM Controller
    97299: 06/02/20: Brendan Illingworth: Re: DDR SDRAM Controller
97288: 06/02/20: munch: PPC LUT inputs/outputs
97289: 06/02/20: simon.stockton@baesystems.com: Inactive signals are active!!! - Chipscope Pro 7.1i - SP4
    97344: 06/02/21: =?ISO-8859-1?Q?Michael_Sch=F6berl?=: Re: Inactive signals are active!!! - Chipscope Pro 7.1i - SP4
    97346: 06/02/21: simon.stockton@baesystems.com: Re: Inactive signals are active!!! - Chipscope Pro 7.1i - SP4
    97355: 06/02/21: simon.stockton@baesystems.com: Re: Inactive signals are active!!! - Chipscope Pro 7.1i - SP4
97290: 06/02/20: ernie: Quartus Tcl interface
    97327: 06/02/20: ernie: Re: Quartus Tcl interface
97291: 06/02/20: Marko: Is FPGA code called firmware?
    97294: 06/02/20: Falk Brunner: Re: Is FPGA code called firmware?
        97298: 06/02/20: Marko: Re: Is FPGA code called firmware?
            97303: 06/02/20: Falk Brunner: Re: Is FPGA code called firmware?
            97308: 06/02/20: Bob Perlman: Re: Is FPGA code called firmware?
        97304: 06/02/20: Falk Brunner: Re: Is FPGA code called firmware?
            97311: 06/02/20: mk: Re: Is FPGA code called firmware?
                97315: 06/02/20: Falk Brunner: Re: Is FPGA code called firmware?
            97351: 06/02/21: Falk Brunner: Re: Is FPGA code called firmware?
    97300: 06/02/20: Julian Kain: Re: Is FPGA code called firmware?
    97312: 06/02/20: Tim Wescott: Re: Is FPGA code called firmware?
    97314: 06/02/20: <soar2morrow@yahoo.com>: Re: Is FPGA code called firmware?
        97372: 06/02/21: Ray Andraka: Re: Is FPGA code called firmware?
    97316: 06/02/20: James Morrison: Re: Is FPGA code called firmware?
    97320: 06/02/20: <fpga_toys@yahoo.com>: Re: Is FPGA code called firmware?
    97321: 06/02/20: <fpga_toys@yahoo.com>: Re: Is FPGA code called firmware?
    97322: 06/02/20: <fpga_toys@yahoo.com>: Re: Is FPGA code called firmware?
    97325: 06/02/20: Joseph Samson: Re: Is FPGA code called firmware?
    97352: 06/02/21: <reiner@hartenstein.de>: Re: Is FPGA code called firmware?
        97358: 06/02/21: Falk Brunner: Re: Is FPGA code called firmware?
        97359: 06/02/21: Kolja Sulimma: Re: Is FPGA code called firmware?
            97360: 06/02/21: Stephane: Re: Is FPGA code called firmware?
    97366: 06/02/21: Joseph Samson: Re: Is FPGA code called firmware?
    97370: 06/02/21: Brannon: Re: Is FPGA code called firmware?
        97377: 06/02/21: Mike Treseler: Re: Is FPGA code called gateware?
            97378: 06/02/21: Bob Perlman: Re: Is FPGA code called gateware?
                97379: 06/02/21: Tim Wescott: Re: Is FPGA code called gateware?
            97390: 06/02/21: Mike Treseler: Re: Is FPGA code called gateware?
            97392: 06/02/21: Mike Treseler: Re: Is FPGA code called gateware?
            97398: 06/02/22: Jim Granville: Re: Is FPGA code called gateware?
                97409: 06/02/22: mk: Re: Is FPGA code called gateware?
                    97412: 06/02/22: Jim Granville: Re: Is FPGA code called gateware?
            97434: 06/02/22: Hal Murray: Re: Is FPGA code called gateware?
            97493: 06/02/23: Nial Stewart: Re: Is FPGA code called gateware?
                97587: 06/02/24: Nial Stewart: Re: Is FPGA code called gateware?
                    97754: 06/02/27: Nial Stewart: Re: Is FPGA code called gateware?
                    97842: 06/02/28: Colin Paul Gloster: Re: Is FPGA code called gateware?
                    97994: 06/03/02: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
                        98015: 06/03/03: Nial Stewart: Re: Is FPGA code called gateware?
                    97996: 06/03/02: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
                    98046: 06/03/03: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
        97380: 06/02/21: Tim Wescott: Re: Is FPGA code called firmware?
    97371: 06/02/21: Brannon: Re: Is FPGA code called firmware?
    97382: 06/02/21: Isaac Bosompem: Re: Is FPGA code called gateware?
    97383: 06/02/21: JJ: Re: Is FPGA code called firmware?
    97384: 06/02/21: <ghelbig@lycos.com>: Re: Is FPGA code called firmware?
    97389: 06/02/21: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97391: 06/02/21: Gabor: Re: Is FPGA code called gateware?
    97394: 06/02/21: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97401: 06/02/21: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97406: 06/02/21: Isaac Bosompem: Re: Is FPGA code called gateware?
    97407: 06/02/21: Isaac Bosompem: Re: Is FPGA code called gateware?
    97410: 06/02/21: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97413: 06/02/21: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97419: 06/02/21: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97426: 06/02/22: JJ: Re: Is FPGA code called gateware?
    97437: 06/02/22: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97441: 06/02/22: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97455: 06/02/22: Andy Peters: Re: Is FPGA code called gateware?
    97542: 06/02/23: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97550: 06/02/23: JJ: Re: Is FPGA code called gateware?
    97612: 06/02/24: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
    97815: 06/02/28: <fpga_toys@yahoo.com>: Re: Is FPGA code called gateware?
97297: 06/02/20: johnp: Xilinx 8.1.02i map failure
    97400: 06/02/21: johnp: Re: Xilinx 8.1.02i map failure
        97422: 06/02/22: Simon Peacock: Re: Xilinx 8.1.02i map failure
97305: 06/02/20: raju_lingala: SDRAM Reading problem
97306: 06/02/20: baranwal: JHDL Application
97307: 06/02/20: k.sandeep.p: Any one worked with Digilent Adept(transport) feature??
97313: 06/02/20: <me_2003@walla.co.il>: EDK -running from external sram
    97353: 06/02/21: Aurelian Lazarut: Re: EDK -running from external sram
97318: 06/02/20: mk: arctangent again
    97340: 06/02/20: Marko: Re: arctangent again
    98077: 06/03/03: <wbenrath@mail.ru>: Re: arctangent again
97335: 06/02/20: Pasacco: "par.exe" halted without error (partial configuratio)
    97368: 06/02/21: Brannon: Re: "par.exe" halted without error (partial configuratio)
        97462: 06/02/23: John Williams: Re: "par.exe" halted without error (partial configuratio)
97336: 06/02/20: Andrew FPGA: Xilinx Spartan 3 SSO guidelines for CP132 package?
    97338: 06/02/20: Andrew FPGA: Re: Xilinx Spartan 3 SSO guidelines for CP132 package?
97348: 06/02/21: PeteS: Re: DDR SDRAM Controller
97350: 06/02/21: Marco T.: SMSC 91c111 and LwIP
    97363: 06/02/21: Dominik Froehlich: Re: SMSC 91c111 and LwIP
        97365: 06/02/21: Marco T.: Re: SMSC 91c111 and LwIP
97354: 06/02/21: SaHiD: DSP
    97524: 06/02/23: Philip Freidin: Re: DSP
97357: 06/02/21: Antti: EDK 8.1 SP1 released, DDR2 support is now included !!
97361: 06/02/21: pinku: How to use Gigabit transciever
    97796: 06/02/27: <gregs@altera.com>: Re: How to use Gigabit transciever
97369: 06/02/21: Stefan: fix: Xilinx USB Platform Cable on linux 2.6
    97373: 06/02/21: Stefan: Re: fix: Xilinx USB Platform Cable on linux 2.6
    97539: 06/02/23: Stefan: Re: fix: Xilinx USB Platform Cable on linux 2.6
97381: 06/02/21: ML: Virtex2: can I really just leave M1,M2,M3 pins floating?
    97801: 06/02/27: mike_la_jolla: Re: Virtex2: can I really just leave M1,M2,M3 pins floating?
97386: 06/02/21: nestorj@lafayette.edu: Relative placement constraints in Xilinx ISE w/ Verilog
    97404: 06/02/21: Ray Andraka: Re: Relative placement constraints in Xilinx ISE w/ Verilog
97395: 06/02/21: Brannon: bypass between ilogic and ologic
    97610: 06/02/24: Eric Crabill: Re: bypass between ilogic and ologic
97396: 06/02/21: fpga: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97438: 06/02/22: Antti: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
        97485: 06/02/23: Ivan: Re: How to make Customized IP which connected with Microblaze through
            97540: 06/02/23: Ivan: Re: How to make Customized IP which connected with Microblaze through
    97439: 06/02/22: Antti: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
        97453: 06/02/22: Ivan: Re: How to make Customized IP which connected with Microblaze through
    97461: 06/02/22: fpga: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97472: 06/02/22: Antti: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97520: 06/02/23: fpga: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97546: 06/02/23: fpga: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97547: 06/02/23: fpga: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97568: 06/02/23: fpga: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
    97569: 06/02/23: fpga: Re: How to make Customized IP which connected with Microblaze through FSL access the OPB bus?
97397: 06/02/21: Dave Pollum: Xilinx ISE 6.3 confusion with CPLD logic results
    97402: 06/02/22: Wouter Coene: Re: Xilinx ISE 6.3 confusion with CPLD logic results
    97450: 06/02/22: Dave Pollum: Re: Xilinx ISE 6.3 confusion with CPLD logic results
97411: 06/02/21: Perfect Queue: Layer 2 (MAC) Research Project to Eliminate Routers
    97421: 06/02/22: Simon Peacock: Re: Layer 2 (MAC) Research Project to Eliminate Routers
97414: 06/02/21: king_azman: Cannot use ML310 DDR
    97448: 06/02/22: beeraka@gmail.com: Re: Cannot use ML310 DDR
    97449: 06/02/22: Stephen Craven: Re: Cannot use ML310 DDR
    97561: 06/02/23: king_azman: Re: Cannot use ML310 DDR
97416: 06/02/21: Brad Smallridge: Virtex-4 Output Primitive
97427: 06/02/22: Colin F: RC1000pp with XCV400
97431: 06/02/22: <venkatec@gmail.com>: doubt
    97460: 06/02/22: Ben Twijnstra: Re: doubt
97435: 06/02/22: pinku: configuring stratix GX Fpga
    97572: 06/02/23: <venkatec@gmail.com>: Re: configuring stratix GX Fpga
97440: 06/02/22: Antti: PowerPC based SoC design, getting it working from first attempt
    97454: 06/02/22: Ivan: Re: PowerPC based SoC design, getting it working from first attempt
        97486: 06/02/23: Ivan: Re: PowerPC based SoC design, getting it working from first attempt
    97473: 06/02/22: Antti: Re: PowerPC based SoC design, getting it working from first attempt
97442: 06/02/22: embyembu: state machine and i2c
    97443: 06/02/22: Alan Myler: Re: state machine and i2c
97444: 06/02/22: Stephen Craven: Ray Andraka's Book?
    97447: 06/02/22: Ray Andraka: Re: Ray Andraka's Book?
        154874: 13/01/24: <dldatwyler@gmail.com>: Re: Ray Andraka's Book?
            154885: 13/01/28: Christopher Felton: DSP in FPGA (was Re: Ray Andraka's Book?)
                154888: 13/01/28: rickman: Re: DSP in FPGA (was Re: Ray Andraka's Book?)
                    154890: 13/01/28: Christopher Felton: Re: DSP in FPGA (was Re: Ray Andraka's Book?)
            155099: 13/04/14: Tom Gardner: Re: Ray Andraka's Book?
    154880: 13/01/26: Paul Colin Gloster: Re: Ray Andraka's Book?
    154881: 13/01/26: Michael S: Re: Ray Andraka's Book?
    154892: 13/01/29: <jonesandy@comcast.net>: Re: Ray Andraka's Book?
97451: 06/02/22: Jerzy Gbur: FPGA to ASIC migrate
    97452: 06/02/22: Austin Lesea: Re: FPGA to ASIC migrate
        97642: 06/02/25: Jerzy Gbur: Re: FPGA to ASIC migrate
97456: 06/02/22: mughat: JTAG problem
    97458: 06/02/22: Neil Glenn Jacobson: Re: JTAG problem
    97471: 06/02/23: John Adair: Re: JTAG problem
        97580: 06/02/24: mughat: Re: JTAG problem
            97616: 06/02/24: Neil Glenn Jacobson: Re: JTAG problem
97457: 06/02/22: Gabor: Re: FPGA to ASIC migrate
97463: 06/02/22: Nju Njoroge: Checkpointing PPC Smartmodels in ModelSim 6.0b Issues
    97494: 06/02/23: Hans: Re: Checkpointing PPC Smartmodels in ModelSim 6.0b Issues
    97526: 06/02/23: Brian Drummond: Re: Checkpointing PPC Smartmodels in ModelSim 6.0b Issues
        97602: 06/02/24: Brian Drummond: Re: Checkpointing PPC Smartmodels in ModelSim 6.0b Issues
    97870: 06/02/28: Nju Njoroge: Re: Checkpointing PPC Smartmodels in ModelSim 6.0b Issues
97465: 06/02/22: <cs_posting@hotmail.com>: Input stage for VHF frequency counter in an FPGA?
    97466: 06/02/23: Jim Granville: Re: Input stage for VHF frequency counter in an FPGA?
        97571: 06/02/23: John Larkin: Re: Input stage for VHF frequency counter in an FPGA?
    97467: 06/02/22: K7ITM: Re: Input stage for VHF frequency counter in an FPGA?
    97470: 06/02/23: John Adair: Re: Input stage for VHF frequency counter in an FPGA?
    97479: 06/02/23: Hal Murray: Re: Input stage for VHF frequency counter in an FPGA?
    97483: 06/02/23: Rene Tschaggelar: Re: Input stage for VHF frequency counter in an FPGA?
    97487: 06/02/23: Joseph2k: Re: Input stage for VHF frequency counter in an FPGA?
    97489: 06/02/23: Fred Bloggs: Re: Input stage for VHF frequency counter in an FPGA?
        97652: 06/02/25: Hal Murray: Re: Input stage for VHF frequency counter in an FPGA?
    97498: 06/02/23: Jan Panteltje: Re: Input stage for VHF frequency counter in an FPGA?
        97516: 06/02/23: Spehro Pefhany: Re: Input stage for VHF frequency counter in an FPGA?
        97551: 06/02/23: Chris Jones: Re: Input stage for VHF frequency counter in an FPGA?
    97508: 06/02/23: <cs_posting@hotmail.com>: Re: Input stage for VHF frequency counter in an FPGA?
    97518: 06/02/23: Tim Shoppa: Re: Input stage for VHF frequency counter in an FPGA?
    97549: 06/02/23: <LenAnderson@ieee.org>: Re: Input stage for VHF frequency counter in an FPGA?
    97554: 06/02/23: <langwadt@ieee.org>: Re: Input stage for VHF frequency counter in an FPGA?
    97564: 06/02/23: <cs_posting@hotmail.com>: Re: Input stage for VHF frequency counter in an FPGA?
    97636: 06/02/24: <cs_posting@hotmail.com>: Re: Input stage for VHF frequency counter in an FPGA?
    97653: 06/02/25: <cs_posting@hotmail.com>: Re: Input stage for VHF frequency counter in an FPGA?
97474: 06/02/23: pavan: query!! need help!!
    97481: 06/02/23: =?ISO-8859-1?Q?Michael_Sch=F6berl?=: Re: query!! need help!!
    97482: 06/02/23: David R Brooks: Re: query!! need help!!
97475: 06/02/23: <mnemo5@163.com>: Kalman filters
    97558: 06/02/24: TC: Re: Kalman filters
        97560: 06/02/24: mk: Re: Kalman filters
            97562: 06/02/24: TC: Re: Kalman filters
            97575: 06/02/24: backhus: Re: Kalman filters
                97627: 06/02/24: TC: Re: Kalman filters
    97567: 06/02/23: <mnemo5@163.com>: Re: Kalman filters
    97585: 06/02/24: <mnemo5@163.com>: Re: Kalman filters
97476: 06/02/23: Finn S. Nielsen: Truth about Spartan-3E DCM speed
    97519: 06/02/23: Austin Lesea: Re: Truth about Spartan-3E DCM speed
        97626: 06/02/25: Finn S. Nielsen: Re: Truth about Spartan-3E DCM speed
97477: 06/02/23: Thomas Oehme: OpenRisc 1200 on Spartan 3 - problems with stability and enabling
    97484: 06/02/23: Aurelian Lazarut: Re: OpenRisc 1200 on Spartan 3 - problems with stability and enabling
        97492: 06/02/23: Thomas Oehme: Re: OpenRisc 1200 on Spartan 3 - problems with stability and enabling
            97537: 06/02/23: Aurelian Lazarut: Re: OpenRisc 1200 on Spartan 3 - problems with stability and enabling
    97608: 06/02/24: Javier Castillo: Re: OpenRisc 1200 on Spartan 3 - problems with stability and enabling cache
97480: 06/02/23: logjam: Combinatorial Division?
    97544: 06/02/23: Eric Smith: Re: Combinatorial Division?
        97553: 06/02/23: Robert Finch: Re: Combinatorial Division?
    97559: 06/02/23: logjam: Re: Combinatorial Division?
    97563: 06/02/23: Isaac Bosompem: Re: Combinatorial Division?
    97565: 06/02/23: logjam: Re: Combinatorial Division?
    97566: 06/02/23: Isaac Bosompem: Re: Combinatorial Division?
    97570: 06/02/23: Peter Alfke: Re: Combinatorial Division?
        97599: 06/02/24: Jan Panteltje: Re: Combinatorial Division?
        97630: 06/02/24: David R Brooks: Re: Combinatorial Division?
        97633: 06/02/24: Jeff Cunningham: Re: Combinatorial Division?
        97731: 06/02/26: Eric Smith: Re: Combinatorial Division?
        97760: 06/02/27: Falk Brunner: Re: Combinatorial Division?
        97763: 06/02/27: Jan Panteltje: Re: Combinatorial Division?
            97789: 06/02/27: Jan Panteltje: Re: Combinatorial Division?
    97576: 06/02/23: logjam: Re: Combinatorial Division?
    97634: 06/02/24: Isaac Bosompem: Re: Combinatorial Division?
    97639: 06/02/24: logjam: Re: Combinatorial Division?
    97640: 06/02/24: logjam: Re: Combinatorial Division?
    97657: 06/02/25: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97658: 06/02/25: Josh Rosen: Re: Combinatorial Division?
        97665: 06/02/25: Josh Rosen: Re: Combinatorial Division?
            97671: 06/02/25: Josh Rosen: Re: Combinatorial Division?
            97680: 06/02/26: Philip Freidin: Re: Combinatorial Division?
    97660: 06/02/25: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97662: 06/02/25: Peter Alfke: Re: Combinatorial Division?
    97663: 06/02/25: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97669: 06/02/25: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97672: 06/02/25: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97673: 06/02/25: Peter Alfke: Re: Combinatorial Division?
    97677: 06/02/25: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97694: 06/02/26: Peter Alfke: Re: Combinatorial Division?
    97700: 06/02/26: Isaac Bosompem: Re: Combinatorial Division?
    97722: 06/02/26: logjam: Re: Combinatorial Division?
    97723: 06/02/26: Peter Alfke: Re: Combinatorial Division?
    97724: 06/02/26: Isaac Bosompem: Re: Combinatorial Division?
    97728: 06/02/26: Michael Hennebry: Re: Combinatorial Division?
    97736: 06/02/26: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97767: 06/02/27: Derek Simmons: Re: Combinatorial Division?
        97788: 06/02/27: Jan Panteltje: Re: Combinatorial Division?
        97790: 06/02/27: Jan Panteltje: Re: Combinatorial Division?
        97953: 06/03/02: David R Brooks: Retro computers: was Re: Combinatorial Division?
        97998: 06/03/02: Ray Andraka: Re: Combinatorial Division?
        98523: 06/03/12: metal: Re: Combinatorial Division?
            98537: 06/03/12: austin: Re: Combinatorial Division?
                98554: 06/03/13: Jim Granville: Re: Combinatorial Division?
                    98632: 06/03/13: Eric Smith: Re: Combinatorial Division?
                98569: 06/03/13: Hal Murray: Re: Combinatorial Division?
            98702: 06/03/14: metal: Re: Combinatorial Division?
    97785: 06/02/27: logjam: Re: Combinatorial Division?
    97787: 06/02/27: Isaac Bosompem: Re: Combinatorial Division?
    97792: 06/02/27: Michael Hennebry: Re: Combinatorial Division?
    97939: 06/03/01: <fpga_toys@yahoo.com>: Re: Combinatorial Division?
    97990: 06/03/02: Michael Hennebry: Re: Combinatorial Division?
    98533: 06/03/12: Peter Alfke: Re: Combinatorial Division?
    98547: 06/03/12: Peter Alfke: Re: Combinatorial Division?
97488: 06/02/23: Ernest Scheiber: virtex 4
    97490: 06/02/23: Antti: Re: virtex 4
        97505: 06/02/23: John Adair: Re: virtex 4
97495: 06/02/23: <swimmer_@gmx.de>: DDR2 Memory Design: Layout, timing
    97496: 06/02/23: Antti: Re: DDR2 Memory Design: Layout, timing
    97497: 06/02/23: PeteS: Re: DDR2 Memory Design: Layout, timing
    97499: 06/02/23: <swimmer_@gmx.de>: Re: DDR2 Memory Design: Layout, timing
    97501: 06/02/23: PeteS: Re: DDR2 Memory Design: Layout, timing
    97503: 06/02/23: PeteS: Re: DDR2 Memory Design: Layout, timing
97500: 06/02/23: Nicolas Matringe: ARCnet interface gate count
    97552: 06/02/24: Allan Herriman: Re: ARCnet interface gate count
    97588: 06/02/24: Nicolas Matringe: Re: ARCnet interface gate count
97504: 06/02/23: Marco T.: System with multiple buses
97506: 06/02/23: <djanisz@et.put.poznan.pl>: altera max 7128s blanking
    97527: 06/02/23: Noway2: Re: altera max 7128s blanking
    97532: 06/02/23: <djanisz@et.put.poznan.pl>: Re: altera max 7128s blanking
    97601: 06/02/24: Noway2: Re: altera max 7128s blanking
97509: 06/02/23: Emanuel Machado: project validation: best procedures?
    97523: 06/02/23: Mike Treseler: Re: project validation: best procedures?
    97584: 06/02/24: Hans: Re: project validation: best procedures?
97514: 06/02/23: chudar: need byteblaster II source code
    97528: 06/02/23: Noway2: Re: need byteblaster II source code
97515: 06/02/23: freechip: High Speed Development Board
    97581: 06/02/24: freechip: Re: High Speed Development Board
97517: 06/02/23: Marco: Spartan3 decoupling
97521: 06/02/23: Pszemol: 8051 IP core with JTAG debugger for FPGA?
    97530: 06/02/23: Antti Lukats: Re: 8051 IP core with JTAG debugger for FPGA?
        97534: 06/02/23: Robert F. Jarnot: Re: 8051 IP core with JTAG debugger for FPGA?
            97541: 06/02/23: Pszemol: Re: 8051 IP core with JTAG debugger for FPGA?
                97545: 06/02/23: Robert F. Jarnot: Re: 8051 IP core with JTAG debugger for FPGA?
                    97637: 06/02/25: Hal Murray: Re: 8051 IP core with JTAG debugger for FPGA?
                97624: 06/02/24: Hans: Re: 8051 IP core with JTAG debugger for FPGA?
                98993: 06/03/18: Colin Paul Gloster: Re: 8051 IP core with JTAG debugger for FPGA?
                    98994: 06/03/18: Colin Paul Gloster: Re: 8051 IP core with JTAG debugger for FPGA?
            97548: 06/02/24: Jim Granville: Re: 8051 IP core with JTAG debugger for FPGA?
        97535: 06/02/23: Pszemol: Re: 8051 IP core with JTAG debugger for FPGA?
    97609: 06/02/24: Steve Knapp (Xilinx Spartan-3 Generation FPGAs): Re: 8051 IP core with JTAG debugger for FPGA?
97525: 06/02/23: <prasunp@gmail.com>: From ASM to verilog Code
97529: 06/02/23: Glenn: How to use a .coe file for rom/ram in system generator
97533: 06/02/23: chhavi: using evaluated ip core with edk 7.1 i
97536: 06/02/23: Fabio Rodrigues de la Rocha: Variables in VHDL and simulation
    97538: 06/02/23: Mike Treseler: Re: Variables in VHDL and simulation
    97604: 06/02/24: Brian Drummond: Re: Variables in VHDL and simulation
97543: 06/02/23: John Adair: Raggedstone1 - New Worldwide postage
97556: 06/02/23: Eric Smith: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97557: 06/02/24: John_H: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
        97794: 06/02/27: Jerry Coffin: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
            97795: 06/02/27: Jerry Coffin: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
            97838: 06/02/28: Jerry Coffin: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
                97858: 06/02/28: Jerry Coffin: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97578: 06/02/23: Antti: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97579: 06/02/24: John Adair: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
        97589: 06/02/24: John Adair: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97582: 06/02/24: Antti: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97645: 06/02/25: Brian Davis: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97825: 06/02/28: Brian Davis: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97844: 06/02/28: Brian Davis: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
    97845: 06/02/28: Brian Davis: Re: ironic Xcell journal 1Q2006 cover art, S3E Starter Kit
97573: 06/02/23: ABS: configuring Hardware
    97574: 06/02/24: backhus: Re: configuring Hardware
    97577: 06/02/23: ABS: Re: configuring Hardware
97583: 06/02/24: Martin Bosma: USB 2.0 OTG in FPGA
    97586: 06/02/24: Antti: Re: USB 2.0 OTG in FPGA
        97592: 06/02/24: Uwe Bonnes: Re: USB 2.0 OTG in FPGA
    97591: 06/02/24: Martin Bosma: Re: USB 2.0 OTG in FPGA
    97593: 06/02/24: Antti: Re: USB 2.0 OTG in FPGA
    97594: 06/02/24: Antti: Re: USB 2.0 OTG in FPGA
97590: 06/02/24: freechip: Need a SPI 4?
    97613: 06/02/25: Allan Herriman: Re: Need a SPI 4?
97595: 06/02/24: amit: PPC405 - FPGA interface design
    97597: 06/02/24: Antti: Re: PPC405 - FPGA interface design
97596: 06/02/24: Augast15: The 95108 cpld is getting heated when connected by CRO
    97623: 06/02/24: Andy Peters: Re: The 95108 cpld is getting heated when connected by CRO
    97628: 06/02/24: Leon: Re: The 95108 cpld is getting heated when connected by CRO
    97740: 06/02/27: Klaus Falser: Re: The 95108 cpld is getting heated when connected by CRO
        97777: 06/02/28: Jim Granville: Re: The 95108 cpld is getting heated when connected by CRO
            97822: 06/02/28: Benjamin Todd: Re: The 95108 cpld is getting heated when connected by CRO
    97747: 06/02/27: Augast15: Re: The 95108 cpld is getting heated when connected by CRO
    97756: 06/02/27: Leon: Re: The 95108 cpld is getting heated when connected by CRO
    97830: 06/02/28: Leon: Re: The 95108 cpld is getting heated when connected by CRO
97600: 06/02/24: Mich: a master-IPIF problem on the PLB bus
97603: 06/02/24: freechip: implement IP TCP Layer in FPGA
    97607: 06/02/24: Phil Hays: Re: implement IP TCP Layer in FPGA
    97622: 06/02/24: Hans: Re: implement IP TCP Layer in FPGA
97605: 06/02/24: freechip: System Packet Interface?
    97614: 06/02/25: Allan Herriman: Re: System Packet Interface?
97606: 06/02/24: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: [EDK] XilNet throughput
    97638: 06/02/25: Hal Murray: Re: [EDK] XilNet throughput
        97683: 06/02/26: =?ISO-8859-1?Q?Johan_Bernsp=E5ng?=: Re: [EDK] XilNet throughput
97611: 06/02/24: Arnaud: Problem after P&R using Xilinx Viterbi Decoder IP
97615: 06/02/24: maxascent: FPGA Selection Question
    97618: 06/02/24: Austin Lesea: Re: FPGA Selection Question
        97619: 06/02/24: Antti Lukats: Re: FPGA Selection Question
            97620: 06/02/24: Austin Lesea: Re: FPGA Selection Question
    97632: 06/02/24: Teo: Re: FPGA Selection Question
    97655: 06/02/25: Luc: Re: FPGA Selection Question
        97682: 06/02/26: maxascent: Re: FPGA Selection Question
97617: 06/02/24: Fabio Rodrigues de la Rocha: Module-based partial reconfiguration in ISE Webpack
    97625: 06/02/24: rickman: Re: Module-based partial reconfiguration in ISE Webpack
    97647: 06/02/25: Paul Hartke: Re: Module-based partial reconfiguration in ISE Webpack
97621: 06/02/24: Brady Gaughan: How about a "File Exchange" for System Generator designs?
97629: 06/02/24: Brad Smallridge: V4 FIFO16 and SRAM
    97635: 06/02/24: Peter Alfke: Re: V4 FIFO16 and SRAM
        97648: 06/02/25: Brad Smallridge: Re: V4 FIFO16 and SRAM
            97649: 06/02/25: Sylvain Munaut: Re: V4 FIFO16 and SRAM
                97706: 06/02/26: Brad Smallridge: Re: V4 FIFO16 and SRAM
                    97739: 06/02/27: Sylvain Munaut: Re: V4 FIFO16 and SRAM
            97651: 06/02/25: Hal Murray: Re: V4 FIFO16 and SRAM
                97711: 06/02/26: Brad Smallridge: Re: V4 FIFO16 and SRAM
            97708: 06/02/26: Brad Smallridge: Re: V4 FIFO16 and SRAM
    97650: 06/02/25: Peter Alfke: Re: V4 FIFO16 and SRAM
    97659: 06/02/25: Ray Andraka: Re: V4 FIFO16 and SRAM
        97713: 06/02/26: Brad Smallridge: Re: V4 FIFO16 and SRAM
            97732: 06/02/26: Ray Andraka: Re: V4 FIFO16 and SRAM
                97841: 06/02/28: Ray Andraka: Re: V4 FIFO16 and SRAM
    97661: 06/02/25: Peter Alfke: Re: V4 FIFO16 and SRAM
    97712: 06/02/26: Peter Alfke: Re: V4 FIFO16 and SRAM
    97717: 06/02/26: Peter Alfke: Re: V4 FIFO16 and SRAM
    97734: 06/02/26: Peter Alfke: Re: V4 FIFO16 and SRAM
97641: 06/02/25: pablo: A dev board supporting partial/dynamic reconf.
    97643: 06/02/25: Stephen Craven: Re: A dev board supporting partial/dynamic reconf.
        97688: 06/02/26: Antti Lukats: Re: A dev board supporting partial/dynamic reconf.
            97758: 06/02/27: Ivan: Re: A dev board supporting partial/dynamic reconf.
    97646: 06/02/25: Paul Hartke: Re: A dev board supporting partial/dynamic reconf.
    97687: 06/02/26: pablo: Re: A dev board supporting partial/dynamic reconf.
    97784: 06/02/27: jenze: Re: A dev board supporting partial/dynamic reconf.
97644: 06/02/25: Roberto: Loop Optimization
97654: 06/02/25: Brendan Illingworth: VHDL to create LUT based delay
    97697: 06/02/26: Alex: Re: VHDL to create LUT based delay
    97699: 06/02/26: Peter Alfke: Re: VHDL to create LUT based delay
        97741: 06/02/27: Thomas Reinemann: Re: VHDL to create LUT based delay
    97738: 06/02/26: Amy: Re: VHDL to create LUT based delay
    97803: 06/02/28: Jeremy Stringer: Re: VHDL to create LUT based delay
    97805: 06/02/27: Peter Alfke: Re: VHDL to create LUT based delay
97656: 06/02/25: Duccio: Low power consumption board with memory
    97674: 06/02/25: rickman: Re: Low power consumption board with memory
        97679: 06/02/26: Hal Murray: Re: Low power consumption board with memory
    97684: 06/02/26: John Adair: Re: Low power consumption board with memory
    97926: 06/03/01: Duccio: Re: Low power consumption board with memory
97666: 06/02/25: <aiiadict@gmail.com>: fpga to 5v ttl logic
    97667: 06/02/25: <cs_posting@hotmail.com>: Re: fpga to 5v ttl logic
        97913: 06/03/02: Jim Granville: Re: fpga to 5v ttl logic
    97668: 06/02/25: Peter Alfke: Re: fpga to 5v ttl logic
        97678: 06/02/26: Jim Granville: Re: fpga to 5v ttl logic
            97693: 06/02/26: Jan Panteltje: Re: fpga to 5v ttl logic
            97718: 06/02/27: Jim Granville: Re: fpga to 5v ttl logic
            97771: 06/02/27: John_H: Re: fpga to 5v ttl logic
                97778: 06/02/28: Jim Granville: Re: fpga to 5v ttl logic
            98520: 06/03/12: metal: Re: fpga to 5v ttl logic
                98522: 06/03/12: Eric Smith: Re: fpga to 5v ttl logic
                    98538: 06/03/13: Jim Granville: Re: fpga to 5v ttl logic
                        98748: 06/03/15: metal: Re: fpga to 5v ttl logic
                            98751: 06/03/16: Jim Granville: Re: fpga to 5v ttl logic
                            98845: 06/03/17: Eric Smith: Re: fpga to 5v ttl logic
                                98922: 06/03/18: Jim Granville: Re: fpga to 5v ttl logic
                98568: 06/03/13: Kolja Sulimma: Re: fpga to 5v ttl logic
                    98749: 06/03/15: metal: Re: fpga to 5v ttl logic
                    98752: 06/03/16: Jim Granville: Re: fpga to 5v ttl logic
                98574: 06/03/13: =?ISO-8859-1?Q?Michael_Sch=F6berl?=: Re: fpga to 5v ttl logic
                    98659: 06/03/14: Jan Panteltje: Re: fpga to 5v ttl logic
                        98694: 06/03/15: Jim Granville: Re: fpga to 5v ttl logic
        97764: 06/02/27: Peter Wallace: Re: fpga to 5v ttl logic
    97691: 06/02/26: <cs_posting@hotmail.com>: Re: fpga to 5v ttl logic
    97695: 06/02/26: Peter Alfke: Re: fpga to 5v ttl logic
    97719: 06/02/26: <fpga_toys@yahoo.com>: Re: fpga to 5v ttl logic
    97720: 06/02/26: Peter Alfke: Re: fpga to 5v ttl logic
    97725: 06/02/26: <langwadt@ieee.org>: Re: fpga to 5v ttl logic
    97775: 06/02/27: aayush: communication b/w ethernet and fpga
    97897: 06/03/01: <aiiadict@gmail.com>: Re: fpga to 5v ttl logic
    97900: 06/03/01: Peter Alfke: Re: fpga to 5v ttl logic
    97903: 06/03/01: <aiiadict@gmail.com>: Re: fpga to 5v ttl logic
    98640: 06/03/13: rickman: Re: fpga to 5v ttl logic
    98754: 06/03/15: Peter Alfke: Re: fpga to 5v ttl logic
97670: 06/02/25: Chelam: XC9500 JTAG Initialize problem
    97746: 06/02/27: Antti: Re: XC9500 JTAG Initialize problem
    97776: 06/02/27: Benjamin Todd: Re: XC9500 JTAG Initialize problem
        97810: 06/02/28: :-): Re: XC9500 JTAG Initialize problem
97675: 06/02/25: <siva007i@gmail.com>: FIFO design
    97698: 06/02/26: Peter Alfke: Re: FIFO design
97676: 06/02/25: yyqonline: about Xilinx Chipscope
    97710: 06/02/26: Mike Treseler: Re: about Xilinx Chipscope
    98095: 06/03/04: Gob Stopper: Re: about Xilinx Chipscope
97681: 06/02/26: Love Singhal: Virtex 4 Multiplier RPM Constraints?
    97696: 06/02/26: Peter Alfke: Re: Virtex 4 Multiplier RPM Constraints?
        97912: 06/03/01: Vic Vadi: Re: Virtex 4 Multiplier RPM Constraints?
    97702: 06/02/26: Love Singhal: Re: Virtex 4 Multiplier RPM Constraints?
    97714: 06/02/26: Peter Alfke: Re: Virtex 4 Multiplier RPM Constraints?
    97950: 06/03/02: Love Singhal: Re: Virtex 4 Multiplier RPM Constraints?
97685: 06/02/26: <me_2003@walla.co.il>: VGA specification
    97692: 06/02/26: Derek Simmons: Re: VGA specification
    97701: 06/02/26: <cs_posting@hotmail.com>: Re: VGA specification
        97733: 06/02/26: Jerry Coffin: Re: VGA specification
    97709: 06/02/26: Jerry Coffin: Re: VGA specification
        97762: 06/02/27: Markus Kuhn: Re: VGA specification
    97715: 06/02/26: <cs_posting@hotmail.com>: Re: VGA specification
    97729: 06/02/26: jluisky: Re: VGA specification
    97730: 06/02/26: Derek Simmons: Re: VGA specification
97686: 06/02/26: Mich: ERROR:MapLib:482
    97689: 06/02/26: Marc Randolph: Re: ERROR:MapLib:482
    97690: 06/02/26: Mich: Re: ERROR:MapLib:482
    97703: 06/02/26: John McGrath: Re: ERROR:MapLib:482
    97704: 06/02/26: Mich: Re: ERROR:MapLib:482
    97707: 06/02/26: Mich: Re: ERROR:MapLib:482
97705: 06/02/26: <foag@iti.uni-luebeck.de>: Coregen ISE 6.1
    97826: 06/02/28: Barry Brown: Re: Coregen ISE 6.1
97726: 06/02/26: <zhangweidai@gmail.com>: miniuart
    97727: 06/02/27: Martin Schoeberl: Re: miniuart
        97753: 06/02/27: David Brown: Re: miniuart
    97735: 06/02/27: kcl: Re: miniuart
        97743: 06/02/27: John Adair: Re: miniuart
            97774: 06/02/27: John Adair: Re: miniuart
    97737: 06/02/26: <zhangweidai@gmail.com>: Re: miniuart
    97772: 06/02/27: <cs_posting@hotmail.com>: Re: miniuart
    97773: 06/02/27: <zhangweidai@gmail.com>: Re: miniuart
    97791: 06/02/27: <zhangweidai@gmail.com>: Re: miniuart
    99537: 06/03/26: preet: Re: miniuart
97742: 06/02/27: Eric Smith: tricks to make large PLAs fast?
    97757: 06/02/27: John Adair: Re: tricks to make large PLAs fast?
        97779: 06/02/27: Eric Smith: Re: tricks to make large PLAs fast?
    97759: 06/02/27: Brian Drummond: Re: tricks to make large PLAs fast?
        97780: 06/02/27: Eric Smith: Re: tricks to make large PLAs fast?
    97769: 06/02/27: John_H: Re: tricks to make large PLAs fast?
    97783: 06/02/28: Jim Granville: Re: tricks to make large PLAs fast?
        97798: 06/02/27: Eric Smith: Re: tricks to make large PLAs fast?
            97804: 06/02/28: Jim Granville: Re: tricks to make large PLAs fast?
                97809: 06/02/27: Eric Smith: Re: tricks to make large PLAs fast?
                    97812: 06/02/28: Jim Granville: Re: tricks to make large PLAs fast?
            97833: 06/02/28: Kolja Sulimma: Re: tricks to make large PLAs fast?
                97859: 06/02/28: Eric Smith: Re: tricks to make large PLAs fast?
                    97884: 06/03/01: Kolja Sulimma: Re: tricks to make large PLAs fast?
                        97915: 06/03/01: Eric Smith: Re: tricks to make large PLAs fast?
                    97885: 06/03/01: Kolja Sulimma: Re: tricks to make large PLAs fast?
                        97917: 06/03/01: Eric Smith: Re: tricks to make large PLAs fast?
    97843: 06/02/28: Michael Hennebry: Re: tricks to make large PLAs fast?
        97860: 06/02/28: Eric Smith: Re: tricks to make large PLAs fast?
            97864: 06/03/01: Jim Granville: Re: tricks to make large PLAs fast?
                97916: 06/03/01: Eric Smith: Re: tricks to make large PLAs fast?
97744: 06/02/27: bijoy: FPGA: Model-SIm XE problem
    97748: 06/02/27: ALuPin@web.de: Re: FPGA: Model-SIm XE problem
    97766: 06/02/27: Duane Clark: Re: FPGA: Model-SIm XE problem
        97768: 06/02/27: Duane Clark: Re: FPGA: Model-SIm XE problem
    97781: 06/02/27: Mike Treseler: Re: FPGA: Model-SIm XE problem
97745: 06/02/27: Matthias Alles: Serious problem with XST
    97750: 06/02/27: sudheer: Re: Serious problem with XST
        97835: 06/02/28: Matthias Alles: Re: Serious problem with XST
    97828: 06/02/28: young: Re: Serious problem with XST
    97867: 06/02/28: Hendra: Re: Serious problem with XST
    97883: 06/03/01: Marko: Re: Serious problem with XST
97749: 06/02/27: sudheer: Virtex-4 RAMB16 relative placement
    97765: 06/02/27: John_H: Re: Virtex-4 RAMB16 relative placement
97751: 06/02/27: Chris Francis: VirtexII routing data widths
    97752: 06/02/27: Antti: Re: VirtexII routing data widths
        97755: 06/02/27: Chris Francis: Re: VirtexII routing data widths
    98044: 06/03/03: Chris Francis: Re: VirtexII routing data widths (further query)
        98045: 06/03/03: Austin Lesea: Re: VirtexII routing data widths (further query)
            98051: 06/03/03: Austin Lesea: Re: VirtexII routing data widths (further query)
                98061: 06/03/03: Austin Lesea: Re: VirtexII routing data widths (further query)
                98062: 06/03/03: Austin Lesea: Re: VirtexII routing data widths (further query)
            98089: 06/03/04: Chris Francis: Re: VirtexII routing data widths (further query)
    98058: 06/03/03: <fpga_toys@yahoo.com>: Re: VirtexII routing data widths (further query)
97761: 06/02/27: Gabor: Re: FPGA to ASIC migrate
97770: 06/02/27: Cog_Rad_link: NGCBUILD .. MDT error on Virtex 4
    97786: 06/02/27: Paul Hartke: Re: NGCBUILD .. MDT error on Virtex 4
97782: 06/02/27: igelado@gmail.com: PCI configuration for ML310
    97808: 06/02/28: John Williams: Re: PCI configuration for ML310
        97851: 06/03/01: John Williams: Re: PCI configuration for ML310
            98119: 06/03/06: John Williams: Re: PCI configuration for ML310
    97816: 06/02/28: igelado@gmail.com: Re: PCI configuration for ML310
    97875: 06/03/01: igelado@gmail.com: Re: PCI configuration for ML310
97793: 06/02/27: MT: System crashes when configuring altera stratix pci board
    97797: 06/02/27: MT: Moreover, the fpga hangs even when I configure a very simple design too...
    97818: 06/02/28: Nial Stewart: Re: System crashes when configuring altera stratix pci board
    97927: 06/03/01: <ghelbig@lycos.com>: Re: System crashes when configuring altera stratix pci board
97799: 06/02/27: fpgabuilder: Why wouldn't this infer a flop with async reset and sync enable
    97800: 06/02/27: fpgabuilder: Re: Why wouldn't this infer a flop with async reset and sync enable
        97802: 06/02/27: Chris F Clark: Re: Why wouldn't this infer a flop with async reset and sync enable
    97806: 06/02/27: fpgabuilder: Re: Why wouldn't this infer a flop with async reset and sync enable
97807: 06/02/27: vssumesh: Observed a bug in the Model sim V 6.0a
97811: 06/02/28: :-): New XC9572 decoupling newbie question :-)
    97813: 06/02/28: PeteS: Re: New XC9572 decoupling newbie question :-)
        97820: 06/02/28: Benjamin Todd: Re: New XC9572 decoupling newbie question :-)
            97846: 06/02/28: :-): Re: New XC9572 decoupling newbie question :-)
    97814: 06/02/28: PeteS: Re: New XC9572 decoupling newbie question :-)
97817: 06/02/28: Frank @ CN: How do I make dual-port RAM from single port RAM?
    97819: 06/02/28: =?ISO-8859-15?Q?Michael_Sch=F6berl?=: Re: How do I make dual-port RAM from single port RAM?
    97823: 06/02/28: John_H: Re: How do I make dual-port RAM from single port RAM?
    97836: 06/02/28: JJ: Re: How do I make dual-port RAM from single port RAM?
    97840: 06/02/28: Peter Alfke: Re: How do I make dual-port RAM from single port RAM?
        97855: 06/03/01: Frank @ CN: Re: How do I make dual-port RAM from single port RAM?
    97854: 06/02/28: <sharp@cadence.com>: Re: How do I make dual-port RAM from single port RAM?
        97856: 06/03/01: Frank @ CN: Re: How do I make dual-port RAM from single port RAM?
            97929: 06/03/02: Frank: Re: How do I make dual-port RAM from single port RAM?
            97935: 06/03/02: Kim Enkovaara: Re: How do I make dual-port RAM from single port RAM?
    97857: 06/02/28: <sharp@cadence.com>: Re: How do I make dual-port RAM from single port RAM?
    97866: 06/02/28: Peter Alfke: Re: How do I make dual-port RAM from single port RAM?
    97869: 06/03/01: Ulf Samuelsson: Re: How do I make dual-port RAM from single port RAM?
        97951: 06/03/02: Josep Durán: Re: How do I make dual-port RAM from single port RAM?
            98142: 06/03/06: Josep Durán: Re: How do I make dual-port RAM from single port RAM?
    97872: 06/02/28: JJ: Re: How do I make dual-port RAM from single port RAM?
    97873: 06/03/01: JJ: Re: How do I make dual-port RAM from single port RAM?
    97882: 06/03/01: Sean Burroughs: Re: How do I make dual-port RAM from single port RAM?
    97886: 06/03/01: Derek Simmons: Re: How do I make dual-port RAM from single port RAM?
        97940: 06/03/02: Frank: Re: How do I make dual-port RAM from single port RAM?
    97893: 06/03/01: <sharp@cadence.com>: Re: How do I make dual-port RAM from single port RAM?
    97932: 06/03/01: <sharp@cadence.com>: Re: How do I make dual-port RAM from single port RAM?
    97943: 06/03/02: JJ: Re: How do I make dual-port RAM from single port RAM?
    97981: 06/03/02: John_H: Re: How do I make dual-port RAM from single port RAM?
        98108: 06/03/05: John_H: Re: How do I make dual-port RAM from single port RAM?
    98004: 06/03/02: rhnlogic: Re: How do I make dual-port RAM from single port RAM?
    98041: 06/03/03: Derek Simmons: Re: How do I make dual-port RAM from single port RAM?
    98107: 06/03/04: <sharp@cadence.com>: Re: How do I make dual-port RAM from single port RAM?
97821: 06/02/28: maxascent: Xilinx MIG
97824: 06/02/28: pilwoochun@rogers.com: 32 bit select map
97827: 06/02/28: Marco T.: conv_integer
    97829: 06/02/28: ALuPin@web.de: Re: conv_integer
        97831: 06/02/28: Marco T.: Re: conv_integer
            97832: 06/02/28: =?ISO-8859-15?Q?Michael_Sch=F6berl?=: Re: conv_integer
    97837: 06/02/28: John Adair: Re: conv_integer
97834: 06/02/28: Antti: PPC Linux SoC on Virtex4 in 4 hours !?
    97848: 06/02/28: Ivan: Re: PPC Linux SoC on Virtex4 in 4 hours !?
        97849: 06/02/28: Antti Lukats: Re: PPC Linux SoC on Virtex4 in 4 hours !?
            97852: 06/03/01: John Williams: Re: PPC Linux SoC on Virtex4 in 4 hours !?
                97871: 06/03/01: Antti Lukats: Re: PPC Linux SoC on Virtex4 in 4 hours !?
                97874: 06/03/01: Ivan: Re: PPC Linux SoC on Virtex4 in 4 hours !?
                    97880: 06/03/01: Ivan: Re: PPC Linux SoC on Virtex4 in 4 hours !?
                    97902: 06/03/01: MM: Re: PPC Linux SoC on Virtex4 in 4 hours !?
                        97904: 06/03/01: Antti Lukats: Re: PPC Linux SoC on Virtex4 in 4 hours !?
    97876: 06/03/01: Antti: Re: PPC Linux SoC on Virtex4 in 4 hours !?
    97887: 06/03/01: Anonymous: Re: PPC Linux SoC on Virtex4 in 4 hours !?
    97889: 06/03/01: Antti: Re: PPC Linux SoC on Virtex4 in 4 hours !?
97839: 06/02/28: Ludwig Lenz: XUP Vertex II J5 Expansionheader Voltage
    97847: 06/02/28: Antti: Re: XUP Vertex II J5 Expansionheader Voltage
97850: 06/02/28: redstripe: FPGA communication, I2C and DAC
    97853: 06/02/28: Jan Panteltje: Re: FPGA communication, I2C and DAC
    97861: 06/03/01: Jim Granville: Re: FPGA communication, I2C and DAC
        97868: 06/03/01: Mark McDougall: Re: FPGA communication, I2C and DAC
            97914: 06/03/01: Kryten: Re: FPGA communication, I2C and DAC
                97924: 06/03/02: Allan Herriman: Re: FPGA communication, I2C and DAC
                    97946: 06/03/02: Hal Murray: Re: FPGA communication, I2C and DAC
    97881: 06/03/01: Gabor: Re: FPGA communication, I2C and DAC
97862: 06/02/28: Brannon: floating point MAC, duh!
97863: 06/02/28: Jerry: DDR2 FPGA PWB SIMULATION


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