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1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015Jan2015

Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

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Threads Starting Jan 1996

2550: 96/01/01: Maya Reuveni: xilinx xxx.cst files
2556: 96/01/02: alain arnaud: Verilog simulator for PC
    2567: 96/01/03: Tom Dillon: Re: Verilog simulator for PC
2561: 96/01/02: Scott A. Hauck: Survey of Reprogrammable Systems
2565: 96/01/03: Ben Klass: What does VHDL stand for?
    2573: 96/01/04: Phil Sailer: Re: What does VHDL stand for?
    2574: 96/01/04: Jeffrey L. Hutchings: Re: What does VHDL stand for?
2570: 96/01/04: B. Mitchell Loebel: The PARALLEL Processing Connection - January Meeting Notice
2571: 96/01/04: B. Mitchell Loebel: The PARALLEL Processing Connection - What Is It?
2576: 96/01/04: Dr. Jason Cong: FPGA'96 Adv. Program
2577: 96/01/05: John Cooley: Advanced Program & Registration For SNUG '96
2578: 96/01/05: John Cooley: INDUSTRY GADFLY: SpeedSim's Three Dark Clouds
    2582: 96/01/06: Renu Raman: Re: INDUSTRY GADFLY: SpeedSim's Three Dark Clouds
        2583: 96/01/06: John Cooley: Re: INDUSTRY GADFLY: SpeedSim's Three Dark Clouds
            2597: 96/01/10: Ramesh Narayanaswamy: Re: INDUSTRY GADFLY: SpeedSim's Three Dark Clouds
        2585: 96/01/06: John Cooley: Re: INDUSTRY GADFLY: SpeedSim's Three Dark Clouds
2579: 96/01/05: Dan Blow: Need Re-programable VXI Module
    2587: 96/01/08: Timothy P. Ganley: Re: Need Re-programable VXI Module
        2612: 96/01/10: Dan Blow: Re: Need Re-programable VXI Module
    2598: 96/01/10: Roger Williams: Re: Need Re-programable VXI Module
2580: 96/01/05: David Evans: Xilinx Power Estimation
2581: 96/01/05: John Cooley: ** Reminder: USE/DA Lunch Meeting In Silicon Valley On Monday **
2590: 96/01/09: Alexander B. Taubin: advanced program and registration for Async96
2591: 96/01/09: Chuang Hsien-Ho: Emulation for a wireless chip
    2608: 96/01/10: <jasonf>: Re: Emulation for a wireless chip
    2613: 96/01/11: Sze-Tang Chen: Re: Emulation for a wireless chip
    2628: 96/01/15: Chuang Hsien-Ho: Re: Emulation for a wireless chip
        2634: 96/01/16: <jasonf>: Re: Emulation for a wireless chip
        2663: 96/01/21: David Van den Bout: Re: Emulation for a wireless chip
    2637: 96/01/17: Brad Hutchings: Re: Emulation for a wireless chip
    2638: 96/01/17: Roger Williams: Re: Emulation for a wireless chip
    2655: 96/01/19: Brad Hutchings: Re: Emulation for a wireless chip
        2718: 96/01/29: <jasonf>: Re: Emulation for a wireless chip
2592: 96/01/09: Philip Freidin: Re: [q][Reverse Engineering Protection]
    2594: 96/01/10: Graeme Gill: Re: [q][Reverse Engineering Protection]
        2599: 96/01/10: Petri Havanto: Re: [q][Reverse Engineering Protection]
            2602: 96/01/10: David Pashley: Re: [q][Reverse Engineering Protection]
        2614: 96/01/11: Petri Havanto: Re: [q][Reverse Engineering Protection]
            2617: 96/01/11: David Pashley: Re: [q][Reverse Engineering Protection]
    2603: 96/01/10: Andrew Morley: Re: [q][Reverse Engineering Protection]
2593: 96/01/09: Tobias Schuele: Simulator for LATTICE pDS
2604: 96/01/10: Laurent LE BOURHIS: IIR FILTER
2609: 96/01/10: Dave Galloway: Transmogrifier C 3.1 - a C based hardware description language
2610: 96/01/10: ROBERT: looking for free LATTICE ispLSI compiler
2611: 96/01/10: Steve Hoeft: ECL PALs or FPGAs
    2616: 96/01/11: Ken Goldman: Re: ECL PALs or FPGAs
2615: 96/01/11: Laurent Lemarchand: place/route for LUT-based FPGA
2618: 96/01/11: Teknomage: What exactly does an FPGA do?
    2621: 96/01/12: Teknomage: Re: What exactly does an FPGA do?
    2626: 96/01/13: Roger Williams: Re: What exactly does an FPGA do?
2619: 96/01/11: Jeffrey Yuan: Lattice isp Starter Kit and 3 ispLSI1016-80LJ Devices For Sale
2620: 96/01/12: AnnapMicro: Job Openings - Reconfigurable Computing
2622: 96/01/12: Thomas Ebert: PCI-interface chip from PLX
2623: 96/01/12: FSI HUNTER: JOB- Linecard FPGA/ASIC Designer
2624: 96/01/12: FSI HUNTER: CA-ATM/MUX Linecard FPGA/ASIC Designer
2631: 96/01/16: <sbaker@best.com>: FPGAs better than gate arrays??
2632: 96/01/16: David Corne: CFP:CFP: Reading Workshops on Parallel Computing CFP:CFP
2639: 96/01/17: Mark Webster: ProSeries + Actel & Xilinx
    2640: 96/01/17: Doug Shade: Re: ProSeries + Actel & Xilinx
    2646: 96/01/18: David Pashley: Re: ProSeries + Actel & Xilinx
2641: 96/01/17: HECTOR DAVILA: ***KEYBOARD RECORDERS**********************************************
2645: 96/01/18: Soren Kristensen: 8259 interrupt controller source
2647: 96/01/18: Chris Hersman: Programming Actels in circuit?
    2653: 96/01/19: David Pashley: Re: Programming Actels in circuit?
    2728: 96/01/31: Allan Macneil: Re: Programming Actels in circuit?
2648: 96/01/19: muzo: good interview questions ?
    2656: 96/01/20: Bill Seiler: Re: good interview questions ?
        2673: 96/01/22: Mike Butts: Re: good interview questions ?
2649: 96/01/19: Arrigo Benedetti: Virtual Computer Corp. still in business?
    2662: 96/01/21: Charlie Burns: Re: Virtual Computer Corp. still in business?
    2672: 96/01/22: Mark Stephens: Re: Virtual Computer Corp. still in business?
2651: 96/01/19: S.G. Wood, Jr.: PLD JDEC Files
    2657: 96/01/20: Paul E. Bennett: Re: PLD JDEC Files
        2664: 96/01/21: David Van den Bout: Re: PLD JDEC Files
            2668: 96/01/22: David Pashley: Re: PLD JDEC Files
        2665: 96/01/22: Trevor Hall: Re: PLD JDEC Files
    2659: 96/01/20: Mark Zenier: Re: PLD JDEC Files
    2660: 96/01/21: Larry Martin: Re: PLD JDEC Files
2652: 96/01/19: Matthew Marks: GRRR!!! Xilinx Makebits defaults changing
    2654: 96/01/19: Ian Atkinson: Re: GRRR!!! Xilinx Makebits defaults changing
    2658: 96/01/20: Scott Kroeger: Re: GRRR!!! Xilinx Makebits defaults changing
2661: 96/01/21: Edwin Tsang: how to write place and route software
2666: 96/01/22: John Cooley: How Big Chips Will Be Designed In The Not Too Distant Future
    2669: 96/01/22: Brian Childs: Re: How Big Chips Will Be Designed In The Not Too Distant Future
        2671: 96/01/22: Steve Pope: Re: How Big Chips Will Be Designed In The Not Too Distant Future
            2700: 96/01/25: Ad Verschueren: Re: How Big Chips Will Be Designed In The Not Too Distant Future
                2701: 96/01/25: Steve Pope: Re: How Big Chips Will Be Designed In The Not Too Distant Future
                    2732: 96/01/31: Ad Verschueren: Re: How Big Chips Will Be Designed In The Not Too Distant Future
            2736: 96/01/31: Thomas Grant Edwards: Re: How Big Chips Will Be Designed In The Not Too Distant Future
        2710: 96/01/27: Steven Bird: Re: How Big Chips Will Be Designed In The Not Too Distant Future
2667: 96/01/22: John Cooley: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
    2670: 96/01/22: Edwin Tsang: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
    2712: 96/01/27: Frank Guerino: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
        2713: 96/01/28: John Cooley: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
            2721: 96/01/30: Frank Guerino: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
                2749: 96/02/01: Edwin Tsang: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
            2757: 96/02/02: Joel Garry: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
                2764: 96/02/03: Frank Guerino: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
                    2780: 96/02/06: Michael M.Y. Hui: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
            2775: 96/02/05: Don Logan: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
            2806: 96/02/10: DavidS8021: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
                2812: 96/02/12: John Williams: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
        2716: 96/01/29: Mark Gonzales: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
            2763: 96/02/03: Frank Guerino: Re: Chosing VHDL or Verilog Does Have An Impact For U.S. Engineers
2674: 96/01/23: Gavin Melville: XILINX XACT 6.0.0 Tools flaky
    2679: 96/01/23: Tom Liehe: Re: XILINX XACT 6.0.0 Tools flaky
        2695: 96/01/24: G. Herrmannsfeldt: Re: XILINX XACT 6.0.0 Tools flaky
    2703: 96/01/25: alain arnaud: Re: XILINX XACT 6.0.0 Tools flaky
        2725: 96/01/30: Tom Liehe: Re: XILINX XACT 6.0.0 Tools flaky
            2735: 96/01/31: George Noten: Re: XILINX XACT 6.0.0 Tools flaky
2675: 96/01/23: Philipp Georg: HowTo access a SRAM with a XC4000
    2689: 96/01/24: Francesco Micale, X4438: Re: HowTo access a SRAM with a XC4000
    2693: 96/01/24: Steve Knapp (Xilinx, Inc.): Re: HowTo access a SRAM with a XC4000
        2707: 96/01/26: Jan Gray: Re: HowTo access a SRAM with a XC4000
    2699: 96/01/25: Peter Siegrist: Re: HowTo access a SRAM with a XC4000
        2702: 96/01/25: Peter Alfke: Re: HowTo access a SRAM with a XC4000
    2706: 96/01/26: Peter Wurbs: Re: HowTo access a SRAM with a XC4000
2676: 96/01/23: Volker Kurt Kamp: AT&T Orca vs Xilinx
    2680: 96/01/23: Tom Liehe: Re: AT&T Orca vs Xilinx
    2715: 96/01/29: Don Husby: Re: AT&T Orca vs Xilinx
2677: 96/01/23: Dave Daurelio: Re: PLD JDEC Files
2678: 96/01/23: Pete Becker: FPGAs for Newbie?
2681: 96/01/23: Lance Gin: In Search of Graphical VHDL Code Generators for FPGA Design
    2684: 96/01/24: Brian Childs: Re: In Search of Graphical VHDL Code Generators for FPGA Design
2682: 96/01/24: Tom Keaveny: Revision Figure of Merit?
    2691: 96/01/24: Steve Knapp (Xilinx, Inc.): Re: Revision Figure of Merit?
2683: 96/01/24: Joseph Gottlieb: Multipliers? How many different arch?
    2685: 96/01/24: Russell Petersen: Re: Multipliers? How many different arch?
    2692: 96/01/24: Bill Bishop: Re: Multipliers? How many different arch?
2686: 96/01/24: Dr. Jason Cong: FPGA'96 Adv. Registration Deadline is tomorrow (1/25/96)
2687: 96/01/24: Howard Del Fava: any altera library sites
2688: 96/01/24: Sean Murphy: IVC-96 Hotel/Conference Registration Deadlines Fast Approaching
2690: 96/01/25: <pac1@waikato.ac.nz>: Qn on XC3030 and XC3164 'Divide By Two'
    2694: 96/01/25: <pac1@waikato.ac.nz>: Re: Qn on XC3030 and XC3164 'Divide By Two'
2696: 96/01/24: Sylvia Reyes: Logic Designer & Digital Designer Needs
2697: 96/01/25: AGIJohnU: VHDL Microcontroller Model
    2755: 96/02/02: Eric Ryherd: Re: VHDL Microcontroller Model
2698: 96/01/25: Bill Cox: Re: XILINX XACT 6.0.0 Tools flaky
2704: 96/01/25: Robert F. Calderwood: Put an 8051 in your ASIC
2705: 96/01/26: John Cooley: ** ASIC Designers Wanted For Next Week's Great ESDA Shootout **
2708: 96/01/26: Mike Saunders: Xilinx MC68681 Emulation
2709: 96/01/26: T. D. Bouvia: VHDL/Verilog training
    2711: 96/01/27: Frank Guerino: Re: VHDL/Verilog training
    2724: 96/01/30: Steve Methley: Re: VHDL/Verilog training
2714: 96/01/29: Mark Stephens: GAL programming for hobby use...Is there no hope?
    2717: 96/01/29: Mark Zenier: Re: GAL programming for hobby use...Is there no hope?
        2734: 96/01/31: Mark Stephens: Re: GAL programming for hobby use...Is there no hope?
            2741: 96/01/31: Jim Drew: Re: GAL programming for hobby use...Is there no hope?
    2719: 96/01/29: Jim Drew: Re: GAL programming for hobby use...Is there no hope?
        2729: 96/01/31: Eric Edwards: Re: GAL programming for hobby use...Is there no hope?
            2740: 96/01/31: Jim Drew: Re: GAL programming for hobby use...Is there no hope?
                2753: 96/02/02: Eric Edwards: Re: GAL programming for hobby use...Is there no hope?
                    2758: 96/02/02: Jim Drew: Re: GAL programming for hobby use...Is there no hope?
                        2765: 96/02/04: Eric Edwards: Re: GAL programming for hobby use...Is there no hope?
        2742: 96/02/01: Gerry Belanger: Re: GAL programming for hobby use...Is there no hope?
            2745: 96/02/01: Jim Drew: Re: GAL programming for hobby use...Is there no hope?
    2726: 96/01/30: Doug Shade: Re: GAL programming for hobby use...Is there no hope?
        2744: 96/02/01: Eric Edwards: Re: GAL programming for hobby use...Is there no hope?
    2727: 96/01/31: Bob Blick: Re: GAL programming for hobby use...Is there no hope?
    2730: 96/01/31: Jim Weir: Re: GAL programming for hobby use...Is there no hope?
    2731: 96/01/31: MMartin950: Re: GAL programming for hobby use...Is there no hope?
        2737: 96/01/31: Roger Books: Re: GAL programming for hobby use...Is there no hope?
    2733: 96/01/31: Wen-King Su: Re: GAL programming for hobby use...Is there no hope?
        2746: 96/02/01: Mark Stephens: Re: GAL programming for hobby use...Is there no hope?
    2769: 96/02/05: Philip Freidin: Re: GAL programming for hobby use...Is there no hope?
2720: 96/01/30: <vaughan@wave.co.nz>: Sunshine EXPRO-80 adapter socket for MACH210
2722: 96/01/29: Steve Lee: ABEL
2723: 96/01/30: Udi Finkelstein: HELP WANTED - PC-UPROG device programmer
2738: 96/01/31: Stephen Bell: Xilinx or Altera?
    2748: 96/02/01: Erik Jessen: Re: Xilinx or Altera?
        2750: 96/02/01: Tad B Artis: Re: Xilinx or Altera?
2739: 96/01/31: Tad B Artis: Xilinx or Altera for Newbie?
    2756: 96/02/02: Howard Del Fava: Re: Xilinx or Altera for Newbie?
    2760: 96/02/02: Greg Peek: Re: Xilinx or Altera for Newbie?


Site Home   Archive Home   FAQ Home   How to search the Archive   How to Navigate the Archive   
Compare FPGA features and resources   

Threads starting:
1994JulAugSepOctNovDec1994
1995JanFebMarAprMayJunJulAugSepOctNovDec1995
1996JanFebMarAprMayJunJulAugSepOctNovDec1996
1997JanFebMarAprMayJunJulAugSepOctNovDec1997
1998JanFebMarAprMayJunJulAugSepOctNovDec1998
1999JanFebMarAprMayJunJulAugSepOctNovDec1999
2000JanFebMarAprMayJunJulAugSepOctNovDec2000
2001JanFebMarAprMayJunJulAugSepOctNovDec2001
2002JanFebMarAprMayJunJulAugSepOctNovDec2002
2003JanFebMarAprMayJunJulAugSepOctNovDec2003
2004JanFebMarAprMayJunJulAugSepOctNovDec2004
2005JanFebMarAprMayJunJulAugSepOctNovDec2005
2006JanFebMarAprMayJunJulAugSepOctNovDec2006
2007JanFebMarAprMayJunJulAugSepOctNovDec2007
2008JanFebMarAprMayJunJulAugSepOctNovDec2008
2009JanFebMarAprMayJunJulAugSepOctNovDec2009
2010JanFebMarAprMayJunJulAugSepOctNovDec2010
2011JanFebMarAprMayJunJulAugSepOctNovDec2011
2012JanFebMarAprMayJunJulAugSepOctNovDec2012
2013JanFebMarAprMayJunJulAugSepOctNovDec2013
2014JanFebMarAprMayJunJulAugSepOctNovDec2014
2015Jan2015

Authors:A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

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