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> I want to write some data to a file using Verilog. This file will be a > JPEG > file so the data in the file needs to be the actual data I write. I have > tried using $fwrite but the data ends up as ASCII when I look at it in a > hex editor. So if I write 0xFF it ends up as 66 66 in the file. Can anyone > tell me how to do this? Just a guess: maybe there is hwrite()?Article: 154201
Morten Leikvoll wrote:
>> I want to write some data to a file using Verilog. This file will be a
>> JPEG
>> file so the data in the file needs to be the actual data I write. I have
>> tried using $fwrite but the data ends up as ASCII when I look at it in a
>> hex editor. So if I write 0xFF it ends up as 66 66 in the file. Can
>> anyone
>> tell me how to do this?
>
> Try google.. here is what I found (last post using character binary mode)
> http://www.velocityreviews.com/forums/t22651-binary-file-io-in-modelsim.html
>
>
$fwrite uses the same format string as $write, so it's important to use
the correct format. Obviously if you do something like:
reg [7:0] foo = 8'hFF;
$fwrite ("%x", foo);
You'll get hex characters in the file. I haven't tried this but if you
use a string or character type instead you should just get the binary
data in the file. Note that this only works for multiples of 8 bits:
reg [7:0] foo = 8'hFF;
$fwrite ("%c", foo);
reg [23:0] bar = 24'h123456;
$fwrite ("%s", bar);
HTH,
Gabor
Article: 154202
"maxascent" <56@embeddedrelated> writes:
> I want to write some data to a file using Verilog. This file will be a JPEG
> file so the data in the file needs to be the actual data I write. I have
> tried using $fwrite but the data ends up as ASCII when I look at it in a
> hex editor. So if I write 0xFF it ends up as 66 66 in the file. Can anyone
> tell me how to do this?
integer fd;
initial begin
fd = $fopen("data.out","wb");
$fwrite(fd,"%u",32'h61_62_00_63);
$fclose(fd);
end
//Petter
--
.sig removed by request.
Article: 154203
After some experimenting and searching the web, the following works.
file_out = $fopen("test.jpg", "wb");
$fwriteb(file_out, "%c", ram_byte);
Thanks
Jon
---------------------------------------
Posted through http://www.FPGARelated.com
Article: 154204>I need more information. What core version, how many taps? > >Anway like I said before, the best way is to simulate the design in Modelsim. Try the impulse response, step response, white noise, chirp response, etc. and compare the results to the one you would get in Matlab (or Octave). > > > I have been doing altera dspbuilder for over two years now and I got extremely impressed by its accuracy, resource usage, speed and above all the ease of multichannel multirate performance. I am now asked to move to xilinx system generator and was told it is even better. But frankly I am shocked and bewildered that their data control for multichannel/multirate systems is so complicated and demanding extra glue logic. For example it turned out that you will need to check if a module is ready or not for input or else regularise the input stream in order to avoid this check. Additionally there is an output named channel_in !! to let you check if a module is ready specifically for that channel. This interface is bewildering compared to altera dspbuilder. The difference is astronomical. I know xilinx started the idea of automation. Am I missing something?? With altera dspbuilder you can produce chains of several modules at a click, that would otherwise require months of design work. such chains can be updated readily provided the designer hasn't added too much glue. Yet with xilinx approach it looks I have to spend days or weeks to arrange for the glue logic and thus becomes difficult to update. I hope I am wrong. I will be glad if anyone can tell me if there is an easier way to use sysgen blocks that I am missing, in particular the fir compiler(say version 5.0). Thanks. Kaz --------------------------------------- Posted through http://www.FPGARelated.comArticle: 154205
Hi all,
I'm looking for a sub-$20 FPGA board (including everything needed to actually use it).
Requirements:
* The device must have reasonable free software that can
handle schematic capture and Verilog (Altera and Xilinx
would be easily sufficient).
* Can manage at least 1K gates and 20 flip-flops.
Strongly desired:
* At least one debounced button useable on a GPIO line (not reset
for example)
* At least six switches readable by the FPGA.
* At least six LEDs writable by the FPGA.
* At least four GPIO pins that are reasonably accessible.
* Actually costing closer to $10.
* Can power off of USB without any other supply.
* Can manage at least 5K gates and 50 flip-flops.
Would prefer:
* At least twice as much I/O as described above. More is better.
* Compatible at some level with some larger FPGA line
(Altera DEx line in an ideal world).
I'm going to go vendor shopping in a few weeks, but I thought I'd see
if anyone knows of anything close to this that's on the market.
We'd be looking at around 5K-15K ordered, all for academic purposes.
Failing finding a board, we are willing to design and manufacture our
own (as a far second choice). So suggestions on parts would be welcome.
Also, any thoughts on using a cheap microcontroller to emulate
an FPGA would be of interest.
I've found some things that aren't all that close.
* Digilent C-Mod -- $22 in quantity of 1, needs external programmer,
no I/O on-board AFAICT.
* Polmaddie2. No switches, way too much $$$, but pretty good otherwise.
Way more GPIO/FPGA than we need.
Thanks in advance,
Mark
Article: 154206On 9/9/2012 12:20 PM, brehob@gmail.com wrote: > Hi all, > I'm looking for a sub-$20 FPGA board (including everything needed to actually use it). > Requirements: > * The device must have reasonable free software that can > handle schematic capture and Verilog (Altera and Xilinx > would be easily sufficient). > * Can manage at least 1K gates and 20 flip-flops. > > Strongly desired: > * At least one debounced button useable on a GPIO line (not reset > for example) > * At least six switches readable by the FPGA. > * At least six LEDs writable by the FPGA. > * At least four GPIO pins that are reasonably accessible. > * Actually costing closer to $10. > * Can power off of USB without any other supply. > * Can manage at least 5K gates and 50 flip-flops. > > > Would prefer: > * At least twice as much I/O as described above. More is better. > * Compatible at some level with some larger FPGA line > (Altera DEx line in an ideal world). > > I'm going to go vendor shopping in a few weeks, but I thought I'd see > if anyone knows of anything close to this that's on the market. > > We'd be looking at around 5K-15K ordered, all for academic purposes. > Failing finding a board, we are willing to design and manufacture our > own (as a far second choice). So suggestions on parts would be welcome. > > Also, any thoughts on using a cheap microcontroller to emulate > an FPGA would be of interest. > > I've found some things that aren't all that close. > * Digilent C-Mod -- $22 in quantity of 1, needs external programmer, > no I/O on-board AFAICT. > * Polmaddie2. No switches, way too much $$$, but pretty good otherwise. > Way more GPIO/FPGA than we need. > > > Thanks in advance, > Mark > The closest I've seen is a number of Lattice eval boards like the MachXO2 "Pico" board for about $29. I've always suspected that the price of these boards is already somewhat artificially low in order to win seats for their devices. It's not clear that you will get a better price in volume, but I would think Lattice is a good place to start for low cost FPGA's or boards. Regards, GaborArticle: 154207
On Sun, 09 Sep 2012 09:20:03 -0700, brehob wrote: > Hi all, > I'm looking for a sub-$20 FPGA board (including everything needed to > actually use it). Requirements: > * The device must have reasonable free software that can > handle schematic capture and Verilog (Altera and Xilinx would be > easily sufficient). > * Can manage at least 1K gates and 20 flip-flops. > > Strongly desired: > * At least one debounced button useable on a GPIO line (not reset > for example) > * At least six switches readable by the FPGA. * At least six LEDs > writable by the FPGA. * At least four GPIO pins that are reasonably > accessible. * Actually costing closer to $10. > * Can power off of USB without any other supply. * Can manage at > least 5K gates and 50 flip-flops. > > > Would prefer: > * At least twice as much I/O as described above. More is better. * > Compatible at some level with some larger FPGA line > (Altera DEx line in an ideal world). > > I'm going to go vendor shopping in a few weeks, but I thought I'd see if > anyone knows of anything close to this that's on the market. > > We'd be looking at around 5K-15K ordered, all for academic purposes. > Failing finding a board, we are willing to design and manufacture our > own (as a far second choice). So suggestions on parts would be welcome. > > Also, any thoughts on using a cheap microcontroller to emulate an FPGA > would be of interest. > > I've found some things that aren't all that close. > * Digilent C-Mod -- $22 in quantity of 1, needs external programmer, > no I/O on-board AFAICT. > * Polmaddie2. No switches, way too much $$$, but pretty good > otherwise. > Way more GPIO/FPGA than we need. > > > Thanks in advance, > Mark When you get as far as vendor-shopping, don't forget Avnet. I think most of their stuff starts at $100 and goes up from there, but you never know. Ditto SparkFun, for the opposite reason -- if they had anything FPGA, they'd probably have something in the price range you want. But I wouldn't bet anything that they actually have that. -- My liberal friends think I'm a conservative kook. My conservative friends think I'm a liberal kook. Why am I not happy that they have found common ground? Tim Wescott, Communications, Control, Circuits & Software http://www.wescottdesign.comArticle: 154208
Gabor wrote: > The closest I've seen is a number of Lattice eval boards like the > MachXO2 "Pico" board for about $29. I've always suspected that the > price of these boards is already somewhat artificially low in order > to win seats for their devices. It's not clear that you will get > a better price in volume, but I would think Lattice is a good place > to start for low cost FPGA's or boards. The Pico board has many unecessary components, like the FTDI chip, accelerometer and the 1.2 V voltage regulator. There are Lattice FPGAs with 3.3 V only. The LCMXO2-640HC-4TG100C for $4.72 at Digikey should be sufficient. It has 640 LUTs, so it should be possible to implement 1k gates with it (because sometimes multiple gates can be integrated in one LUT). 50 flip-flops is no problem at all. For the USB connection you could use the MC9S08JS16L, which I've used for http://www.frank-buss.de/joystickadapter/ and which costs less than $1. This microcontroller can program the FPGA at boot time, if you add a SPI flash for $2, or without a Flash just from the USB port. Crystal oscillator, DIP switches, LEDs etc. should be less than $10 for all parts, so $20 for a fully populated PCB should be possible, if you develop it yourself. A smart student could do it, to save development cost. -- Frank Buss, http://www.frank-buss.de electronics and more: http://www.youtube.com/user/frankbussArticle: 154209
// Snip It would seem that if this board is for "academic use" you could have a student design this for you and as a class project have it built by the students. You really need to pick a chip that meets your "class room" requirements for functionality first. Not cost first. Also, What do you expect to teach. Just like in any product development, What do you expect to do with this thing, who do you expect to sell it to. My $0.02 hamiltonArticle: 154210
On Sep 9, 5:30=A0pm, Frank Buss <f...@frank-buss.de> wrote: > Gabor wrote: > > The closest I've seen is a number of Lattice eval boards like the > > MachXO2 "Pico" board for about $29. I've always suspected that the > > price of these boards is already somewhat artificially low in order > > to win seats for their devices. =A0It's not clear that you will get > > a better price in volume, but I would think Lattice is a good place > > to start for low cost FPGA's or boards. > > The Pico board has many unecessary components, like the FTDI chip, > accelerometer and the 1.2 V voltage regulator. > > There are Lattice FPGAs with 3.3 V only. The LCMXO2-640HC-4TG100C for > $4.72 at Digikey should be sufficient. It has 640 LUTs, so it should be > possible to implement 1k gates with it (because sometimes multiple gates > can be integrated in one LUT). 50 flip-flops is no problem at all. > > For the USB connection you could use the MC9S08JS16L, which I've used > forhttp://www.frank-buss.de/joystickadapter/and which costs less than > $1. This microcontroller can program the FPGA at boot time, if you add a > SPI flash for $2, or without a Flash just from the USB port. Crystal > oscillator, DIP switches, LEDs etc. should be less than $10 for all > parts, so $20 for a fully populated PCB should be possible, if you > develop it yourself. A smart student could do it, to save development cos= t. > Yep, I'm guessing we will have to design it ourselves, but I'm hoping to find something off-the-shelf (always ideal if what you want already exists). That said, we'll probably need to design it ourselves so we'll need to find parts. Your suggestions are a good starting point, thanks! The LCMXO2-640HC-4TG100C is a bit more than we need in terms of I/O and memory, but otherwise looks nearly ideal. Still hoping a board exists... Thanks, Mark > -- > Frank Buss,http://www.frank-buss.de > electronics and more:http://www.youtube.com/user/frankbussArticle: 154211
On Sep 9, 5:42=A0pm, hamilton <hamil...@nothere.com> wrote: > // Snip > > It would seem that if this board is for "academic use" you could have a > student design this for you and as a class project have it built by the > students. Yep, that's the backup plan. > > You really need to pick a chip that meets your "class room" requirements > for functionality first. > > Not cost first. Sadly, the top-level requirement is likely going to be cost. That is, we'll have a fixed budget and need to do as much as we can within that budget. I agree it's not the ideal way to proceed, and the amount for the fixed budget is unclear at this time ($10-$20/unit is a safe bet though). What we are doing right now is exploring if we can possibly do the labs we want to do given the budget we think we have. The key question is "is this doable given the cost constraints", where "this" is mildly flexible (thus the I/O constraints being only rough). > > Also, > > What do you expect to teach. http://www.eecs.umich.edu/courses/eecs270/labs.html is what we _want_ to do. Right now on a DE2 board. The labs cover the standard basics as well as a bit of interfacing. Some parts of the labs as written are the way they are because of the board we have. > > Just like in any product development, What do you expect to do with this > thing, who do you expect to sell it to. What: the labs above (with some reduced I/O requirements including losing the 7-seg displays). Who: Anyone taking the class on-line, including those with extremely limited budgets (third-world). Mark > > My $0.02 > > hamilton Thanks!Article: 154212
On 9/9/2012 5:30 PM, Frank Buss wrote: > Gabor wrote: >> The closest I've seen is a number of Lattice eval boards like the >> MachXO2 "Pico" board for about $29. I've always suspected that the >> price of these boards is already somewhat artificially low in order >> to win seats for their devices. It's not clear that you will get >> a better price in volume, but I would think Lattice is a good place >> to start for low cost FPGA's or boards. > > The Pico board has many unecessary components, like the FTDI chip, > accelerometer and the 1.2 V voltage regulator. > Actually the FTDI chip is the programming adapter as well as a serial port for this board. The original desire was for a board that came with everything required to program it. In this case the PicoBoard is powered by USB, and programmed with the same USB adapter. It may not have needed the serial port, but I'll take it as an added bonus. All of the analog stuff is just so they can demo the "low power" of the MachXO2 part. You could always ask for partially stuffed boards if you want to get into a volume deal. The capacitive buttons are also unnecessary, but better than no buttons. In any case an FTDI chip (maybe a simpler one than that on this board) is usually a good idea when you want the board to be programmed without an extra JTAG cable (usually much more expensive than these boards). > There are Lattice FPGAs with 3.3 V only. The LCMXO2-640HC-4TG100C for > $4.72 at Digikey should be sufficient. It has 640 LUTs, so it should be > possible to implement 1k gates with it (because sometimes multiple gates > can be integrated in one LUT). 50 flip-flops is no problem at all. > > For the USB connection you could use the MC9S08JS16L, which I've used > for http://www.frank-buss.de/joystickadapter/ and which costs less than > $1. This microcontroller can program the FPGA at boot time, if you add a > SPI flash for $2, or without a Flash just from the USB port. Crystal > oscillator, DIP switches, LEDs etc. should be less than $10 for all > parts, so $20 for a fully populated PCB should be possible, if you > develop it yourself. A smart student could do it, to save development cost. >Article: 154213
On 9/9/2012 5:09 PM, Mark Brehob wrote: > On Sep 9, 5:42 pm, hamilton <hamil...@nothere.com> wrote: >> // Snip >> >> Not cost first. > Sadly, the top-level requirement is likely going to be cost. That is, This is always the argument with commercial products too. But you still need to have a spec! Lets be real, your on a shoestring budget with a DE2 diet ;-). The PCB and pin headers will burn thru half of your $20. A board with one chip onboard (i.e. LCMXO2-256HC-4TG100C $3.40 100s), a USB connector, a 3.3V voltage regulator, a few loose passive parts and you are done. I would enjoy building a board like this, but I do not have an advertising budget to pay for it. Digikey part# ea@100pcs total 220-1425-ND 3.40 340.00 LCMXO2-256HC-4TG100C ED90341CT-ND 0.92 92.00 CONN RECEPT MINI-USB TYPE B SMT 497-1236-1-ND 0.287 28.74 IC REG LDO 3.3V .95A D-PAK PCB (2.5" x 2.1") 8.50 850.00 PCB I had quoted with PCBcart a few weeks ago A26509-40-ND 1.402 140.25 CONN HDR BRKWAY .100 40POS VERT total 1,450.99 Here is $14.51 per board for most of the components. There may be some savings here, but the remaining passive components will take care of that. If I were to build a board like this, I would have to charge 3x the cost of parts to make it worth my while. And I would require you to buy all 100. On the other side of the coin: Digikey part# Qua = 1 220-1298-ND $29.99 BOARD BREAKOUT MACHXO2 http://www.latticesemi.com/documents/EB68.pdf Has all you want, and they have an advertising budget. This sounds like a great opportunity to teach a little entrepreneurship. This was a fun exercise, maybe you can use it in your class. I bet you can write on your school letter head and ask for 100 samples of each of the parts. You will still need to design a PCB and have it fabricated. Good luck hamiltonArticle: 154214
I think you're in luck... I was browsing around earlier today trying to figure out if I could do realtime video-rate JPEG encoding on a DSP instead of having to code it up in verilog, and ran across this... http://www.nuhorizons.com/development/board.asp?product=Lattice-ICE40LP1K-BLINK-Evaluation-Kit For $20, you get: - 4 capacitive buttons. I guess you still have to 'debounce' capacitive buttons... - 63 i/o on breadboard-friendly 0.1" headers. You'll have to supply the headers. - can power off the USB - has ~1K logic cells (lut+flip-flop) - comes with USB cable & software can be downloaded. Assuming you can solder some headers onto the board, switches can be replaced by jumpers, and 63 i/o is actually really generous at this sort of level. Most of the entry-level boards are seriously miserly in comparison. On the downside, you'd probably not get much of a bulk discount - I'm guessing they're already cut to the bone at this price... Just FYI - not a recommendation since I've never used Lattice before, but thought you'd be interested. SimonArticle: 154215
hamilton wrote:> > Digikey part# ea@100pcs total > > 220-1425-ND 3.40 340.00 LCMXO2-256HC-4TG100C > ED90341CT-ND 0.92 92.00 CONN RECEPT MINI-USB TYPE B SMT > 497-1236-1-ND 0.287 28.74 IC REG LDO 3.3V .95A D-PAK > PCB (2.5" x 2.1") 8.50 850.00 PCB I had quoted with PCBcart a > few weeks ago > A26509-40-ND 1.402 140.25 CONN HDR BRKWAY .100 40POS VERT > > total 1,450.99 > > Here is $14.51 per board for most of the components. Is the $8.50 the price for the PCB only, without reflow soldering of the components? Would be expensive. Even just 10 boards are much cheaper here (double sided) http://imall.iteadstudio.com/open-pcb/pcb-prototyping.html And how do you program the FPGA? I don't think that you can attach the USB port to the MachXO2, you need at least a chip to convert the differential signal to digital, but you can't fit a full USB device logic inside such a small FPGA, if you want to do some other useful things with it. I would add a $1 USB microcontroller, but this means some software development. For the requested number of >5k devices of course it gets even cheaper, because usually there is some setup cost of $500-$1000 for reflow soldering and the parts get cheaper, too. -- Frank Buss, http://www.frank-buss.de electronics and more: http://www.youtube.com/user/frankbussArticle: 154216
On Sunday, September 9, 2012 12:06:12 PM UTC-5, Gabor wrote: > On 9/9/2012 12:20 PM, brehob@gmail.com wrote: > > > Hi all, > > > I'm looking for a sub-$20 FPGA board (including everything needed to actually use it). > > > Requirements: > > > * The device must have reasonable free software that can > > > handle schematic capture and Verilog (Altera and Xilinx > > > would be easily sufficient). > > > * Can manage at least 1K gates and 20 flip-flops. > > > > > > Strongly desired: > > > * At least one debounced button useable on a GPIO line (not reset > > > for example) > > > * At least six switches readable by the FPGA. > > > * At least six LEDs writable by the FPGA. > > > * At least four GPIO pins that are reasonably accessible. > > > * Actually costing closer to $10. > > > * Can power off of USB without any other supply. > > > * Can manage at least 5K gates and 50 flip-flops. > > > > > > > > > Would prefer: > > > * At least twice as much I/O as described above. More is better. > > > * Compatible at some level with some larger FPGA line > > > (Altera DEx line in an ideal world). > > > > > > I'm going to go vendor shopping in a few weeks, but I thought I'd see > > > if anyone knows of anything close to this that's on the market. > > > > > > We'd be looking at around 5K-15K ordered, all for academic purposes. > > > Failing finding a board, we are willing to design and manufacture our > > > own (as a far second choice). So suggestions on parts would be welcome. > > > > > > Also, any thoughts on using a cheap microcontroller to emulate > > > an FPGA would be of interest. > > > > > > I've found some things that aren't all that close. > > > * Digilent C-Mod -- $22 in quantity of 1, needs external programmer, > > > no I/O on-board AFAICT. > > > * Polmaddie2. No switches, way too much $$$, but pretty good otherwise. > > > Way more GPIO/FPGA than we need. > > > > > > > > > Thanks in advance, > > > Mark > > > > > The closest I've seen is a number of Lattice eval boards like the > > MachXO2 "Pico" board for about $29. I've always suspected that the > > price of these boards is already somewhat artificially low in order > > to win seats for their devices. It's not clear that you will get > > a better price in volume, but I would think Lattice is a good place > > to start for low cost FPGA's or boards. > Having been struggling with the MachXO2 for the past few months, I'd suggest doing a thorough eval before jumping in with both feet. While it has a lot of nifty advertised features, not all of them work well, and some (i2c slave) are quite badly broken. Documentation is mostly okay, but very spread out and not indexed well, with some rough spots. While this is a fine introduction to the life of a working engineer, it may get in the way of the concepts you're trying to teach :-). The basic IO, logic and ram functions seem to work as expected, these seem to be mostly copies of previous generations. Their no cost licenses are valid for one year, so they may also change their policies on 'free' licensing or the included tool set at some future point and leave you with no good way out.Article: 154217
On 9/10/2012 4:09 AM, Frank Buss wrote: > hamilton wrote:> >> Digikey part# ea@100pcs total >> >> 220-1425-ND 3.40 340.00 LCMXO2-256HC-4TG100C >> ED90341CT-ND 0.92 92.00 CONN RECEPT MINI-USB TYPE B SMT >> 497-1236-1-ND 0.287 28.74 IC REG LDO 3.3V .95A D-PAK >> PCB (2.5" x 2.1") 8.50 850.00 PCB I had quoted with PCBcart a >> few weeks ago >> A26509-40-ND 1.402 140.25 CONN HDR BRKWAY .100 40POS VERT >> >> total 1,450.99 >> >> Here is $14.51 per board for most of the components. > > Is the $8.50 the price for the PCB only, without reflow soldering of the > components? Would be expensive. Even just 10 boards are much cheaper > here (double sided) > > http://imall.iteadstudio.com/open-pcb/pcb-prototyping.html The board I had quoted was for a four layer board (RHOS). My error, the PCB I had quoted was also a 3x3 panel. So the cost per board would be half what I figured. ( I was using a 2x2 panel in my original calculation) I did not look up how the LCMXO2 was programmed, so some sort of programmer will add a few more dollars. The 3x cost multiplier was to include reflow of the boards. Quoting a PCB project can get complicated without a spec to follow. There is also a bottom line here. Who is going to put up the capital to have these things built. Some one like myself would have to put up over $2,000, with no guarantee of sales. With out a spec to follow, the customer may not like what I built and I would have to sit on these things. So I may be out $2k, not a good business model. ;-) > > And how do you program the FPGA? I don't think that you can attach the > USB port to the MachXO2, you need at least a chip to convert the > differential signal to digital, but you can't fit a full USB device > logic inside such a small FPGA, if you want to do some other useful > things with it. I would add a $1 USB microcontroller, but this means > some software development. > > For the requested number of >5k devices of course it gets even cheaper, > because usually there is some setup cost of $500-$1000 for reflow > soldering and the parts get cheaper, too. >Article: 154218
AMDyer@gmail.com wrote: > Having been struggling with the MachXO2 for the past few months, I'd suggest doing a thorough eval before jumping in with both feet. > > While it has a lot of nifty advertised features, not all of them work well, and some (i2c slave) are quite badly broken. Documentation is mostly okay, but very spread out and not indexed well, with some rough spots. > > While this is a fine introduction to the life of a working engineer, it may get in the way of the concepts you're trying to teach :-). The basic IO, logic and ram functions seem to work as expected, these seem to be mostly copies of previous generations. > > Their no cost licenses are valid for one year, so they may also change their policies on 'free' licensing or the included tool set at some future point and leave you with no good way out. I think the license question is no problem, unless Lattice, Altera and Xilinx all decide to change it. -- Frank Buss, http://www.frank-buss.de electronics and more: http://www.youtube.com/user/frankbussArticle: 154219
On 9/10/2012 9:56 AM, AMDyer@gmail.com wrote: > > Having been struggling with the MachXO2 for the past few months, I'd suggest doing a thorough eval before jumping in with both feet. > > While it has a lot of nifty advertised features, not all of them work well, and some (i2c slave) are quite badly broken. Documentation is mostly okay, but very spread out and not indexed well, with some rough spots. > > While this is a fine introduction to the life of a working engineer, it may get in the way of the concepts you're trying to teach :-). The basic IO, logic and ram functions seem to work as expected, these seem to be mostly copies of previous generations. > > Their no cost licenses are valid for one year, so they may also change their policies on 'free' licensing or the included tool set at some future point and leave you with no good way out. I've been down this road with Lattice before. The license "expires" in a year but they can renew it indefinitely because there is no additional cost to them. They can also license it to as many computers as you wish so don't worry about what happens when you replace that old laptop. You won't get updates after the first year which can be a blessing actually. If it ain't broke... I haven't tried the new Diamond software yet. RickArticle: 154220
AMDyer@gmail.com wrote: > > Having been struggling with the MachXO2 for the past few months, I'd > suggest doing a thorough eval before jumping in with both feet. Well, since the OP's logic requirements are so low, he might look at the Xilinx XC95xxXL and XC2R "CoolRunner" CPLDs. The smallest of these devices run slightly over US $1, and have over 30 I/O pins. You'd need something to handle the USB-JTAG conversion for programming, there are a number of chips that can do this. I use the Xilinx Parallel Cable III, which is just a 74HC125 and about 6 small components (res, cap, diode) and the schematic is online. If your project doesn't actually need USB connectivity, you could build the circuit of the Parallel Cable III onto the board for under $1 in parts. It only connects about 5 wires to the PC parallel port. These CPLD chips have a bit different architecture than an FPGA, but the Xilinx tools handle all the synthesis and mapping anyway, so it doesn't matter much. They are more efficient for wide gates like address comparators, but have fewer FFs than an FPGA. Still the 9536 has 36 FF's, the 9572 would have 72. I think the coolrunner comes with 64, 128 and up. JonArticle: 154221
Den torsdagen den 30:e augusti 2012 kl. 18:59:43 UTC+2 skrev Rob Gaddi: > Here's a sort of a general toss-out. When I'm writing code in C, one > > of my rules is that I turn on -Wall (and a mess of other warnings) and > > I won't ship until I've got 0 warnings in the build. > > > > I've never managed to follow a similar pattern on my FPGA designs. Both > > on Xilinx and Altera I always get 4 gillion warnings, all of > > them trivial. So I glance through the list, looking for anything that > > looks serious, but that process is both exhausting and not rigorous. > > Does anyone actually manage to get their FPGA builds to a zero warning > > state? Or is that yet another way in which FPGA design > > tools get circles run around them by software design tools? > > > > -- > > Rob Gaddi, Highland Technology -- www.highlandtechnology.com > > Email address domain is currently out of order. See above to fix. I also never get zero warnings, "There is an 'U' or 'X'" when starting sim for external IP which I don'twant to touch, there is ununused bit in a word in a reg-bank (during synt) or some outputs of an inferred BRAM are unused (P&R). Intermixed (in the log-files) with these hundreds to thousands warnings are some important warning that really matters, but they easily get drowned. I am using "make" to sim/synt/par the design, but the make "goal" is not to obtain the result file (i.e sim log file, synt netlist file, P&R bit file) but to obtain a filtered version of the log file which passes a text filter (grep -v) with no remaining errors/warnings/failures. The list of acceptable warnings is kept in a (suppression) file which belongs to the project. (So the "make" goal is to obtain a suppressed log file, not the sim-log/netlist/bit-file. Whats the use of a bit file that failed timing?? The netlist is obtained as a side effect of obtaining a filtered log file). Once a new warning breaks the build I update the suppression file (or the src (vhdl) file) to accept the new warning. Basically the suppression file contains a list of patterns (regexps) that are "acceptable". Our typical build flow (lattice/xilinx) is more like sim/synt/build/map/par/trace/bitgen, and each step will produce a log file that can be suppressed. So seven different suppress files are in work. -- PontusArticle: 154222
Finally sorted out. To be fair to Xilinx SysGen I realised it is lack of adequate documentation and some misleading terminolgy plus the effect of moving from Altera DSPBuilder to SysGen. I managed to get equivalent performance on FIR compiler and here are the differences that caused confusion: 1) Say I wanted a filter for 4 channels, clock speed 320MHz, sample rate of each channel is 10Msps. In DSPBuilder I can send my 4 channels as 11110000...11110000... In SysGen I have to spread them as 1000..1000..1000..1000.. as this will match the ready state which then can be ignored. 2) SysGen asks to enter sample period. In fact this turns out not to be the period of 10Msps but the net time folding factor i.e. 320/10/4 = 8 Altera asks to enter 320MHz for sys clk and 10Msps for input rate directly. Kadhiem --------------------------------------- Posted through http://www.FPGARelated.comArticle: 154223
Dear colleagues,
I am sending you a proposal of binary counter, designed to minimize logic
path length in between flip-flops to one gate (MUX) only, at the expense of
not so straightforward binary counting. The reason for this design has
emerged while using Actel (MicroSemi) ProASIC/IGLOO architecture, lacking
any hardwired support for fast carry.
I have placed VHDL code, schematics, testbench and sample C code to OpenCores:
http://opencores.org/project,pcounter
for further review. If you have GHDL, you can run the test easily by issuing
"make testrun" or "make testvcd" to examine traces.
Background:
During our work on Actel FPGAs (basically, 3-LUT & DFF only), we were aware
of following types of faster counters:
- LFSR counter
- Johnson counter
- "RLA counter" (as tailored using Actel's SmartGen core generator)
Johnson due to its O(2^n) (n as number of bits) can not be used for longer
counts; LFSR's are hard to invert (table lookup seems to be only known
method), therefore also impractical for wider counters. RLA counter is still
too slow and complex for wider counters and moderate speeds (e.g.
> 24bits @ >100MHz).
As a consequence, the proposed counter uses synchronous divide-by-two
blocks, each using 1-bit pipeline and carry by single-clock pulse. Design is
simple and fast, preliminary results from Synplify and Actel Designer shows
32bits @200MHz feasible.
However, output bit lines are non-proportionaly delayed by discrete number
of clock periods. Therefore, to obtain linear bit word, an inversion formula
needs to be applied. Fortunately, the inversion is simple (unlike LFSR's),
in C (pcount.c):
for (k = 1; k < n; k++)
if ((y & ((1<<k)-1)) < k)
y = y ^ (1<<k);
-- it may be implemented in VHDL core, or within CPU as shown, depending on
application requirements.
I am attaching design files & C language decoder/encoder of counter bit
words. If you have GHDL, you can run the test easily by issuing
"make testrun" or "make testvcd" to examine traces.
** My questions are: **
- does this design exists, is it being used, and if so, what is its name?
- if not, do you find the design useful?
Best regards,
Marek Peca
Article: 154224On 9/10/2012 4:17 PM, Jon Elson wrote: > AMDyer@gmail.com wrote: > > >> >> Having been struggling with the MachXO2 for the past few months, I'd >> suggest doing a thorough eval before jumping in with both feet. > > Well, since the OP's logic requirements are so low, he might look at > the Xilinx XC95xxXL and XC2R "CoolRunner" CPLDs. The smallest of these > devices run slightly over US $1, and have over 30 I/O pins. You'd > need something to handle the USB-JTAG conversion for programming, > there are a number of chips that can do this. I use the Xilinx > Parallel Cable III, which is just a 74HC125 and about 6 small > components (res, cap, diode) and the schematic is online. If your > project doesn't actually need USB connectivity, you could build the > circuit of the Parallel Cable III onto the board for under $1 in parts. > It only connects about 5 wires to the PC parallel port. > These CPLD chips have a bit different architecture than an FPGA, but > the Xilinx tools handle all the synthesis and mapping anyway, so it > doesn't matter much. They are more efficient for wide gates like address > comparators, but have fewer FFs than an FPGA. Still the 9536 has 36 FF's, > the 9572 would have 72. I think the coolrunner comes with 64, 128 and > up. > > Jon If you build the Parllel Cable III into your product, what will you connect it to? I don't think they have built a PC with a parallel port in a number of years and my understanding is that the drivers for USB parallel ports don't work properly with bit banging software like this. Am I mistaken? Is this a workable solution? Rick
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